From 2b5f77663052d77f82e109e8d4649cf7ad996977 Mon Sep 17 00:00:00 2001 From: Fernando Pacheco Date: Fri, 3 Apr 2020 16:26:06 -0700 Subject: [PATCH] msm: camera: ife: Re-enable auto clock gating Auto clock gating was disabled to aid in certain debug scenarios. However, for normal operation the expectation is for auto clock gating to be enabled. The writes could be removed as enabled is the default, but no harm in being explicit. CRs-Fixed: 2584631 Change-Id: I63336d12b94f270c4962281e14e879a6207ea386 Signed-off-by: Fernando Pacheco --- .../isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver3.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver3.c b/drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver3.c index a750e7d2ee99..e632596991bb 100644 --- a/drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver3.c +++ b/drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver3.c @@ -323,19 +323,23 @@ int cam_vfe_top_ver3_init_hw(void *device_priv, top_priv->hw_clk_rate = 0; - /* Disable clock gating at IFE top */ - CAM_INFO(CAM_ISP, "Disable clock gating at IFE top"); - cam_soc_util_w_mb(common_data.soc_info, VFE_CORE_BASE_IDX, - common_data.common_reg->core_cgc_ovd_0, 0xFFFFFFFF); + /** + * Auto clock gating is enabled by default, but no harm + * in setting the value we expect. + */ + CAM_INFO(CAM_ISP, "Enabling clock gating at IFE top"); cam_soc_util_w_mb(common_data.soc_info, VFE_CORE_BASE_IDX, - common_data.common_reg->core_cgc_ovd_1, 0xFF); + common_data.common_reg->core_cgc_ovd_0, 0x0); cam_soc_util_w_mb(common_data.soc_info, VFE_CORE_BASE_IDX, - common_data.common_reg->ahb_cgc_ovd, 0x1); + common_data.common_reg->core_cgc_ovd_1, 0x0); cam_soc_util_w_mb(common_data.soc_info, VFE_CORE_BASE_IDX, - common_data.common_reg->noc_cgc_ovd, 0x1); + common_data.common_reg->ahb_cgc_ovd, 0x0); + + cam_soc_util_w_mb(common_data.soc_info, VFE_CORE_BASE_IDX, + common_data.common_reg->noc_cgc_ovd, 0x0); return 0; }