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ARM: SoC platform updates for v5.4
The main change this time around is a cleanup of some of the oldest platforms based on the XScale and ARM9 CPU cores, which are between 10 and 20 years old. The Kendin/Micrel/Microchip KS8695, Winbond/Nuvoton W90x900 and Intel IOP33x/IOP13xx platforms are removed after we determined that nobody is using them any more. The TI Davinci and NXP LPC32xx platforms on the other hand are still in active use and are converted to the ARCH_MULTIPLATFORM build, meaning that we can compile a kernel that works on these along with most other ARMv5 platforms. Changes toward that goal are also merged for IOP32x, but additional work is needed to complete this. Patches for the remaining ARMv5 platforms have started but need more work and some testing. Support for the new ASpeed AST2600 gets added, this is based on the Cortex-A7 ARMv7 core, and is a newer version of the existing ARMv5 and ARMv6 chips in the same family. Other changes include a cleanup of the ST-Ericsson ux500 platform and the move of the TI Davinci platform to a new clocksource driver. Signed-off-by: Arnd Bergmann <[email protected]> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJdf6RZAAoJEJpsee/mABjZDO0QAKGkhoEdUmrar0Yf7/ibTrLK 0naWvQtPEm6dv+u1zNfe2IWchVRbBVm+YSLbyaAZwJQknV5gdxgd/UyQrSG9yywg xDEUdnj03AksYreWbr1tfcA6kQQJEeqZeysNej0v7MAd6MFz5O4M4CgYfAnCLCc4 5rzSqbtFgv4uNMnMTJGKk8anFWNYLbewoBGVcGIEQ/KQlf1+NrlqBWk7CgvencaF VLqpK0mllhKxAOJHGz6Q/XXiJnj0u56X9GvfcJoaxDWVrAnC6ii29NOHKeXhxS5W /EmhIEuqCRoGLAMYmml+NbCv43Z1L7neDJwg6sf9cVqNrB9L1Ldlgpr/uoj++Z+l wdZ297Ogs4mKYx5CCdK4X1TaFOH3s+/awFr1uEP70p+QsPDMrCTuLSjgeQziylgO kBGIGkqG4l48V9psQy/9SaalgGSB8w6Ta/ms1+rWc99Qj3ExDFCAMIl4uzOxjxT1 9MZbvhc3ulLT4BBXNGhvNaPJxYGk+ggV/ObsqF9+GkxLcVPR8L1tPIzZMB5dB1YR 0YcwyK2jlZGKIwMjLYDT+axGGPh9G+LV6INjRbW5BGJHgNZF844Bxw/eFYushLAu KHrbpm3ImzJw9eHlgIRtFRTy8ZKPuvv7fGg3zzKSHT4ZmC3tEM68PnQGuMEvVX8Q +Oa6OiDb0pkV1zsACSZn =u+ew -----END PGP SIGNATURE----- Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC platform updates from Arnd Bergmann: "The main change this time around is a cleanup of some of the oldest platforms based on the XScale and ARM9 CPU cores, which are between 10 and 20 years old. The Kendin/Micrel/Microchip KS8695, Winbond/Nuvoton W90x900 and Intel IOP33x/IOP13xx platforms are removed after we determined that nobody is using them any more. The TI Davinci and NXP LPC32xx platforms on the other hand are still in active use and are converted to the ARCH_MULTIPLATFORM build, meaning that we can compile a kernel that works on these along with most other ARMv5 platforms. Changes toward that goal are also merged for IOP32x, but additional work is needed to complete this. Patches for the remaining ARMv5 platforms have started but need more work and some testing. Support for the new ASpeed AST2600 gets added, this is based on the Cortex-A7 ARMv7 core, and is a newer version of the existing ARMv5 and ARMv6 chips in the same family. Other changes include a cleanup of the ST-Ericsson ux500 platform and the move of the TI Davinci platform to a new clocksource driver" [ The changes had marked INTEL_IOP_ADMA and USB_LPC32XX as being buildable on other platforms through COMPILE_TEST, but that causes new warnings that I most definitely do not want to see during the merge window as that could hide other issues. So the COMPILE_TEST option got disabled for them again - Linus ] * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (61 commits) ARM: multi_v5_defconfig: make DaVinci part of the ARM v5 multiplatform build ARM: davinci: support multiplatform build for ARM v5 arm64: exynos: Enable exynos-chipid driver ARM: OMAP2+: Delete an unnecessary kfree() call in omap_hsmmc_pdata_init() ARM: OMAP2+: move platform-specific asm-offset.h to arch/arm/mach-omap2 ARM: davinci: dm646x: Fix a typo in the comment ARM: davinci: dm646x: switch to using the clocksource driver ARM: davinci: dm644x: switch to using the clocksource driver ARM: aspeed: Enable SMP boot ARM: aspeed: Add ASPEED AST2600 architecture ARM: aspeed: Select timer in each SoC dt-bindings: arm: cpus: Add ASPEED SMP ARM: imx: stop adjusting ar8031 phy tx delay mailmap: map old company name to new one @microchip.com MAINTAINERS: at91: remove the TC entry MAINTAINERS: at91: Collect all pinctrl/gpio drivers in same entry ARM: at91: move platform-specific asm-offset.h to arch/arm/mach-at91 MAINTAINERS: Extend patterns for Samsung SoC, Security Subsystem and clock drivers ARM: s3c64xx: squash samsung_usb_phy.h into setup-usb-phy.c ARM: debug-ll: Add support for r7s9210 ...
This commit is contained in:
commit
2b97c39514
238 changed files with 602 additions and 12476 deletions
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@ -739,7 +739,8 @@ config SERIAL_PNX8XXX_CONSOLE
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config SERIAL_HS_LPC32XX
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tristate "LPC32XX high speed serial port support"
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depends on ARCH_LPC32XX && OF
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depends on ARCH_LPC32XX || COMPILE_TEST
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depends on OF
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select SERIAL_CORE
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help
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Support for the LPC32XX high speed serial ports (up to 900kbps).
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@ -25,8 +25,8 @@
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#include <linux/irq.h>
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#include <linux/gpio.h>
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#include <linux/of.h>
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#include <mach/platform.h>
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#include <mach/hardware.h>
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#include <linux/sizes.h>
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#include <linux/soc/nxp/lpc32xx-misc.h>
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/*
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* High Speed UART register offsets
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@ -81,6 +81,8 @@
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#define LPC32XX_HSU_TX_TL8B (0x2 << 0)
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#define LPC32XX_HSU_TX_TL16B (0x3 << 0)
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#define LPC32XX_MAIN_OSC_FREQ 13000000
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#define MODNAME "lpc32xx_hsuart"
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struct lpc32xx_hsuart_port {
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@ -151,8 +153,6 @@ static void lpc32xx_hsuart_console_write(struct console *co, const char *s,
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local_irq_restore(flags);
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}
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static void lpc32xx_loopback_set(resource_size_t mapbase, int state);
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static int __init lpc32xx_hsuart_console_setup(struct console *co,
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char *options)
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{
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@ -439,35 +439,6 @@ static void serial_lpc32xx_break_ctl(struct uart_port *port,
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spin_unlock_irqrestore(&port->lock, flags);
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}
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/* LPC3250 Errata HSUART.1: Hang workaround via loopback mode on inactivity */
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static void lpc32xx_loopback_set(resource_size_t mapbase, int state)
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{
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int bit;
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u32 tmp;
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switch (mapbase) {
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case LPC32XX_HS_UART1_BASE:
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bit = 0;
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break;
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case LPC32XX_HS_UART2_BASE:
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bit = 1;
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break;
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case LPC32XX_HS_UART7_BASE:
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bit = 6;
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break;
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default:
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WARN(1, "lpc32xx_hs: Warning: Unknown port at %08x\n", mapbase);
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return;
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}
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tmp = readl(LPC32XX_UARTCTL_CLOOP);
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if (state)
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tmp |= (1 << bit);
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else
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tmp &= ~(1 << bit);
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writel(tmp, LPC32XX_UARTCTL_CLOOP);
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}
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/* port->lock is not held. */
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static int serial_lpc32xx_startup(struct uart_port *port)
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{
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