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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-10 06:09:23 -04:00
Merge "ARM: dts: msm: Add correct voltages for sensor & phy" into camera-kernel.lnx.4.0
This commit is contained in:
Camera Software Integration
Gerrit - the friendly Code Review server
commit
2bf5796270
2 changed files with 54 additions and 54 deletions
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@ -14,8 +14,8 @@
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cam_vaf-supply = <&L7C>;
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regulator-names = "cam_vaf";
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rgltr-cntrl-support;
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rgltr-min-voltage = <2800000>;
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rgltr-max-voltage = <2800000>;
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rgltr-min-voltage = <3000000>;
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rgltr-max-voltage = <3000000>;
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rgltr-load-current = <100000>;
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status = "ok"
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};
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@ -26,15 +26,14 @@
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cam_vio-supply = <&L3C>;
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cam_vana-supply = <&L5C>;
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cam_vdig-supply = <&L1C>;
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cam_vaf-supply = <&L7C>;
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cam_clk-supply = <&gcc_camss_top_gdsc>;
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regulator-names = "cam_vio", "cam_vana", "cam_vdig",
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"cam_clk", "cam_vaf";
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"cam_clk";
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rgltr-cntrl-support;
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pwm-switch;
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rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>;
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rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>;
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rgltr-load-current = <2500 50000 180000 0 125000>;
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rgltr-min-voltage = <1800000 2800000 1200000 0>;
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rgltr-max-voltage = <1800000 2800000 1200000 0>;
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rgltr-load-current = <2500 50000 180000 0>;
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gpio-no-mux = <0>;
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pinctrl-names = "cam_default", "cam_suspend";
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pinctrl-0 = <&cam_sensor_mclk0_active
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@ -98,7 +97,7 @@
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cell-index = <0>;
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compatible = "qcom,cam-sensor";
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csiphy-sd-index = <0>;
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sensor-position-roll = <270>;
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sensor-position-roll = <90>;
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sensor-position-pitch = <0>;
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sensor-position-yaw = <180>;
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actuator-src = <&actuator_rear>;
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@ -113,7 +112,7 @@
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pwm-switch;
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rgltr-min-voltage = <1800000 2800000 1200000 0>;
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rgltr-max-voltage = <1800000 2800000 1200000 0>;
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rgltr-load-current = <2500 50000 180000 0 125000>;
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rgltr-load-current = <2500 50000 180000 0>;
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gpio-no-mux = <0>;
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pinctrl-names = "cam_default", "cam_suspend";
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pinctrl-0 = <&cam_sensor_mclk0_active
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@ -153,8 +152,8 @@
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"cam_clk";
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rgltr-cntrl-support;
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pwm-switch;
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rgltr-min-voltage = <1800000 2800000 1056000 0>;
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rgltr-max-voltage = <1800000 2800000 1056000 0>;
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rgltr-min-voltage = <1800000 2800000 1200000 0>;
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rgltr-max-voltage = <1800000 2800000 1200000 0>;
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rgltr-load-current = <3000 35000 80000 0>;
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gpio-no-mux = <0>;
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pinctrl-names = "cam_default", "cam_suspend";
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@ -6,6 +6,11 @@
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status = "ok"
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};
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qcom,cam-sync {
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compatible = "qcom,cam-sync";
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status = "ok"
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};
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cam_csiphy0: qcom,csiphy0 {
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cell-index = <0>;
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compatible = "qcom,csiphy-v1.2.3", "qcom,csiphy";
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@ -20,9 +25,9 @@
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mipi-csi-vdd1-supply = <&L12A>;
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mipi-csi-vdd2-supply = <&L9A>;
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rgltr-cntrl-support;
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rgltr-min-voltage = <0 0 900000 1200000>;
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rgltr-max-voltage = <0 0 900000 1200000>;
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rgltr-load-current = <0 0 126000 74000>;
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rgltr-min-voltage = <0 904000 1232000>;
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rgltr-max-voltage = <0 904000 1232000>;
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rgltr-load-current = <0 126000 74000>;
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clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
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<&gcc GCC_CAMSS_CPHY_0_CLK>,
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<&gcc GCC_CAMSS_CSI0PHYTIMER_CLK_SRC>,
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@ -34,7 +39,7 @@
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src-clock-name = "csi0phytimer_clk_src";
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clock-cntl-level = "lowsvs", "svs", "turbo";
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clock-rates =
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<19200000 0 19200000 0>,
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<19200000 0 19200000 0>,
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<256000000 0 300000000 0>,
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<384000000 0 300000000 0>;
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status = "ok"
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@ -54,9 +59,9 @@
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mipi-csi-vdd1-supply = <&L12A>;
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mipi-csi-vdd2-supply = <&L9A>;
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rgltr-cntrl-support;
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rgltr-min-voltage = <0 0 900000 1200000>;
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rgltr-max-voltage = <0 0 900000 1200000>;
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rgltr-load-current = <0 0 126000 74000>;
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rgltr-min-voltage = <0 904000 1232000>;
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rgltr-max-voltage = <0 904000 1232000>;
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rgltr-load-current = <0 126000 74000>;
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clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
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<&gcc GCC_CAMSS_CPHY_1_CLK>,
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<&gcc GCC_CAMSS_CSI1PHYTIMER_CLK_SRC>,
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@ -68,7 +73,7 @@
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src-clock-name = "csi1phytimer_clk_src";
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clock-cntl-level = "lowsvs", "svs", "turbo";
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clock-rates =
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<19200000 0 19200000 0>,
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<19200000 0 19200000 0>,
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<256000000 0 300000000 0>,
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<384000000 0 300000000 0>;
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status = "ok"
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@ -253,7 +258,6 @@
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regulator-names = "camss-vdd";
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camss-vdd-supply = <&gcc_camss_top_gdsc>;
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clock-names =
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"gcc_camss_ahb_clk",
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"gcc_camss_top_ahb_clk",
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"gcc_camss_top_ahb_clk_src",
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"gcc_camss_axi_clk",
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@ -261,7 +265,6 @@
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"gcc_camss_nrt_axi_clk",
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"gcc_camss_rt_axi_clk";
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clocks =
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<&gcc GCC_CAMERA_AHB_CLK>,
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<&gcc GCC_CAMSS_TOP_AHB_CLK>,
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<&gcc GCC_CAMSS_TOP_AHB_CLK_SRC>,
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<&gcc GCC_CAMSS_AXI_CLK>,
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@ -270,15 +273,12 @@
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<&gcc GCC_CAMSS_RT_AXI_CLK>;
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src-clock-name = "gcc_camss_axi_clk_src";
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clock-rates =
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<0 0 0 0 0 0 0>,
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<0 0 80000000 0 19200000 0 0>,
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<0 0 80000000 0 150000000 0 0>,
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<0 0 80000000 0 200000000 0 0>,
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<0 0 80000000 0 300000000 0 0>,
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<0 0 80000000 0 300000000 0 0>,
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<0 0 80000000 0 300000000 0 0>;
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clock-cntl-level = "suspend", "minsvs", "lowsvs", "svs",
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"svs_l1", "nominal", "turbo";
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<0 0 0 0 0 0>,
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<0 19200000 0 19200000 0 0>,
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<0 80000000 0 150000000 0 0>,
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<0 80000000 0 300000000 0 0>,
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<0 80000000 0 300000000 0 0>;
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clock-cntl-level = "suspend", "lowsvs", "svs", "nominal", "turbo";
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qcom,cx-ipeak-gpu-limit = <921600000>;
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control-camnoc-axi-clk;
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camnoc-bus-width = <32>;
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@ -502,10 +502,9 @@
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<&gcc GCC_CAMSS_OPE_CLK_SRC>,
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<&gcc GCC_CAMSS_OPE_CLK>;
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clock-rates = <0 0 0>,
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<0 0 0>,
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<0 0 0>,
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<0 0 0>;
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clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";
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clock-cntl-level = "lowsvs", "svs", "turbo";
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cdm-client-names = "ope";
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config-fifo;
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fifo-depths = <64 64 64 64>;
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@ -545,10 +544,11 @@
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<&gcc GCC_CAMSS_TFE_0_CLK_SRC>,
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<&gcc GCC_CAMSS_TFE_0_CLK>;
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clock-rates =
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<240000000 0 0 0 256000000 0>,
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<384000000 0 0 0 460800000 0>,
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<426400000 0 0 0 576000000 0>;
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clock-cntl-level = "svs", "svs_l1", "turbo";
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<19200000 0 19200000 0 19200000 0>,
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<256000000 0 256000000 0 288000000 0>,
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<384000000 0 384000000 0 576000000 0>,
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<426400000 0 384000000 0 576000000 0>;
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clock-cntl-level = "lowsvs", "svs", "nominal", "turbo";
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src-clock-name = "tfe_csid_clk_src";
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clock-control-debugfs = "true";
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ppi-enable;
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@ -572,10 +572,10 @@
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<&gcc GCC_CAMSS_TFE_0_CLK_SRC>,
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<&gcc GCC_CAMSS_TFE_0_CLK>;
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clock-rates =
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<256000000 0>,
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<460800000 0>,
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<19200000 0>,
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<288000000 0>,
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<576000000 0>;
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clock-cntl-level = "svs", "svs_l1", "turbo";
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clock-cntl-level = "lowsvs", "svs", "turbo";
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src-clock-name = "tfe_clk_src";
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clock-control-debugfs = "true";
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cam_hw_pid = <4>;
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@ -609,10 +609,11 @@
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<&gcc GCC_CAMSS_TFE_1_CLK_SRC>,
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<&gcc GCC_CAMSS_TFE_1_CLK>;
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clock-rates =
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<240000000 0 240000000 0 256000000 0>,
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<384000000 0 341333333 0 460800000 0>,
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<426400000 0 384000000 0 576000000 0>;
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clock-cntl-level = "svs", "svs_l1", "turbo";
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<19200000 0 19200000 0 19200000 0>,
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<256000000 0 256000000 0 288000000 0>,
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<384000000 0 384000000 0 576000000 0>,
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<426000000 0 384000000 0 576000000 0>;
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clock-cntl-level = "lowsvs", "svs", "nominal", "turbo";
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src-clock-name = "tfe_csid_clk_src";
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clock-control-debugfs = "true";
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ppi-enable;
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@ -636,10 +637,10 @@
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<&gcc GCC_CAMSS_TFE_1_CLK_SRC>,
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<&gcc GCC_CAMSS_TFE_1_CLK>;
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clock-rates =
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<256000000 0>,
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<460800000 0>,
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<19200000 0>,
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<288000000 0>,
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<576000000 0>;
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clock-cntl-level = "svs", "svs_l1", "turbo";
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clock-cntl-level = "lowsvs", "svs", "turbo";
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src-clock-name = "tfe_clk_src";
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clock-control-debugfs = "true";
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cam_hw_pid = <5>;
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@ -694,10 +695,10 @@
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<&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>,
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<&gcc GCC_CAMSS_CPHY_0_CLK>;
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clock-rates =
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<240000000 0 0>,
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<341333333 0 0>,
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<19200000 0 0>,
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<256000000 0 0>,
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<384000000 0 0>;
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clock-cntl-level = "svs", "svs_l1", "turbo";
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clock-cntl-level = "lowsvs", "svs", "turbo";
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src-clock-name = "cphy_rx_clk_src";
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clock-control-debugfs = "false";
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status = "ok"
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@ -721,10 +722,10 @@
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<&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>,
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<&gcc GCC_CAMSS_CPHY_1_CLK>;
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clock-rates =
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<240000000 0 0>,
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<341333333 0 0>,
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<19200000 0 0>,
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<256000000 0 0>,
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<384000000 0 0>;
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clock-cntl-level = "svs", "svs_l1", "turbo";
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clock-cntl-level = "lowsvs", "svs", "turbo";
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src-clock-name = "cphy_rx_clk_src";
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clock-control-debugfs = "false";
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status = "ok"
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@ -770,11 +771,11 @@
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<&gcc GCC_CAMSS_OPE_CLK_SRC>,
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<&gcc GCC_CAMSS_OPE_CLK>;
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clock-rates =
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<19200000 0 19200000 0>,
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<171428571 0 200000000 0>,
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<171428571 0 266600000 0>,
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<240000000 0 465000000 0>,
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<240000000 0 580000000 0>;
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clock-cntl-level = "svs", "svs_l1", "nominal", "turbo";
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clock-cntl-level = "lowsvs", "svs", "nominal", "turbo";
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src-clock-name = "ope_clk_src";
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status = "ok"
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};
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