From babd671c62e0c2ee9b58a663fe7d9e6f70b3bae3 Mon Sep 17 00:00:00 2001 From: Tony Truong Date: Wed, 23 Sep 2020 11:14:38 -0700 Subject: [PATCH 1/2] dt-bindings: arm: msm: update documentation for PCIe internal AUX CLK PCIe internal AUX clock frequency used to be either 1MHz or 19.2MHz. The devicetree entry was a boolean type to determine which frequency to program in PCIe controller. Newer chipsets may support other frequencies such as 16.6MHz. Update the devicetree entry so that it accepts a decimal value for the desired frequency to be programmed in PCIe controller. Change-Id: I5818f5973ddbbce4268eafb6e99202daeba4234a --- bindings/pci/pci-msm.txt | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/bindings/pci/pci-msm.txt b/bindings/pci/pci-msm.txt index a864094c6b12..8a9fa1e1c6fe 100644 --- a/bindings/pci/pci-msm.txt +++ b/bindings/pci/pci-msm.txt @@ -229,10 +229,12 @@ interconnects: link into l1ss sleep while idle in l1ss. If this is omitted, the default timeout is 100ms. -- qcom,use-19p2mhz-aux-clk: +- qcom,aux-clk-freq: Usage: optional - Value type: - Definition: Set PCIe AUX clock frequency to 19.2MHz + Value type: + Definition: Override reset value for PCIe internal aux clock frequency. + Value will be the actual frequency rounded up to the nearest + decimal. For example, use 17 for 16.6MHz. - qcom,common-clk-en: Usage: optional @@ -504,7 +506,6 @@ Example qcom,link-check-max-count = <40> /* 200ms */ qcom,boot-option = <0x1>; qcom,drv-supported; - qcom,use-19p2mhz-aux-clk; qcom,common-clk-en; qcom,clk-power-manage-en; qcom,n-fts = <0x50>; From 2b01efc315a7ddd1bc0b914d58fac4d9df2d5a1b Mon Sep 17 00:00:00 2001 From: Tony Truong Date: Wed, 23 Sep 2020 11:21:33 -0700 Subject: [PATCH 2/2] ARM: dts: msm: remove deprecated PCIe AUX CLK frequency for lahaina PCIe internal AUX clock frequency setting has been change from boolean to u32. On Lahaina, the reset value of this settings is correct and does not need the new devicetree entry to override it. Therefore, remove the deprecated entry for Lahaina. Change-Id: I4b0eb9f3e98ffdf894d4245212e64af618ac80e0 --- qcom/lahaina-pcie.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/qcom/lahaina-pcie.dtsi b/qcom/lahaina-pcie.dtsi index 451f2627764f..f15c2e4eda1b 100644 --- a/qcom/lahaina-pcie.dtsi +++ b/qcom/lahaina-pcie.dtsi @@ -103,7 +103,6 @@ qcom,drv-supported; qcom,l1ss-sleep-disable = <0x1>; qcom,drv-l1ss-timeout-us = <5000>; - qcom,use-19p2mhz-aux-clk; qcom,no-l0s-supported; qcom,l1-2-th-scale = <2>; qcom,l1-2-th-value = <70>; @@ -330,7 +329,6 @@ qcom,boot-option = <0x1>; qcom,drv-supported; - qcom,use-19p2mhz-aux-clk; qcom,wr-halt-size = <0x8>; qcom,no-l0s-supported; qcom,slv-addr-space-size = <0x20000000>;