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[MIPS] Import updates from i386's i8259.c
Import many updates from i386's i8259.c, especially genirq transitions. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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2 changed files with 115 additions and 84 deletions
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@ -19,10 +19,31 @@
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#include <asm/io.h>
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/* i8259A PIC registers */
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#define PIC_MASTER_CMD 0x20
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#define PIC_MASTER_IMR 0x21
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#define PIC_MASTER_ISR PIC_MASTER_CMD
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#define PIC_MASTER_POLL PIC_MASTER_ISR
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#define PIC_MASTER_OCW3 PIC_MASTER_ISR
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#define PIC_SLAVE_CMD 0xa0
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#define PIC_SLAVE_IMR 0xa1
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/* i8259A PIC related value */
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#define PIC_CASCADE_IR 2
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#define MASTER_ICW4_DEFAULT 0x01
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#define SLAVE_ICW4_DEFAULT 0x01
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#define PIC_ICW4_AEOI 2
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extern spinlock_t i8259A_lock;
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extern void init_8259A(int auto_eoi);
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extern void enable_8259A_irq(unsigned int irq);
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extern void disable_8259A_irq(unsigned int irq);
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extern void init_i8259_irqs(void);
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#define I8259A_IRQ_BASE 0
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/*
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* Do the traditional i8259 interrupt polling thing. This is for the few
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* cases where no better interrupt acknowledge method is available and we
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@ -35,15 +56,15 @@ static inline int i8259_irq(void)
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spin_lock(&i8259A_lock);
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/* Perform an interrupt acknowledge cycle on controller 1. */
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outb(0x0C, 0x20); /* prepare for poll */
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irq = inb(0x20) & 7;
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if (irq == 2) {
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outb(0x0C, PIC_MASTER_CMD); /* prepare for poll */
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irq = inb(PIC_MASTER_CMD) & 7;
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if (irq == PIC_CASCADE_IR) {
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/*
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* Interrupt is cascaded so perform interrupt
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* acknowledge on controller 2.
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*/
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outb(0x0C, 0xA0); /* prepare for poll */
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irq = (inb(0xA0) & 7) + 8;
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outb(0x0C, PIC_SLAVE_CMD); /* prepare for poll */
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irq = (inb(PIC_SLAVE_CMD) & 7) + 8;
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}
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if (unlikely(irq == 7)) {
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@ -54,14 +75,14 @@ static inline int i8259_irq(void)
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* significant bit is not set then there is no valid
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* interrupt.
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*/
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outb(0x0B, 0x20); /* ISR register */
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if(~inb(0x20) & 0x80)
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outb(0x0B, PIC_MASTER_ISR); /* ISR register */
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if(~inb(PIC_MASTER_ISR) & 0x80)
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irq = -1;
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}
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spin_unlock(&i8259A_lock);
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return irq;
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return likely(irq >= 0) ? irq + I8259A_IRQ_BASE : irq;
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}
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#endif /* _ASM_I8259_H */
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