From 09029330103e9e116c063c48dd14916102103ff6 Mon Sep 17 00:00:00 2001 From: Vatsal Bucha Date: Thu, 23 Sep 2021 16:54:44 +0530 Subject: [PATCH 1/2] ASoC: wcd937x: Add change to micbias reg for new tanggu fab id Add change to micbias reg for new tanggu fab id. Change-Id: I9bfa54c6ee3b87db56e72c1fefb4d4f0db461f14 Signed-off-by: Vatsal Bucha --- asoc/codecs/wcd937x/wcd937x.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/asoc/codecs/wcd937x/wcd937x.c b/asoc/codecs/wcd937x/wcd937x.c index 37cf1fd9c64f..34738d74c212 100644 --- a/asoc/codecs/wcd937x/wcd937x.c +++ b/asoc/codecs/wcd937x/wcd937x.c @@ -178,6 +178,12 @@ static int wcd937x_init_reg(struct snd_soc_component *component) 0xFF, 0xFA); snd_soc_component_update_bits(component, WCD937X_MICB3_TEST_CTL_1, 0xFF, 0xFA); + snd_soc_component_update_bits(component, WCD937X_MICB1_TEST_CTL_2, + 0x38, 0x00); + snd_soc_component_update_bits(component, WCD937X_MICB2_TEST_CTL_2, + 0x38, 0x00); + snd_soc_component_update_bits(component, WCD937X_MICB3_TEST_CTL_2, + 0x38, 0x00); /* Set Bandgap Fine Adjustment to +5mV for Tanggu SMIC part */ if (snd_soc_component_read32(component, WCD937X_DIGITAL_EFUSE_REG_16) == 0x01) { From 7ebd7201308af4518b9ecc24ca6f7d9019f93313 Mon Sep 17 00:00:00 2001 From: Vatsal Bucha Date: Wed, 15 Sep 2021 12:13:44 +0530 Subject: [PATCH 2/2] ASoC: wcd937x: Update register value for new fab id for tanggu Improve HPH ULP mode SNDR stability for new tanggu fab id. Change-Id: I13594dbd311bbeab115753e0bec1a748158f8100 Signed-off-by: Vatsal Bucha --- asoc/codecs/wcd937x/wcd937x.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/asoc/codecs/wcd937x/wcd937x.c b/asoc/codecs/wcd937x/wcd937x.c index 34738d74c212..98b5d3d11e89 100644 --- a/asoc/codecs/wcd937x/wcd937x.c +++ b/asoc/codecs/wcd937x/wcd937x.c @@ -178,12 +178,6 @@ static int wcd937x_init_reg(struct snd_soc_component *component) 0xFF, 0xFA); snd_soc_component_update_bits(component, WCD937X_MICB3_TEST_CTL_1, 0xFF, 0xFA); - snd_soc_component_update_bits(component, WCD937X_MICB1_TEST_CTL_2, - 0x38, 0x00); - snd_soc_component_update_bits(component, WCD937X_MICB2_TEST_CTL_2, - 0x38, 0x00); - snd_soc_component_update_bits(component, WCD937X_MICB3_TEST_CTL_2, - 0x38, 0x00); /* Set Bandgap Fine Adjustment to +5mV for Tanggu SMIC part */ if (snd_soc_component_read32(component, WCD937X_DIGITAL_EFUSE_REG_16) == 0x01) { @@ -195,6 +189,10 @@ static int wcd937x_init_reg(struct snd_soc_component *component) WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L, 0x1F, 0x04); snd_soc_component_update_bits(component, WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R, 0x1F, 0x04); + snd_soc_component_update_bits(component, + WCD937X_BIAS_VBG_FINE_ADJ, 0xF0, 0xB0); + snd_soc_component_update_bits(component, + WCD937X_RX_BIAS_HPH_LOWPOWER, 0xF0, 0x90); } return 0; }