From 2cc43ca94216b194cd41afbbdee52b05ea892914 Mon Sep 17 00:00:00 2001 From: Taniya Das Date: Fri, 30 Oct 2020 15:25:03 +0530 Subject: [PATCH] clk: qcom: gdsc-regulator: Extend the support for ACD reset In the case where the SW reset requires an additional ACD block reset or misc reset, the support is added for the same. Change-Id: I29b69f2a4ccc33a896ec8e201cbe761cca6800ea Signed-off-by: Taniya Das --- drivers/clk/qcom/gdsc-regulator.c | 35 +++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/drivers/clk/qcom/gdsc-regulator.c b/drivers/clk/qcom/gdsc-regulator.c index 2c5e253f640b..9f1e9e61054e 100644 --- a/drivers/clk/qcom/gdsc-regulator.c +++ b/drivers/clk/qcom/gdsc-regulator.c @@ -57,6 +57,8 @@ struct gdsc { struct regmap *domain_addr; struct regmap *hw_ctrl; struct regmap *sw_reset; + struct regmap *acd_reset; + struct regmap *acd_misc_reset; struct collapse_vote collapse_vote; struct clk **clocks; struct reset_control **reset_clocks; @@ -195,6 +197,13 @@ static int gdsc_enable(struct regulator_dev *rdev) regmap_read(sc->sw_reset, REG_OFFSET, ®val); regval |= BCR_BLK_ARES_BIT; regmap_write(sc->sw_reset, REG_OFFSET, regval); + + if (sc->acd_reset) + regmap_write(sc->acd_reset, REG_OFFSET, regval); + + if (sc->acd_misc_reset) + regmap_write(sc->acd_misc_reset, REG_OFFSET, regval); + /* * BLK_ARES should be kept asserted for 1us before * being de-asserted. @@ -204,6 +213,13 @@ static int gdsc_enable(struct regulator_dev *rdev) regval &= ~BCR_BLK_ARES_BIT; regmap_write(sc->sw_reset, REG_OFFSET, regval); + + if (sc->acd_reset) + regmap_write(sc->acd_reset, REG_OFFSET, regval); + + if (sc->acd_misc_reset) + regmap_write(sc->acd_misc_reset, REG_OFFSET, regval); + /* Make sure de-assert goes through before continuing */ gdsc_mb(sc); } @@ -357,6 +373,12 @@ static int gdsc_disable(struct regulator_dev *rdev) udelay(1); if (sc->toggle_logic) { + if (sc->sw_reset) { + if (sc->acd_misc_reset) + regmap_update_bits(sc->acd_misc_reset, REG_OFFSET, + BCR_BLK_ARES_BIT, BCR_BLK_ARES_BIT); + } + /* Disable gdsc */ if (sc->collapse_vote.regmap) { regmap_update_bits(sc->collapse_vote.regmap, REG_OFFSET, @@ -582,6 +604,19 @@ static int gdsc_parse_dt_data(struct gdsc *sc, struct device *dev, return PTR_ERR(sc->sw_reset); } + if (of_find_property(dev->of_node, "acd-reset", NULL)) { + sc->acd_reset = syscon_regmap_lookup_by_phandle(dev->of_node, + "acd-reset"); + if (IS_ERR(sc->acd_reset)) + return PTR_ERR(sc->acd_reset); + } + + if (of_find_property(dev->of_node, "acd-misc-reset", NULL)) { + sc->acd_misc_reset = syscon_regmap_lookup_by_phandle(dev->of_node, + "acd-misc-reset"); + if (IS_ERR(sc->acd_misc_reset)) + return PTR_ERR(sc->acd_misc_reset); + } if (of_find_property(dev->of_node, "hw-ctrl-addr", NULL)) { sc->hw_ctrl = syscon_regmap_lookup_by_phandle(dev->of_node, "hw-ctrl-addr");