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bindings: Documentation: add documentation for VDC-m hw block
Add the documentation for configuring the VDC-m hw block present in the DPU. Change-Id: I5671d5a1f66517a636396637686de614181b4556
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@ -104,6 +104,7 @@ Optional properties:
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- qcom,sde-dspp-size: A u32 value indicates the address range for each dspp.
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- qcom,sde-intf-size: A u32 value indicates the address range for each intf.
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- qcom,sde-dsc-size: A u32 value indicates the address range for each dsc.
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- qcom,sde-vdc-size: A u32 value indicates the address range for each vdc.
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- qcom,sde-cdm-size: A u32 value indicates the address range for each cdm.
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- qcom,sde-pp-size: A u32 value indicates the address range for each pingpong.
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- qcom,sde-merge-3d-size: A u32 value indicates the address range for each merge 3d.
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@ -186,6 +187,7 @@ Optional properties:
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- qcom,sde-smart-dma-rev: A string entry indicating the smart dma version
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supported on the device. Supported entries are
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"smart_dma_v1" and "smart_dma_v2".
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- qcom,sde-vdc-hw-rev: A string indicating the hw version of vdc.
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- qcom,sde-intf-type: Array of string provides the interface type information.
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Possible string values
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"dsi" - dsi display interface
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@ -227,6 +229,13 @@ Optional properties:
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- qcom,sde-dsc-native422-supp: Array of flags indicating whether corresponding dsc
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block can support native 422 and native 420
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encoding.
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- qcom,sde-vdc-off: A u32 offset address for the available vdc blocks.
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This offset is calculated from register "mdp_phys"
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defined in reg property.
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- qcom,sde-vdc-enc: A u32 offset address for the vdc encoder block. This offset is
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calculated from qcom,sde-vdc-off.
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- qcom,sde-vdc-ctl: A u32 offset address for the vdc ctl block. This offset is
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calculated from qcom,sde-vdc-off.
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- qcom,sde-qdss-off: A u32 offset indicates the qdss block offset.
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- qcom,sde-dither-off: A u32 offset indicates the dither block offset on pingpong.
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- qcom,sde-dither-version: A u32 value indicates the dither block version.
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@ -602,6 +611,11 @@ Example:
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qcom,sde-pp-slave = <0x0 0x0 0x0 0x0>;
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qcom,sde-cdm-off = <0x0007a200>;
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qcom,sde-dsc-off = <0x00081000 0x00081400>;
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qcom,sde-vdc-off = <0x7C000>;
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qcom,sde-vdc-size = <0xf10>;
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qcom,sde-vdc-hw-rev = "vdc_1_1";
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qcom,sde-vdc-enc = <0x200>;
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qcom,sde-vdc-ctl = <0xf00>;
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qcom,sde-intf-max-prefetch-lines = <0x15 0x15 0x15 0x15>;
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qcom,sde-mixer-pair-mask = <2 1 6 0 0 3>;
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