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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-30 03:27:44 -04:00
Merge branch 'pci/pm' into next
* pci/pm: PCI/PM: Avoid using device_may_wakeup() for runtime PM x86/PCI: Avoid AMD SB7xx EHCI USB wakeup defect PCI/PM: Restore the status of PCI devices across hibernation drm/radeon: make MacBook Pro d3_delay quirk more generic drm/amdgpu: remove unnecessary save/restore of pdev->d3_delay PCI/PM: Add needs_resume flag to avoid suspend complete optimization PCI: imx6: Fix config read timeout handling switchtec: Fix minor bug with partition ID register switchtec: Use new cdev_device_add() helper function PCI: endpoint: Make PCI_ENDPOINT depend on HAS_DMA
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commit
2cf816a947
10 changed files with 86 additions and 38 deletions
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@ -252,7 +252,34 @@ static void imx6_pcie_reset_phy(struct imx6_pcie *imx6_pcie)
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static int imx6q_pcie_abort_handler(unsigned long addr,
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unsigned int fsr, struct pt_regs *regs)
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{
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return 0;
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unsigned long pc = instruction_pointer(regs);
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unsigned long instr = *(unsigned long *)pc;
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int reg = (instr >> 12) & 15;
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/*
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* If the instruction being executed was a read,
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* make it look like it read all-ones.
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*/
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if ((instr & 0x0c100000) == 0x04100000) {
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unsigned long val;
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if (instr & 0x00400000)
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val = 255;
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else
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val = -1;
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regs->uregs[reg] = val;
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regs->ARM_pc += 4;
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return 0;
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}
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if ((instr & 0x0e100090) == 0x00100090) {
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regs->uregs[reg] = -1;
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regs->ARM_pc += 4;
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return 0;
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}
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return 1;
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}
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static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
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@ -819,8 +846,8 @@ static int __init imx6_pcie_init(void)
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* we can install the handler here without risking it
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* accessing some uninitialized driver state.
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*/
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hook_fault_code(16 + 6, imx6q_pcie_abort_handler, SIGBUS, 0,
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"imprecise external abort");
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hook_fault_code(8, imx6q_pcie_abort_handler, SIGBUS, 0,
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"external abort on non-linefetch");
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return platform_driver_register(&imx6_pcie_driver);
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}
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@ -6,6 +6,7 @@ menu "PCI Endpoint"
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config PCI_ENDPOINT
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bool "PCI Endpoint Support"
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depends on HAS_DMA
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help
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Enable this configuration option to support configurable PCI
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endpoint. This should be enabled if the platform has a PCI
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@ -964,6 +964,7 @@ static int pci_pm_thaw_noirq(struct device *dev)
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return pci_legacy_resume_early(dev);
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pci_update_current_state(pci_dev, PCI_D0);
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pci_restore_state(pci_dev);
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if (drv && drv->pm && drv->pm->thaw_noirq)
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error = drv->pm->thaw_noirq(dev);
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@ -1960,12 +1960,13 @@ EXPORT_SYMBOL(pci_wake_from_d3);
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/**
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* pci_target_state - find an appropriate low power state for a given PCI dev
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* @dev: PCI device
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* @wakeup: Whether or not wakeup functionality will be enabled for the device.
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*
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* Use underlying platform code to find a supported low power state for @dev.
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* If the platform can't manage @dev, return the deepest state from which it
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* can generate wake events, based on any available PME info.
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*/
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static pci_power_t pci_target_state(struct pci_dev *dev)
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static pci_power_t pci_target_state(struct pci_dev *dev, bool wakeup)
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{
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pci_power_t target_state = PCI_D3hot;
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@ -2002,7 +2003,7 @@ static pci_power_t pci_target_state(struct pci_dev *dev)
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if (dev->current_state == PCI_D3cold)
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target_state = PCI_D3cold;
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if (device_may_wakeup(&dev->dev)) {
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if (wakeup) {
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/*
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* Find the deepest state from which the device can generate
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* wake-up events, make it the target state and enable device
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@ -2028,13 +2029,14 @@ static pci_power_t pci_target_state(struct pci_dev *dev)
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*/
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int pci_prepare_to_sleep(struct pci_dev *dev)
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{
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pci_power_t target_state = pci_target_state(dev);
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bool wakeup = device_may_wakeup(&dev->dev);
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pci_power_t target_state = pci_target_state(dev, wakeup);
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int error;
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if (target_state == PCI_POWER_ERROR)
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return -EIO;
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pci_enable_wake(dev, target_state, device_may_wakeup(&dev->dev));
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pci_enable_wake(dev, target_state, wakeup);
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error = pci_set_power_state(dev, target_state);
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@ -2067,9 +2069,10 @@ EXPORT_SYMBOL(pci_back_from_sleep);
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*/
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int pci_finish_runtime_suspend(struct pci_dev *dev)
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{
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pci_power_t target_state = pci_target_state(dev);
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pci_power_t target_state;
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int error;
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target_state = pci_target_state(dev, device_can_wakeup(&dev->dev));
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if (target_state == PCI_POWER_ERROR)
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return -EIO;
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@ -2105,8 +2108,8 @@ bool pci_dev_run_wake(struct pci_dev *dev)
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if (!dev->pme_support)
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return false;
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/* PME-capable in principle, but not from the intended sleep state */
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if (!pci_pme_capable(dev, pci_target_state(dev)))
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/* PME-capable in principle, but not from the target power state */
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if (!pci_pme_capable(dev, pci_target_state(dev, false)))
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return false;
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while (bus->parent) {
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@ -2141,10 +2144,12 @@ EXPORT_SYMBOL_GPL(pci_dev_run_wake);
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bool pci_dev_keep_suspended(struct pci_dev *pci_dev)
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{
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struct device *dev = &pci_dev->dev;
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bool wakeup = device_may_wakeup(dev);
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if (!pm_runtime_suspended(dev)
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|| pci_target_state(pci_dev) != pci_dev->current_state
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|| platform_pci_need_resume(pci_dev))
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|| pci_target_state(pci_dev, wakeup) != pci_dev->current_state
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|| platform_pci_need_resume(pci_dev)
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|| (pci_dev->dev_flags & PCI_DEV_FLAGS_NEEDS_RESUME))
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return false;
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/*
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@ -2160,7 +2165,7 @@ bool pci_dev_keep_suspended(struct pci_dev *pci_dev)
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spin_lock_irq(&dev->power.lock);
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if (pm_runtime_suspended(dev) && pci_dev->current_state < PCI_D3cold &&
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!device_may_wakeup(dev))
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!wakeup)
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__pci_pme_active(pci_dev, false);
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spin_unlock_irq(&dev->power.lock);
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@ -1684,6 +1684,19 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2609, quirk_intel_pcie_pm);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x260a, quirk_intel_pcie_pm);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x260b, quirk_intel_pcie_pm);
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static void quirk_radeon_pm(struct pci_dev *dev)
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{
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if (dev->subsystem_vendor == PCI_VENDOR_ID_APPLE &&
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dev->subsystem_device == 0x00e2) {
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if (dev->d3_delay < 20) {
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dev->d3_delay = 20;
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dev_info(&dev->dev, "extending delay after power-on from D3 to %d msec\n",
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dev->d3_delay);
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}
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}
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x6741, quirk_radeon_pm);
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#ifdef CONFIG_X86_IO_APIC
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static int dmi_disable_ioapicreroute(const struct dmi_system_id *d)
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{
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@ -1291,7 +1291,6 @@ static struct switchtec_dev *stdev_create(struct pci_dev *pdev)
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cdev = &stdev->cdev;
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cdev_init(cdev, &switchtec_fops);
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cdev->owner = THIS_MODULE;
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cdev->kobj.parent = &dev->kobj;
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return stdev;
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@ -1442,12 +1441,15 @@ static int switchtec_init_pci(struct switchtec_dev *stdev,
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stdev->mmio_sys_info = stdev->mmio + SWITCHTEC_GAS_SYS_INFO_OFFSET;
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stdev->mmio_flash_info = stdev->mmio + SWITCHTEC_GAS_FLASH_INFO_OFFSET;
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stdev->mmio_ntb = stdev->mmio + SWITCHTEC_GAS_NTB_OFFSET;
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stdev->partition = ioread8(&stdev->mmio_ntb->partition_id);
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stdev->partition = ioread8(&stdev->mmio_sys_info->partition_id);
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stdev->partition_count = ioread8(&stdev->mmio_ntb->partition_count);
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stdev->mmio_part_cfg_all = stdev->mmio + SWITCHTEC_GAS_PART_CFG_OFFSET;
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stdev->mmio_part_cfg = &stdev->mmio_part_cfg_all[stdev->partition];
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stdev->mmio_pff_csr = stdev->mmio + SWITCHTEC_GAS_PFF_CSR_OFFSET;
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if (stdev->partition_count < 1)
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stdev->partition_count = 1;
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init_pff(stdev);
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pci_set_drvdata(pdev, stdev);
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@ -1479,11 +1481,7 @@ static int switchtec_pci_probe(struct pci_dev *pdev,
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SWITCHTEC_EVENT_EN_IRQ,
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&stdev->mmio_part_cfg->mrpc_comp_hdr);
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rc = cdev_add(&stdev->cdev, stdev->dev.devt, 1);
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if (rc)
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goto err_put;
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rc = device_add(&stdev->dev);
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rc = cdev_device_add(&stdev->cdev, &stdev->dev);
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if (rc)
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goto err_devadd;
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@ -1492,7 +1490,6 @@ static int switchtec_pci_probe(struct pci_dev *pdev,
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return 0;
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err_devadd:
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cdev_del(&stdev->cdev);
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stdev_kill(stdev);
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err_put:
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ida_simple_remove(&switchtec_minor_ida, MINOR(stdev->dev.devt));
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@ -1506,8 +1503,7 @@ static void switchtec_pci_remove(struct pci_dev *pdev)
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pci_set_drvdata(pdev, NULL);
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device_del(&stdev->dev);
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cdev_del(&stdev->cdev);
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cdev_device_del(&stdev->cdev, &stdev->dev);
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ida_simple_remove(&switchtec_minor_ida, MINOR(stdev->dev.devt));
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dev_info(&stdev->dev, "unregistered.\n");
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