A-Team_Digital_Solutions/android_kernel_motorola_sm6375
Watch
2
0
Fork
You've already forked android_kernel_motorola_sm6375
 0
mirror of https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git synced 2026-10-29 19:21:31 -04:00
Code Issues Projects Releases Packages Wiki Activity

Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux

Browse source 
Pull thermal managament updates from Zhang Rui:

 - Enhance thermal "userspace" governor to export the reason when a
   thermal event is triggered and delivered to user space. From Srinivas
   Pandruvada

 - Introduce a single TSENS thermal driver for the different versions of
   the TSENS IP that exist, on different qcom msm/apq SoCs'. Support for
   msm8916, msm8960, msm8974 and msm8996 families is also added. From
   Rajendra Nayak

 - Introduce hardware-tracked trip points support to the device tree
   thermal sensor framework. The framework supports an arbitrary number
   of trip points. Whenever the current temperature is changed, the trip
   points immediately below and above the current temperature are found,
   driver callback is invoked to program the hardware to get notified
   when either of the two trip points are triggered. Hardware-tracked
   trip points support for rockchip thermal driver is also added at the
   same time. From Sascha Hauer, Caesar Wang

 - Introduce a new thermal driver, which enables TMU (Thermal Monitor
   Unit) on QorIQ platform. From Jia Hongtao

 - Introduce a new thermal driver for Maxim MAX77620. From Laxman
   Dewangan

 - Introduce a new thermal driver for Intel platforms using WhiskeyCove
   PMIC. From Bin Gao

 - Add mt2701 chip support to MTK thermal driver. From Dawei Chien

 - Enhance Tegra thermal driver to enable soctherm node and set
   "critical", "hot" trips, for Tegra124, Tegra132, Tegra210. From Wei
   Ni

 - Add resume support for tango thermal driver. From Marc Gonzalez

 - several small fixes and improvements for rockchip, qcom, imx, rcar,
   mtk thermal drivers and thermal core code. From Caesar Wang, Keerthy,
   Rocky Hao, Wei Yongjun, Peter Robinson, Bui Duc Phuc, Axel Lin, Hugh
   Kang

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux: (48 commits)
  thermal: int3403: Process trip change notification
  thermal: int340x: New Interface to read trip and notify
  thermal: user_space gov: Add additional information in uevent
  thermal: Enhance thermal_zone_device_update for events
  arm64: tegra: set hot trips for Tegra210
  arm64: tegra: set critical trips for Tegra210
  arm64: tegra: add soctherm node for Tegra210
  arm64: tegra: set hot trips for Tegra132
  arm64: tegra: set critical trips for Tegra132
  arm64: tegra: use tegra132-soctherm for Tegra132
  arm: tegra: set hot trips for Tegra124
  arm: tegra: set critical trips for Tegra124
  thermal: tegra: add hw-throttle for Tegra132
  thermal: tegra: add hw-throttle function
  of: Add bindings of hw throttle for Tegra soctherm
  thermal: mtk_thermal: Check return value of devm_thermal_zone_of_sensor_register
  thermal: Add Mediatek thermal driver for mt2701.
  dt-bindings: thermal: Add binding document for Mediatek thermal controller
  thermal: max77620: Add thermal driver for reporting junction temp
  thermal: max77620: Add DT binding doc for thermal driver
  ...
This commit is contained in:
Linus Torvalds 2016-10-12 11:05:23 -07:00
commit 2d2474a194
57 changed files with 4021 additions and 222 deletions
Download patch file Download diff file Expand all files Collapse all files

70
Documentation/devicetree/bindings/thermal/max77620_thermal.txt Normal file
View file

@ -0,0 +1,70 @@
Thermal driver for MAX77620 Power management IC from Maxim Semiconductor.
Maxim Semiconductor MAX77620 supports alarm interrupts when its
die temperature crosses 120C and 140C. These threshold temperatures
are not configurable. Device does not provide the real temperature
of die other than just indicating whether temperature is above or
below threshold level.
Required properties:
-------------------
#thermal-sensor-cells: Please refer <devicetree/bindings/thermal/thermal.txt>
for more details.
The value must be 0.
For more details, please refer generic thermal DT binding document
<devicetree/bindings/thermal/thermal.txt>.
Please refer <devicetree/bindings/mfd/max77620.txt> for mfd DT binding
document for the MAX77620.
Example:
--------
#include <dt-bindings/mfd/max77620.h>
#include <dt-bindings/thermal/thermal.h>
...
i2c@7000d000 {
spmic: max77620@3c {
compatible = "maxim,max77620";
:::::
#thermal-sensor-cells = <0>;
:::
};
};
cool_dev: cool-dev {
compatible = "cooling-dev";
#cooling-cells = <2>;
};
thermal-zones {
PMIC-Die {
polling-delay = <0>;
polling-delay-passive = <0>;
thermal-sensors = <&spmic>;
trips {
pmic_die_warn_temp_thresh: hot-die {
temperature = <120000>;
type = "hot";
hysteresis = <0>;
};
pmic_die_cirt_temp_thresh: cirtical-die {
temperature = <140000>;
type = "critical";
hysteresis = <0>;
};
};
cooling-maps {
map0 {
trip = <&pmic_die_warn_temp_thresh>;
cooling-device = <&cool_dev THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
contribution = <100>;
};
};
};
};

4
Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
View file

@ -8,7 +8,9 @@ apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
is also needed.
Required properties:
- compatible: "mediatek,mt8173-thermal"
- compatible:
- "mediatek,mt8173-thermal" : For MT8173 family of SoCs
- "mediatek,mt2701-thermal" : For MT2701 family of SoCs
- reg: Address range of the thermal controller
- interrupts: IRQ for the thermal controller
- clocks, clock-names: Clocks needed for the thermal controller. required

121
Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt
View file

@ -10,8 +10,14 @@ Required properties :
- compatible : For Tegra124, must contain "nvidia,tegra124-soctherm".
For Tegra132, must contain "nvidia,tegra132-soctherm".
For Tegra210, must contain "nvidia,tegra210-soctherm".
- reg : Should contain 1 entry:
- reg : Should contain at least 2 entries for each entry in reg-names:
- SOCTHERM register set
- Tegra CAR register set: Required for Tegra124 and Tegra210.
- CCROC register set: Required for Tegra132.
- reg-names : Should contain at least 2 entries:
- soctherm-reg
- car-reg
- ccroc-reg
- interrupts : Defines the interrupt used by SOCTHERM
- clocks : Must contain an entry for each entry in clock-names.
See ../clocks/clock-bindings.txt for details.
@ -25,17 +31,45 @@ Required properties :
- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
of this property. See <dt-bindings/thermal/tegra124-soctherm.h> for a
list of valid values when referring to thermal sensors.
- throttle-cfgs: A sub-node which is a container of configuration for each
hardware throttle events. These events can be set as cooling devices.
* throttle events: Sub-nodes must be named as "light" or "heavy".
Properties:
- nvidia,priority: Each throttles has its own throttle settings, so the
SW need to set priorities for various throttle, the HW arbiter can select
the final throttle settings.
Bigger value indicates higher priority, In general, higher priority
translates to lower target frequency. SW needs to ensure that critical
thermal alarms are given higher priority, and ensure that there is
no race if priority of two vectors is set to the same value.
The range of this value is 1~100.
- nvidia,cpu-throt-percent: This property is for Tegra124 and Tegra210.
It is the throttling depth of pulse skippers, it's the percentage
throttling.
- nvidia,cpu-throt-level: This property is only for Tegra132, it is the
level of pulse skippers, which used to throttle clock frequencies. It
indicates cpu clock throttling depth, and the depth can be programmed.
Must set as following values:
TEGRA_SOCTHERM_THROT_LEVEL_LOW, TEGRA_SOCTHERM_THROT_LEVEL_MED
TEGRA_SOCTHERM_THROT_LEVEL_HIGH, TEGRA_SOCTHERM_THROT_LEVEL_NONE
- #cooling-cells: Should be 1. This cooling device only support on/off state.
See ./thermal.txt for a description of this property.
Note:
- the "critical" type trip points will be set to SOC_THERM hardware as the
shut down temperature. Once the temperature of this thermal zone is higher
than it, the system will be shutdown or reset by hardware.
- the "hot" type trip points will be set to SOC_THERM hardware as the throttle
temperature. Once the the temperature of this thermal zone is higher
than it, it will trigger the HW throttle event.
Example :
soctherm@700e2000 {
compatible = "nvidia,tegra124-soctherm";
reg = <0x0 0x700e2000 0x0 0x1000>;
reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */
0x0 0x60006000 0x0 0x400 /* CAR reg_base */
reg-names = "soctherm-reg", "car-reg";
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
<&tegra_car TEGRA124_CLK_SOC_THERM>;
@ -44,6 +78,76 @@ Example :
reset-names = "soctherm";
#thermal-sensor-cells = <1>;
throttle-cfgs {
/*
* When the "heavy" cooling device triggered,
* the HW will skip cpu clock's pulse in 85% depth
*/
throttle_heavy: heavy {
nvidia,priority = <100>;
nvidia,cpu-throt-percent = <85>;
#cooling-cells = <1>;
};
/*
* When the "light" cooling device triggered,
* the HW will skip cpu clock's pulse in 50% depth
*/
throttle_light: light {
nvidia,priority = <80>;
nvidia,cpu-throt-percent = <50>;
#cooling-cells = <1>;
};
/*
* If these two devices are triggered in same time, the HW throttle
* arbiter will select the highest priority as the final throttle
* settings to skip cpu pulse.
*/
};
};
Example: referring to Tegra132's "reg", "reg-names" and "throttle-cfgs" :
soctherm@700e2000 {
compatible = "nvidia,tegra132-soctherm";
reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */
0x0 0x70040000 0x0 0x200>; /* CCROC reg_base */;
reg-names = "soctherm-reg", "ccroc-reg";
throttle-cfgs {
/*
* When the "heavy" cooling device triggered,
* the HW will skip cpu clock's pulse in HIGH level
*/
throttle_heavy: heavy {
nvidia,priority = <100>;
nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
#cooling-cells = <1>;
};
/*
* When the "light" cooling device triggered,
* the HW will skip cpu clock's pulse in MED level
*/
throttle_light: light {
nvidia,priority = <80>;
nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_MED>;
#cooling-cells = <1>;
};
/*
* If these two devices are triggered in same time, the HW throttle
* arbiter will select the highest priority as the final throttle
* settings to skip cpu pulse.
*/
};
};
Example: referring to thermal sensors :
@ -62,6 +166,19 @@ Example: referring to thermal sensors :
hysteresis = <1000>;
type = "critical";
};
cpu_throttle_trip: throttle-trip {
temperature = <100000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {
map0 {
trip = <&cpu_throttle_trip>;
cooling-device = <&throttle_heavy 1 1>;
};
};
};
};

21
Documentation/devicetree/bindings/thermal/qcom-tsens.txt Normal file
View file

@ -0,0 +1,21 @@
* QCOM SoC Temperature Sensor (TSENS)
Required properties:
- compatible :
- "qcom,msm8916-tsens" : For 8916 Family of SoCs
- "qcom,msm8974-tsens" : For 8974 Family of SoCs
- "qcom,msm8996-tsens" : For 8996 Family of SoCs
- reg: Address range of the thermal registers
- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description.
- Refer to Documentation/devicetree/bindings/nvmem/nvmem.txt to know how to specify
nvmem cells
Example:
tsens: thermal-sensor@900000 {
compatible = "qcom,msm8916-tsens";
reg = <0x4a8000 0x2000>;
nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
nvmem-cell-names = "caldata", "calsel";
#thermal-sensor-cells = <1>;
};