mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-12 07:37:31 -04:00
arm/dts: init dts for Fogo5G NA
init devicetree for Fogo5G NA based on Fogo5G ROW(fogor) Change-Id: Iea5a3c96a6db6cdb0c0b940f2cf4f28925039f75 Reviewed-on: https://gerrit.mot.com/2658396 SME-Granted: SME Approvals Granted SLTApproved: Slta Waiver Reviewed-by: Xiaojun Ji <jixj@motorola.com> Reviewed-by: Huosheng Liao <liaohs@motorola.com> Tested-by: Jira Key Submit-Approved: Jira Key
This commit is contained in:
liyun zhang
panyq6
parent
44f31ec375
commit
2d295f6432
13 changed files with 1983 additions and 0 deletions
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@ -110,6 +110,11 @@ dtbo-$(CONFIG_FOGOR_DTB) += \
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blair-fogor-evb-overlay.dtbo-base := blair-moto-fogor-base.dtb
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dtbo-$(CONFIG_FOGO_DTB) += \
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blair-fogo-evb-overlay.dtbo
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blair-fogo-evb-overlay.dtbo-base := blair-moto-fogo-base.dtb
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dtbo-$(CONFIG_PENANG_DTB) += \
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holi-penang-dvt2-jp-overlay.dtbo \
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524
qcom/blair-fogo-common-overlay.dtsi
Normal file
524
qcom/blair-fogo-common-overlay.dtsi
Normal file
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@ -0,0 +1,524 @@
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/* Copyright (c) 2023, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "holi-audio-fogo-overlay.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/linux-event-codes.h>
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#include "holi-pmic-overlay-pm6125.dtsi"
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#include "holi-thermal-overlay-pm6125.dtsi"
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#include "display/holi-sde-display-mtp-pm6125.dtsi"
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#include "display/blair-sde-display-mtp.dtsi"
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#include "fogo-fps-overlay.dtsi"
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#include "fogo-display.dtsi"
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#include "fogo-touchscreen.dtsi"
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#include "fogo-sensors.dtsi"
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#include "fogo-wl286xx.dtsi"
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#include "moto_therm_sys_temp.dtsi"
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#include "blair-fogo-fmr-overlay.dtsi"
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&wcd937x_codec {
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cdc-vdd-rxtx-supply = <&L9A>;
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cdc-vddpx-supply = <&L9A>;
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qcom,cdc-static-supplies = "cdc-vdd-rxtx",
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"cdc-vddpx";
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/*
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* Overriding cdc-vdd-mic-bias-supply to dummy value
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* to avoid compilation errors as BOB is not definied
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* for pm6125
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*/
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cdc-vdd-mic-bias-supply = <>;
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};
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&pm7250b_vib {
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qcom,vib-ldo-volt-uv = <3000000>;
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qcom,vib-dis-short-long;
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qcom,vib-dis-short-long-val = <70>;
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qcom,vib-ldo-volt-uv-long = <2600000>;
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};
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&tlmm {
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nfc {
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nfc_int_active: nfc_int_active {
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/* active state */
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mux {
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/* GPIO 9: NFC Read Interrupt */
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pins = "gpio9";
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function = "gpio";
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};
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config {
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pins = "gpio9";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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nfc_int_suspend: nfc_int_suspend {
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/* sleep state */
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mux {
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/* GPIO 9: NFC Read Interrupt */
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pins = "gpio9";
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function = "gpio";
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};
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config {
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pins = "gpio9";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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nfc_enable_active: nfc_enable_active {
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mux {
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pins = "gpio48";
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function = "gpio";
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};
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config {
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pins = "gpio48";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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nfc_enable_suspend: nfc_enable_suspend {
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mux {
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pins = "gpio48";
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function = "gpio";
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};
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config {
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pins = "gpio48";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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nfc_clk_req_active: nfc_clk_req_active {
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/* active state */
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mux {
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/* GPIO 7: NFC CLK Req*/
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pins = "gpio7";
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function = "gpio";
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};
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config {
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pins = "gpio7";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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input-enable;
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};
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};
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nfc_clk_req_suspend: nfc_clk_req_suspend {
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/* sleep state */
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mux {
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/* GPIO 7: NFC CLK Req */
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pins = "gpio7";
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function = "gpio";
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};
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config {
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pins = "gpio7";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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input-enable;
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};
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};
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};
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};
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/* Dummy LDO reference */
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&sdhc_1 {
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status = "ok"
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdc1_on>;
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pinctrl-1 = <&sdc1_off>;
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vdd-supply = <&L24A>;
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qcom,vdd-voltage-level = <2960000 2960000>;
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qcom,vdd-current-level = <0 570000>;
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vdd-io-supply = <&L11A>;
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qcom,vdd-io-always-on;
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qcom,vdd-io-lpm-sup;
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qcom,vdd-io-voltage-level = <1800000 1800000>;
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qcom,vdd-io-current-level = <0 325000>;
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};
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&sdhc_2 {
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status = "ok"
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdc2_on>;
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pinctrl-1 = <&sdc2_off>;
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vdd-supply = <&L22A>;
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qcom,vdd-voltage-level = <2960000 2960000>;
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qcom,vdd-current-level = <0 800000>;
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vdd-io-supply = <&L5A>;
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qcom,vdd-io-voltage-level = <1800000 2960000>;
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qcom,vdd-io-current-level = <0 22000>;
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cd-gpios = <&tlmm 94 GPIO_ACTIVE_HIGH>;
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};
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&ufsphy_mem {
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compatible = "qcom,ufs-phy-qmp-v4-yupik";
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vdda-phy-supply = <&L7A>;
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vdda-pll-supply = <&L4A>;
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vdda-phy-max-microamp = <85700>;
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vdda-pll-max-microamp = <18300>;
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status = "ok"
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};
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&ufshc_mem {
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vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
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vdd-hba-fixed-regulator;
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vcc-supply = <&L24A>;
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vcc-voltage-level = <2950000 2960000>;
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vcc-max-microamp = <800000>;
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vccq2-supply = <&L11A>;
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vccq2-max-microamp = <800000>;
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vccq2-voltage-level = <1800000 1800000>;
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qcom,vddp-ref-clk-supply = <&L4A>;
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qcom,vddp-ref-clk-max-microamp = <100>;
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status = "ok"
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};
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&pmk8350_vadc {
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pmk8350_qtm_n_therm {
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reg = <PMK8350_ADC7_AMUX_THM2_100K_PU>;
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label = "pmk8350_qtm_n_therm";
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qcom,ratiometric;
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qcom,hw-settle-time = <200>;
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qcom,pre-scaling = <1 1>;
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};
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pmk8350_qtm_e_therm {
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reg = <PMK8350_ADC7_AMUX_THM4_100K_PU>;
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label = "pmk8350_qtm_e_therm";
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qcom,ratiometric;
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qcom,hw-settle-time = <200>;
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qcom,pre-scaling = <1 1>;
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};
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};
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&pmk8350_adc_tm {
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io-channels = <&pmk8350_vadc PMK8350_ADC7_AMUX_THM1_100K_PU>,
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<&pmk8350_vadc PMK8350_ADC7_AMUX_THM2_100K_PU>,
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<&pmk8350_vadc PMK8350_ADC7_AMUX_THM4_100K_PU>;
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qtm_n__therm {
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reg = <PMK8350_ADC7_AMUX_THM2_100K_PU>;
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qcom,ratiometric;
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qcom,hw-settle-time = <200>;
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};
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qtm_e_therm {
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reg = <PMK8350_ADC7_AMUX_THM4_100K_PU>;
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qcom,ratiometric;
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qcom,hw-settle-time = <200>;
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};
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};
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&pmr735a_gpios {
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camera_therm {
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camera_therm_default:camera_therm_default {
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pins = "gpio3";
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bias-high-impedance;
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};
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};
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};
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&pmr735a_vadc {
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status = "ok"
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pinctrl-names = "default";
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pinctrl-0 = <&camera_therm_default>;
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pmr735a_camera_therm {
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reg = <ADC7_GPIO3_100K_PU>;
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label = "pmr735a_camera_therm";
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qcom,ratiometric;
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qcom,hw-settle-time = <200>;
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qcom,pre-scaling = <1 1>;
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};
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};
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&pmr735a_4{
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pmr735a_adc_tm_iio: adc_tm@3400 {
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compatible = "qcom,adc-tm5-iio";
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reg = <0x3400>;
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#thermal-sensor-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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io-channels = <&pmr735a_vadc ADC7_GPIO3_100K_PU>;
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pmr735a_camera_therm {
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reg = <ADC7_GPIO3_100K_PU>;
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qcom,ratiometric;
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qcom,hw-settle-time = <200>;
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};
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};
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};
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&qupv3_se7_i2c {
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status = "ok"
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#address-cells = <1>;
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#size-cells = <0>;
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sec-nfc@27 {
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compatible = "sec-nfc";
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reg = <0x27>;
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sec-nfc,ven-gpio = <&tlmm 48 0x00>;
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sec-nfc,firm-gpio = <&tlmm 135 0x00>;
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sec-nfc,irq-gpio = <&tlmm 9 0x00>;
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sec-nfc,clk_req-gpio = <&tlmm 7 0x00>;
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interrupt-parent = <&tlmm>;
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interrupts = <9 0>;
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interrupt-names = "nfc_irq";
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pinctrl-names = "nfc_active", "nfc_suspend";
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pinctrl-0 = <&nfc_int_active &nfc_enable_active
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&nfc_clk_req_active>;
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pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend
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&nfc_clk_req_suspend>;
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clock-names = "OSC_NFC";
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};
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};
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&thermal_zones {
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sdm-skin-therm-usr {
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status = "disabled";
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};
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rear-cam-therm-usr {
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status = "disabled";
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};
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camera-therm-usr {
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status = "disabled";
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};
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quiet-therm-usr {
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status = "disabled";
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};
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pa-therm0-usr {
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status = "disabled";
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};
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pa-therm1-usr {
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status = "disabled";
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};
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xo-therm-usr {
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status = "disabled";
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};
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chg-skin-therm-usr {
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status = "disabled";
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};
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msm_therm {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-governor = "user_space";
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thermal-sensors = <&pm6125_adc_tm_iio ADC5_GPIO1_100K_PU>;
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wake-capable-sensor;
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trips {
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active-config0 {
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temperature = <125000>;
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hysteresis = <1000>;
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type = "passive";
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};
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};
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};
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chg_therm {
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polling-delay-passive = <5000>;
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polling-delay = <20000>;
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thermal-governor = "user_space";
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thermal-sensors = <&pm7250b_adc_tm ADC5_AMUX_THM1_100K_PU>;
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wake-capable-sensor;
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trips {
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active-config0 {
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temperature = <125000>;
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hysteresis = <1000>;
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type = "passive";
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};
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};
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};
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cam_flash_therm {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-governor = "user_space";
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thermal-sensors = <&pm6125_adc_tm ADC5_GPIO3_100K_PU>;
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wake-capable-sensor;
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trips {
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active-config0 {
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temperature = <125000>;
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hysteresis = <1000>;
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type = "passive";
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};
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};
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};
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pa_therm2 {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-governor = "user_space";
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thermal-sensors = <&pm6125_adc_tm ADC5_GPIO4_100K_PU>;
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wake-capable-sensor;
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trips {
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active-config0 {
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temperature = <125000>;
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hysteresis = <1000>;
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type = "passive";
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};
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};
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};
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pa_therm1 {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-governor = "user_space";
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thermal-sensors = <&pm6125_adc_tm ADC5_AMUX_THM1_100K_PU>;
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wake-capable-sensor;
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trips {
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active-config0 {
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temperature = <125000>;
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hysteresis = <1000>;
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type = "passive";
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};
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};
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};
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quiet_therm {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-governor = "user_space";
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thermal-sensors = <&pm6125_adc_tm ADC5_AMUX_THM2_100K_PU>;
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wake-capable-sensor;
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trips {
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active-config0 {
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temperature = <125000>;
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hysteresis = <1000>;
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type = "passive";
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};
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active-config1 {
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temperature = <125000>;
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hysteresis = <1000>;
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type = "passive";
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};
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};
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};
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xo_therm {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-governor = "user_space";
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thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM1_100K_PU>;
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wake-capable-sensor;
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trips {
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active-config0 {
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temperature = <125000>;
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hysteresis = <1000>;
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type = "passive";
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};
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};
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};
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qtm_n_therm {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-governor = "user_space";
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thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM2_100K_PU>;
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wake-capable-sensor;
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trips {
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active-config0 {
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temperature = <125000>;
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hysteresis = <1000>;
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||||
type = "passive";
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};
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};
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};
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qtm_e_therm {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-governor = "user_space";
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thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM4_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
soc_usr {
|
||||
polling-delay-passive = <1000>;
|
||||
polling-delay = <0>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&bcl_soc>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
label = "gpio-keys";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&key_vol_up_default>;
|
||||
|
||||
vol_up {
|
||||
label = "volume_up";
|
||||
gpios = <&pmr735a_gpios 1 GPIO_ACTIVE_LOW>;
|
||||
linux,input-type = <1>;
|
||||
linux,code = <KEY_VOLUMEUP>;
|
||||
gpio-key,wakeup;
|
||||
debounce-interval = <15>;
|
||||
linux,can-disable;
|
||||
};
|
||||
};
|
||||
|
||||
ldo_vib {
|
||||
compatible = "moto,vibrator-ldo";
|
||||
moto,vib-ldo-gpio = <&tlmm 100 0x0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
qcom,tz_gpio {
|
||||
compatible = "qcom,tz_gpio";
|
||||
tlmm-tz = <0>,
|
||||
<13>,
|
||||
<14>,
|
||||
<15>,
|
||||
<16>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Primary USB port related QUSB2 PHY */
|
||||
&usb2_phy0 {
|
||||
qcom,param-override-seq =
|
||||
<0xa6 0x6c /* override_x0 */
|
||||
0x25 0x70 /* override_x1 */
|
||||
0x16 0x74>; /* override x2 */
|
||||
};
|
||||
|
||||
24
qcom/blair-fogo-evb-overlay.dts
Normal file
24
qcom/blair-fogo-evb-overlay.dts
Normal file
|
|
@ -0,0 +1,24 @@
|
|||
/* Copyright (c) 2023, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "blair-pm6125-fogo-common-overlay.dtsi"
|
||||
|
||||
/ {
|
||||
model = "fogo";
|
||||
compatible = "qcom,blair-fogo", "qcom,blair-moto", "qcom,blair";
|
||||
qcom,msm-id = <507 0x10000>, <578 0x10000>;
|
||||
qcom,board-id = <0x47 0xA100>, <0x48 0xA100>;
|
||||
};
|
||||
|
||||
48
qcom/blair-fogo-fmr-overlay.dtsi
Normal file
48
qcom/blair-fogo-fmr-overlay.dtsi
Normal file
|
|
@ -0,0 +1,48 @@
|
|||
&tlmm {
|
||||
fm_elna_default: fm_elna_default {
|
||||
mux {
|
||||
pins = "gpio47";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio47";
|
||||
drive_strength = <16>;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
fm_elna_active: fm_elna_active {
|
||||
mux {
|
||||
pins = "gpio47";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio47";
|
||||
drive_strength = <16>;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
fm_elna_suspend: fm_elna_suspend {
|
||||
mux {
|
||||
pins = "gpio47";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio47";
|
||||
drive_strength = <16>;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
fmradio: fm_wcn39x0 {
|
||||
status = "ok"
|
||||
compatible = "moto,fmctrl";
|
||||
pinctrl-names = "default", "elna_active", "elna_suspend";
|
||||
pinctrl-0 = <&fm_elna_default>;
|
||||
pinctrl-1 = <&fm_elna_active>;
|
||||
pinctrl-2 = <&fm_elna_suspend>;
|
||||
};
|
||||
};
|
||||
45
qcom/blair-moto-fogo-base.dts
Normal file
45
qcom/blair-moto-fogo-base.dts
Normal file
|
|
@ -0,0 +1,45 @@
|
|||
/* Copyright (c) 2023, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "blair.dtsi"
|
||||
|
||||
/ {
|
||||
qcom,board-id = <0 0>;
|
||||
channel-id-map = "";
|
||||
/*
|
||||
* Some nodes need labels assigned to appear in __symbols__
|
||||
*/
|
||||
chosen: chosen { };
|
||||
aliases: aliases { };
|
||||
reserved_memory: reserved-memory { };
|
||||
mot_batterydata: qcom,battery-data { };
|
||||
utags: utags { };
|
||||
hw: hw { };
|
||||
};
|
||||
|
||||
&reserved_memory {
|
||||
/delete-node/ ramoops;
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
/delete-node/ nfc;
|
||||
};
|
||||
|
||||
&firmware {
|
||||
/delete-node/ android;
|
||||
};
|
||||
|
||||
&mdss_dsi_phy0 {
|
||||
/delete-property/ qcom,dsi-pll-ssc-en;
|
||||
};
|
||||
22
qcom/blair-pm6125-fogo-common-overlay.dtsi
Normal file
22
qcom/blair-pm6125-fogo-common-overlay.dtsi
Normal file
|
|
@ -0,0 +1,22 @@
|
|||
/* Copyright (c) 2023, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
#include "blair-pm6125-moto-common-overlay.dtsi"
|
||||
#include "blair-fogo-common-overlay.dtsi"
|
||||
#include "fogo-charger.dtsi"
|
||||
|
||||
&pm7250b_charger {
|
||||
dpdm-supply = <&usb2_phy0>;
|
||||
};
|
||||
|
||||
&smb1394 {
|
||||
status = "disabled";
|
||||
};
|
||||
116
qcom/fogo-charger.dtsi
Normal file
116
qcom/fogo-charger.dtsi
Normal file
|
|
@ -0,0 +1,116 @@
|
|||
|
||||
#include <dt-bindings/iio/qti_power_supply_iio.h>
|
||||
|
||||
|
||||
&mot_batterydata {
|
||||
df-serialnum = "SB18D87863";
|
||||
qcom,batt-id-range-pct = <15>;
|
||||
#include "qg-batterydata-qb50-swd-5000mah.dtsi"
|
||||
};
|
||||
|
||||
&pm7250b_charger {
|
||||
#io-channel-cells = <1>;
|
||||
io-channels = <&pm7250b_vadc ADC5_USB_IN_V_16>,
|
||||
<&pm7250b_vadc ADC5_USB_IN_I>,
|
||||
<&pm7250b_vadc ADC5_CHG_TEMP>,
|
||||
<&pm7250b_vadc ADC5_DIE_TEMP>,
|
||||
<&pm7250b_vadc ADC5_AMUX_THM3_100K_PU>,
|
||||
<&pm7250b_vadc ADC5_SBUx>,
|
||||
<&pm7250b_vadc ADC5_VPH_PWR>,
|
||||
<&pm7250b_vadc ADC5_AMUX_THM1_100K_PU>,
|
||||
<&pm7250b_qg PSY_IIO_RESISTANCE_ID>,
|
||||
<&pm7250b_qg PSY_IIO_VOLTAGE_NOW>,
|
||||
<&pm7250b_qg PSY_IIO_TEMP>,
|
||||
<&pm7250b_qg PSY_IIO_CAPACITY>,
|
||||
<&pm7250b_qg PSY_IIO_VOLTAGE_OCV>,
|
||||
<&pm7250b_qg PSY_IIO_VOLTAGE_AVG>,
|
||||
<&pm7250b_qg PSY_IIO_DEBUG_BATTERY>,
|
||||
<&pm7250b_qg PSY_IIO_REAL_CAPACITY>,
|
||||
<&pm7250b_qg PSY_IIO_CC_SOC>,
|
||||
<&pm7250b_qg PSY_IIO_CURRENT_NOW>,
|
||||
<&pm7250b_qg PSY_IIO_VOLTAGE_MAX>,
|
||||
<&pm7250b_qg PSY_IIO_CHARGE_FULL>,
|
||||
<&pm7250b_qg PSY_IIO_CHARGE_COUNTER>,
|
||||
<&pm7250b_qg PSY_IIO_CYCLE_COUNT>,
|
||||
<&pm7250b_qg PSY_IIO_CHARGE_FULL_DESIGN>,
|
||||
<&pm7250b_qg PSY_IIO_TIME_TO_FULL_NOW>;
|
||||
io-channel-names = "usb_in_voltage",
|
||||
"usb_in_current",
|
||||
"chg_temp",
|
||||
"die_temp",
|
||||
"conn_temp",
|
||||
"sbux_res",
|
||||
"vph_voltage",
|
||||
"skin_temp",
|
||||
"resistance_id",
|
||||
"voltage_now",
|
||||
"temp",
|
||||
"capacity",
|
||||
"voltage_ocv",
|
||||
"voltage_avg",
|
||||
"debug_battery",
|
||||
"real_capacity",
|
||||
"cc_soc",
|
||||
"current_now",
|
||||
"voltage_max",
|
||||
"charge_full",
|
||||
"charge_counter",
|
||||
"cycle_count",
|
||||
"charge_full_design",
|
||||
"time_to_full_now";
|
||||
qcom,fcc-max-ua = <4000000>;
|
||||
qcom,fv-max-uv = <4530000>;
|
||||
qcom,dcp-curr-max = <2000000>;
|
||||
qcom,otg-cl-ua = <1500000>;
|
||||
qcom,thermal-mitigation = <4000000 3500000
|
||||
3000000 2500000
|
||||
2000000 1500000
|
||||
1200000 900000
|
||||
600000>;
|
||||
/delete-property/ qcom,fcc-stepping-enable;
|
||||
|
||||
};
|
||||
|
||||
&pm7250b_mmi {
|
||||
qcom,mmi-temp-zones = <0 4200 1000 0>,
|
||||
<10 4250 3000 1000>,
|
||||
<15 0 3000 3000>,
|
||||
<25 0 4000 4000>,
|
||||
<35 0 4000 4000>,
|
||||
<45 0 4000 4000>,
|
||||
<60 4200 4000 0>;
|
||||
qcom,mmi-ffc-zones = <4200 243 534>,
|
||||
<4500 243 534>,
|
||||
<4500 243 534>,
|
||||
<4530 506 960>,
|
||||
<4530 560 1010>,
|
||||
<4530 965 1160>,
|
||||
<4200 243 575>;
|
||||
|
||||
qcom,iterm-ma = <243>;
|
||||
qcom,hvdcp-power-max = <18000>;
|
||||
mmi,enable-factory-mode-aicl;
|
||||
qcom,noffc-chg-iterm = <243>;
|
||||
qcom,noffc-chg-iterm-45c = <670>;
|
||||
qcom,noffc-qg-iterm = <500>;
|
||||
qcom,noffc-max-fv = <4500>;
|
||||
|
||||
};
|
||||
|
||||
&pm7250b_qg {
|
||||
#io-channel-cells = <1>;
|
||||
io-channels = <&pm7250b_vadc ADC5_BAT_THERM_100K_PU>,
|
||||
<&pm7250b_vadc ADC5_BAT_ID_100K_PU>,
|
||||
<&pm7250b_charger PSY_IIO_INPUT_CURRENT_LIMITED>,
|
||||
<&pm7250b_charger PSY_IIO_RECHARGE_SOC>,
|
||||
<&pm7250b_charger PSY_IIO_FORCE_RECHARGE>,
|
||||
<&pm7250b_charger PSY_IIO_CHARGE_DONE>;
|
||||
io-channel-names = "batt-therm",
|
||||
"batt-id",
|
||||
"input_current_limited",
|
||||
"recharge_soc",
|
||||
"force_recharge",
|
||||
"charge_done";
|
||||
qcom,qg-iterm-ma = <500>;
|
||||
};
|
||||
|
||||
274
qcom/fogo-display.dtsi
Normal file
274
qcom/fogo-display.dtsi
Normal file
|
|
@ -0,0 +1,274 @@
|
|||
#include "dsi-panel-mot-dummy-qhd-video.dtsi"
|
||||
#include "dsi-panel-mot-tianma-icnl9916c-652-720x1600-video.dtsi"
|
||||
#include "dsi-panel-mot-tongxingda-ili9883c-652-720x1600-video.dtsi"
|
||||
|
||||
&display_panel_avdd {
|
||||
/delete-property/ gpio;
|
||||
/delete-property/ pinctrl-0;
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
lcd_panel_vddio_default: lcd_panel_vddio_default {
|
||||
mux {
|
||||
pins = "gpio11";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio11";
|
||||
drive-strength = <8>;
|
||||
bias-disable = <0>;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
lcd_panel_avdd_default: lcd_panel_avdd_default {
|
||||
mux {
|
||||
pins = "gpio84";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio84";
|
||||
drive-strength = <8>;
|
||||
bias-disable = <0>;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
lcd_panel_avee_default: lcd_panel_avee_default {
|
||||
mux {
|
||||
pins = "gpio85";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio85";
|
||||
drive-strength = <8>;
|
||||
bias-disable = <0>;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
lcd_panel_vddio: lcd_gpio_regulator@0 {
|
||||
compatible = "qti-regulator-fixed";
|
||||
regulator-name = "lcd_panel_vddio";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-enable-ramp-delay = <233>;
|
||||
gpio = <&tlmm 11 0>;
|
||||
enable-active-high;
|
||||
regulator-boot-on;
|
||||
proxy-supply = <&lcd_panel_vddio>;
|
||||
qcom,proxy-consumer-enable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lcd_panel_vddio_default>;
|
||||
};
|
||||
|
||||
lcd_panel_avdd: lcd_gpio_regulator@1 {
|
||||
compatible = "qti-regulator-fixed";
|
||||
regulator-name = "lcd_panel_avdd";
|
||||
regulator-min-microvolt = <6000000>;
|
||||
regulator-max-microvolt = <6000000>;
|
||||
regulator-enable-ramp-delay = <233>;
|
||||
gpio = <&tlmm 84 0>;
|
||||
enable-active-high;
|
||||
regulator-boot-on;
|
||||
proxy-supply = <&lcd_panel_avdd>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lcd_panel_avdd_default>;
|
||||
};
|
||||
|
||||
lcd_panel_avee: lcd_gpio_regulator@2 {
|
||||
compatible = "qti-regulator-fixed";
|
||||
regulator-name = "lcd_panel_avee";
|
||||
regulator-min-microvolt = <6000000>;
|
||||
regulator-max-microvolt = <6000000>;
|
||||
regulator-enable-ramp-delay = <233>;
|
||||
gpio = <&tlmm 85 0>;
|
||||
enable-active-high;
|
||||
regulator-boot-on;
|
||||
proxy-supply = <&lcd_panel_avee>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lcd_panel_avee_default>;
|
||||
};
|
||||
|
||||
dsi_panel_pwr_supply_fogo: dsi_panel_pwr_supply_fogo{
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
qcom,panel-supply-entry@0 {
|
||||
reg = <0>;
|
||||
qcom,supply-name = "vddio";
|
||||
qcom,supply-min-voltage = <1800000>;
|
||||
qcom,supply-max-voltage = <1904000>;
|
||||
qcom,supply-enable-load = <32000>;
|
||||
qcom,supply-disable-load = <80>;
|
||||
qcom,supply-pre-off-sleep = <2>;
|
||||
};
|
||||
|
||||
qcom,panel-supply-entry@1 {
|
||||
reg = <1>;
|
||||
qcom,supply-name = "lab";
|
||||
qcom,supply-min-voltage = <6000000>;
|
||||
qcom,supply-max-voltage = <6000000>;
|
||||
qcom,supply-enable-load = <100000>;
|
||||
qcom,supply-disable-load = <100>;
|
||||
qcom,supply-pre-on-sleep = <3>;
|
||||
};
|
||||
|
||||
qcom,panel-supply-entry@2 {
|
||||
reg = <2>;
|
||||
qcom,supply-name = "ibb";
|
||||
qcom,supply-min-voltage = <6000000>;
|
||||
qcom,supply-max-voltage = <6000000>;
|
||||
qcom,supply-enable-load = <100000>;
|
||||
qcom,supply-disable-load = <100>;
|
||||
qcom,supply-pre-off-sleep = <3>;
|
||||
qcom,supply-post-on-sleep = <3>;
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
|
||||
&sde_dsi {
|
||||
/delete-property/ lab-supply;
|
||||
/delete-property/ ibb-supply;
|
||||
/delete-property/ vddio-supply;
|
||||
/delete-property/ qcom,dsi-default-panel;
|
||||
/delete-property/ avdd-supply;
|
||||
|
||||
lab-supply = <&lcd_panel_avdd>;
|
||||
ibb-supply = <&lcd_panel_avee>;
|
||||
vddio-supply = <&lcd_panel_vddio>;
|
||||
|
||||
qcom,dsi-default-panel = <&dsi_icnl9916c_hd_plus_120_video>;
|
||||
};
|
||||
|
||||
|
||||
&dsi_icnl9916c_hd_plus_120_video{
|
||||
qcom,platform-te-gpio = <&tlmm 23 0>;
|
||||
qcom,platform-reset-gpio = <&pmr735a_gpios 2 0>;
|
||||
|
||||
qcom,dsi-supported-dfps-list = <120 90 60>;
|
||||
qcom,mdss-dsi-pan-enable-dynamic-fps;
|
||||
qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
|
||||
/*qcom,mdss-dsi-pan-dfps-send-command;*/
|
||||
qcom,mdss-dsi-pan-on-fps = <120>;
|
||||
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_fogo>;
|
||||
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <13>;
|
||||
qcom,mdss-dsi-bl-max-level = <1650>;
|
||||
qcom,mdss-dsi-bl-default-level = <745>;
|
||||
qcom,mdss-brightness-max-level = <1650>;
|
||||
qcom,bklt-dcs-2bytes-enabled;
|
||||
|
||||
qcom,mdss-dsi-no-panel-on-read-support;
|
||||
|
||||
/* qcom,mdss-dsi-panel-hdr-enable;
|
||||
qcom,mdss-dsi-panel-hdr-color-primaries = <14950 15750 34000
|
||||
16000 13000 35500 7000 2500>;
|
||||
qcom,mdss-dsi-panel-peak-brightness = <5000000>;
|
||||
qcom,mdss-dsi-panel-blackness-level = <100>;
|
||||
*/
|
||||
qcom,esd-check-enabled;
|
||||
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
|
||||
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0A];
|
||||
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-panel-status-value = <0x9C>;
|
||||
qcom,mdss-dsi-panel-status-read-length = <1>;
|
||||
|
||||
qcom,mdss-dsi-panel-hbm-is-51cmd;
|
||||
qcom,mdss-dsi-hbm-type = "lcd-dcs-wled";
|
||||
qcom,mdss-dsi-hbm-on-command = [39 01 00 00 00 00 03 51 07 FF];
|
||||
qcom,mdss-dsi-hbm-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-hbm-off-command = [39 01 00 00 00 00 03 51 06 66];
|
||||
qcom,mdss-dsi-hbm-off-command-state = "dsi_lp_mode";
|
||||
|
||||
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
|
||||
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 24 0A 0A 1A 19 09
|
||||
0A 09 02 04 00 1E 0F];
|
||||
|
||||
qcom,display-topology = <1 0 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_ili9883c_hd_plus_120_video{
|
||||
qcom,platform-te-gpio = <&tlmm 23 0>;
|
||||
qcom,platform-reset-gpio = <&pmr735a_gpios 2 0>;
|
||||
|
||||
qcom,dsi-supported-dfps-list = <120 90 60>;
|
||||
qcom,mdss-dsi-pan-enable-dynamic-fps;
|
||||
qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
|
||||
/*qcom,mdss-dsi-pan-dfps-send-command;*/
|
||||
qcom,mdss-dsi-pan-on-fps = <120>;
|
||||
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_fogo>;
|
||||
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <13>;
|
||||
qcom,mdss-dsi-bl-max-level = <1650>;
|
||||
qcom,mdss-dsi-bl-default-level = <745>;
|
||||
qcom,mdss-brightness-max-level = <1650>;
|
||||
qcom,bklt-dcs-2bytes-enabled;
|
||||
|
||||
qcom,mdss-dsi-no-panel-on-read-support;
|
||||
|
||||
/* qcom,mdss-dsi-panel-hdr-enable;
|
||||
qcom,mdss-dsi-panel-hdr-color-primaries = <14950 15750 34000
|
||||
16000 13000 35500 7000 2500>;
|
||||
qcom,mdss-dsi-panel-peak-brightness = <5000000>;
|
||||
qcom,mdss-dsi-panel-blackness-level = <100>;
|
||||
*/
|
||||
qcom,esd-check-enabled;
|
||||
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
|
||||
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0A];
|
||||
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-panel-status-value = <0x9C>;
|
||||
qcom,mdss-dsi-panel-status-read-length = <1>;
|
||||
|
||||
qcom,mdss-dsi-panel-hbm-is-51cmd;
|
||||
qcom,mdss-dsi-hbm-type = "lcd-dcs-wled";
|
||||
qcom,mdss-dsi-hbm-on-command = [39 01 00 00 00 00 03 51 07 FF];
|
||||
qcom,mdss-dsi-hbm-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-hbm-off-command = [39 01 00 00 00 00 03 51 06 66];
|
||||
qcom,mdss-dsi-hbm-off-command-state = "dsi_lp_mode";
|
||||
|
||||
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
|
||||
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 27 0A 0A 1B 19 0A
|
||||
0B 0A 02 04 00 20 0F];
|
||||
|
||||
qcom,display-topology = <1 0 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mot_dummy_vid_qhd {
|
||||
qcom,platform-te-gpio = <&tlmm 23 0>;
|
||||
qcom,platform-reset-gpio = <&pmr735a_gpios 2 0>;
|
||||
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dummy";
|
||||
|
||||
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
|
||||
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 0B 02 02 1C 1C 03
|
||||
02 01 02 04 00 0C 12];
|
||||
qcom,display-topology = <1 0 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
97
qcom/fogo-fps-overlay.dtsi
Normal file
97
qcom/fogo-fps-overlay.dtsi
Normal file
|
|
@ -0,0 +1,97 @@
|
|||
&tlmm {
|
||||
fps_rst_active: fps_rst_active {
|
||||
/* active state */
|
||||
mux {
|
||||
pins = "gpio18";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio18";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
fps_rst_suspend: fps_rst_suspend {
|
||||
/* sleep state */
|
||||
mux {
|
||||
pins = "gpio18";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio18";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
fps_int_active: fps_int_active {
|
||||
/* active state */
|
||||
mux {
|
||||
pins = "gpio17";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio17";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
fps_int_suspend: fps_int_suspend {
|
||||
/* sleep state */
|
||||
mux {
|
||||
pins = "gpio17";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio17";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&L21A {
|
||||
regulator-max-microvolt = <3008000>;
|
||||
qcom,init-voltage = <3000000>;
|
||||
status = "ok"
|
||||
};
|
||||
|
||||
&soc {
|
||||
fpc: fpc_fpc1020 {
|
||||
compatible = "fpc,fpc1020";
|
||||
status = "ok"
|
||||
irq = <&tlmm 17 0>;
|
||||
rst = <&tlmm 18 0>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <17 0>;
|
||||
rgltr-ctrl-support;
|
||||
fp,vdd-supply=<&L21A>;
|
||||
fp,voltage-range = <3000000 3000000>;
|
||||
pinctrl-names = "default", "suspend";
|
||||
pinctrl-0 = <&fps_rst_active &fps_int_active>;
|
||||
pinctrl-1 = <&fps_rst_suspend &fps_int_suspend>;
|
||||
};
|
||||
goodix_fingerprint{
|
||||
//status = "/chosen", "mmi,fps", "true"
|
||||
status = "ok"
|
||||
compatible = "goodix,fingerprint";
|
||||
fp-gpio-reset = <&tlmm 18 0x00>;
|
||||
fp-gpio-irq = <&tlmm 17 0x00>;
|
||||
rgltr-ctrl-support;
|
||||
fp,vdd-supply=<&L21A>;
|
||||
fp,voltage-range = <3000000 3000000>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <17 0>;
|
||||
interrupt-controller;
|
||||
pinctrl-names = "default", "suspend";
|
||||
pinctrl-0 = <&fps_rst_active &fps_int_active>;
|
||||
pinctrl-1 = <&fps_rst_suspend &fps_int_suspend>;
|
||||
};
|
||||
};
|
||||
157
qcom/fogo-sensors.dtsi
Executable file
157
qcom/fogo-sensors.dtsi
Executable file
|
|
@ -0,0 +1,157 @@
|
|||
/*
|
||||
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
&tlmm {
|
||||
pen_int_default: pen_int_default {
|
||||
mux {
|
||||
pins = "gpio84";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio84";
|
||||
num-grp-pins = <1>;
|
||||
drive-strength = <2>;
|
||||
bias-no-pull;
|
||||
};
|
||||
};
|
||||
|
||||
pen_int_sleep: pen_int_sleep {
|
||||
mux {
|
||||
pins = "gpio84";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio84";
|
||||
num-grp-pins = <1>;
|
||||
drive-strength = <2>;
|
||||
bias-no-pull;
|
||||
};
|
||||
};
|
||||
|
||||
sar_int_fogo_default: sar_int_fogo_default {
|
||||
mux {
|
||||
pins = "gpio60";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio60";
|
||||
num-grp-pins = <1>;
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
sar_int_fogo_sleep: sar_int_fogo_sleep {
|
||||
mux {
|
||||
pins = "gpio60";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio60";
|
||||
num-grp-pins = <1>;
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
pen_detect{
|
||||
compatible = "rohm,bu520xx_pen_detect";
|
||||
pinctrl-names = "default","sleep";
|
||||
pinctrl-0 = <&pen_int_default>;
|
||||
pinctrl-1 = <&pen_int_sleep>;
|
||||
rohm,nirq-gpio=<&tlmm 84 0x02>;
|
||||
};
|
||||
};
|
||||
|
||||
&sx937x {
|
||||
pinctrl-names = "default","sleep";
|
||||
pinctrl-0 = <&sar_int_fogo_default>;
|
||||
pinctrl-1 = <&sar_int_fogo_sleep>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <60 0x02>;
|
||||
interrupt-names = "sx937x_irq";
|
||||
Semtech,nirq-gpio = <&tlmm 60 0x02>;
|
||||
reinit-on-i2c-failure = <1>;
|
||||
Semtech,reg-num = <66>;
|
||||
Semtech,reg-init = <
|
||||
0x8024 0x7F00 /*PHEN, Disable all Phases*/
|
||||
0x4004 0x70 /*irq mask*/
|
||||
0x8020 0x32
|
||||
0x8028 0x45F
|
||||
0x8034 0x45F
|
||||
0x8040 0x45F
|
||||
0x804C 0x45F
|
||||
0x8058 0x45F
|
||||
0x8064 0x45E
|
||||
0x8070 0x45E
|
||||
0x807C 0x45E
|
||||
0x8030 0x924925
|
||||
0x803C 0xB24924
|
||||
0x8048 0x924964
|
||||
0x8054 0x925924
|
||||
0x8060 0x964924
|
||||
0x806C 0x92492C
|
||||
0x8078 0x92C924
|
||||
0x8084 0x924924
|
||||
0x8098 0x685A
|
||||
0x80B8 0x2D23
|
||||
0x80D8 0x4D40
|
||||
0x80F8 0x5A47
|
||||
0x8118 0x4637
|
||||
0x8138 0xFF
|
||||
0x8158 0xFF
|
||||
0x8178 0xFF
|
||||
0x80A0 0x20200001
|
||||
0x80C0 0x1A1A0002
|
||||
0x80E0 0x20200001
|
||||
0x8100 0x0
|
||||
0x8120 0x20200002
|
||||
0x8140 0x0
|
||||
0x8160 0x0
|
||||
0x8180 0x0
|
||||
0x8188 0x8000015
|
||||
0x818C 0x8000016
|
||||
0x8190 0x0
|
||||
0x8194 0x0
|
||||
0x8090 0x7C845200
|
||||
0x80B0 0x7C845102
|
||||
0x80D0 0x7C845200
|
||||
0x80F0 0x7C845100
|
||||
0x8110 0x7C845100
|
||||
0x8130 0x54AC5300
|
||||
0x8150 0x54AC5300
|
||||
0x8170 0x54AC5300
|
||||
0x8088 0x300000
|
||||
0x80A8 0x300000
|
||||
0x80C8 0x300000
|
||||
0x80E8 0x300000
|
||||
0x8108 0x300000
|
||||
0x8128 0x300000
|
||||
0x8148 0x300000
|
||||
0x8168 0x300000
|
||||
0x808C 0x60200020
|
||||
0x80AC 0x60200010
|
||||
0x80CC 0x60200020
|
||||
0x80EC 0x60200010
|
||||
0x810C 0x60200010
|
||||
0x812C 0x60200031
|
||||
0x814C 0x60200031
|
||||
0x816C 0x60200031
|
||||
0x8024 0x7F7F
|
||||
0x8274 0x2E040000
|
||||
0x4280 0x0E
|
||||
>;
|
||||
};
|
||||
|
||||
205
qcom/fogo-touchscreen.dtsi
Executable file
205
qcom/fogo-touchscreen.dtsi
Executable file
|
|
@ -0,0 +1,205 @@
|
|||
/*
|
||||
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
&tlmm {
|
||||
touch_int_mux {
|
||||
touch_int_active: active {
|
||||
mux {
|
||||
pins = "gpio22";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio22";
|
||||
drive-strength = <8>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
touch_int_suspend: default {
|
||||
mux {
|
||||
pins = "gpio22";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio22";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pmx_ts_int_suspend_high {
|
||||
ts_int_suspend_high: ts_int_suspend_high {
|
||||
mux {
|
||||
pins = "gpio22";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio22";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
touch_reset_mux {
|
||||
touch_reset_active: active {
|
||||
mux {
|
||||
pins = "gpio21";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio21";
|
||||
drive-strength = <8>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
touch_reset_suspend: default {
|
||||
mux {
|
||||
pins = "gpio21";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio21";
|
||||
drive-strength = <2>;
|
||||
bias-pull-down;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ts_release_mux {
|
||||
ts_release: ts_release {
|
||||
mux {
|
||||
pins = "gpio21", "gpio22";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio21", "gpio22";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&qupv3_se0_i2c {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&L9A {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
qcom,init-voltage = <1800000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&qupv3_se0_spi_pins {
|
||||
qupv3_se0_spi_active: qupv3_se0_spi_active {
|
||||
mux {
|
||||
pins = "gpio0", "gpio1", "gpio2";
|
||||
function = "qup00";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio0", "gpio1", "gpio2";
|
||||
drive-strength = <6>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
|
||||
mux {
|
||||
pins = "gpio0", "gpio1", "gpio2";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio0", "gpio1", "gpio2";
|
||||
drive-strength = <6>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
qupv3_se0_spi_cs_active: qupv3_se0_spi_cs_active {
|
||||
mux {
|
||||
pins = "gpio3";
|
||||
function = "qup00";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio3";
|
||||
drive-strength = <6>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
qupv3_se0_spi_cs_sleep: qupv3_se0_spi_cs_sleep {
|
||||
mux {
|
||||
pins = "gpio3";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio3";
|
||||
drive-strength = <6>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&qupv3_se0_spi {
|
||||
status = "ok"
|
||||
|
||||
pinctrl-0 = <&qupv3_se0_spi_active &qupv3_se0_spi_cs_active>;
|
||||
pinctrl-1 = <&qupv3_se0_spi_sleep &qupv3_se0_spi_cs_sleep>;
|
||||
|
||||
chipone_tddi@0 {
|
||||
compatible = "chipone-tddi";
|
||||
reg = <0x0>;
|
||||
spi-max-frequency = <8000000>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <22 0x2001>;
|
||||
spi-cpha;
|
||||
spi-cpol;
|
||||
chipone,rst-gpio = <&tlmm 21 0x00>;
|
||||
chipone,irq-gpio = <&tlmm 22 0x2001>;
|
||||
chipone,x-res = <720>;
|
||||
chipone,y-res = <1600>;
|
||||
chipone,def-build-id = <0x0101>;
|
||||
chipone,def-config-id = <0x0001>;
|
||||
pinctrl-names = "pmx_ts_int_active","pmx_ts_int_suspend_high";
|
||||
pinctrl-3 = <&ts_active>;
|
||||
pinctrl-4 = <&ts_int_suspend_high>;
|
||||
panel = <&dsi_icnl9916c_hd_plus_120_video>;
|
||||
mmi,status = "/chosen","mmi,panel_name","contains","icnl9916c"
|
||||
status = "ok"
|
||||
};
|
||||
ilitek@1 {
|
||||
compatible = "tchip,ilitek";
|
||||
reg = <0x1>;
|
||||
spi-max-frequency = <8000000>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <22 0x2001>;
|
||||
panel = <&dsi_ili9883c_hd_plus_120_video>;
|
||||
mmi,status = "/chosen","mmi,panel_name","contains","ili9883c"
|
||||
touch,reset-gpio = <&tlmm 21 0x00>;
|
||||
touch,irq-gpio = <&tlmm 22 0x2001>;
|
||||
pinctrl-names = "pmx_ts_int_active","pmx_ts_int_suspend_high";
|
||||
pinctrl-0 = <&ts_active>;
|
||||
pinctrl-1 = <&ts_int_suspend_high>;
|
||||
ilitek,report_gesture_key;
|
||||
status = "ok"
|
||||
};
|
||||
};
|
||||
74
qcom/fogo-wl286xx.dtsi
Normal file
74
qcom/fogo-wl286xx.dtsi
Normal file
|
|
@ -0,0 +1,74 @@
|
|||
&tlmm{
|
||||
pmic1_en_default: pmic1_en_default {
|
||||
mux {
|
||||
pins = "gpio33";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio33";
|
||||
drive-strength = <2>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gcc {
|
||||
qcom,critical-devices = <&qupv3_se10_i2c>;
|
||||
};
|
||||
|
||||
&qupv3_se10_i2c {
|
||||
status = "ok"
|
||||
|
||||
cam_pmic1: wl2864c@29{
|
||||
compatible = "semi,wl2864c";
|
||||
reg = <0x29>;
|
||||
semi,cs-gpios = <&tlmm 33 0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmic1_en_default>;
|
||||
vin1-supply = <&S6A>;
|
||||
|
||||
regulators {
|
||||
cam_pmic1_ldo1_dvdd1: ldo1 {
|
||||
regulator-name = "ldo1";
|
||||
regulator-min-microvolt = <600000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
cam_pmic1_ldo2_dvdd2: ldo2 {
|
||||
regulator-name = "ldo2";
|
||||
regulator-min-microvolt = <600000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
cam_pmic1_ldo3_avdd1: ldo3 {
|
||||
regulator-name = "ldo3";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <4300000>;
|
||||
};
|
||||
|
||||
cam_pmic1_ldo4_avdd2: ldo4 {
|
||||
regulator-name = "ldo4";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <4300000>;
|
||||
};
|
||||
|
||||
cam_pmic1_ldo5_vddaf: ldo5 {
|
||||
regulator-name = "ldo5";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <4300000>;
|
||||
};
|
||||
|
||||
cam_pmic1_ldo6_vddois: ldo6 {
|
||||
regulator-name = "ldo6";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <4300000>;
|
||||
};
|
||||
|
||||
cam_pmic1_ldo7_vddio: ldo7 {
|
||||
regulator-name = "ldo7";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <4300000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
392
qcom/holi-audio-fogo-overlay.dtsi
Normal file
392
qcom/holi-audio-fogo-overlay.dtsi
Normal file
|
|
@ -0,0 +1,392 @@
|
|||
#include <dt-bindings/clock/qcom,audio-ext-clk.h>
|
||||
#include <dt-bindings/sound/qcom,bolero-clk-rsc.h>
|
||||
#include <dt-bindings/sound/audio-codec-port-types.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
&tlmm{
|
||||
fsm_rcv_rst: fsm_rcv_rst {
|
||||
mux {
|
||||
pins = "gpio86";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio86";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-pull-down;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
fsm_spk_rst: fsm_spk_rst {
|
||||
mux {
|
||||
pins = "gpio58";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio58";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-pull-down;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cdc_dmic01_gpios {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&cdc_dmic23_gpios {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&rx_swr_gpios {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dai_mi2s0_rx {
|
||||
status = "okay";
|
||||
qcom,msm-mi2s-lines = <1>;
|
||||
};
|
||||
|
||||
&dai_mi2s0_tx {
|
||||
status = "okay";
|
||||
qcom,msm-mi2s-lines = <0>;
|
||||
};
|
||||
|
||||
&dai_mi2s1_rx {
|
||||
status = "okay";
|
||||
qcom,msm-mi2s-lines = <1>;
|
||||
};
|
||||
|
||||
&dai_mi2s1_tx {
|
||||
status = "okay";
|
||||
qcom,msm-mi2s-lines = <2>;
|
||||
};
|
||||
|
||||
&dai_mi2s2_rx {
|
||||
status = "okay";
|
||||
qcom,msm-mi2s-lines = <1>;
|
||||
};
|
||||
|
||||
&dai_mi2s2_tx {
|
||||
status = "okay";
|
||||
qcom,msm-mi2s-lines = <0>;
|
||||
};
|
||||
|
||||
&dai_mi2s3_rx {
|
||||
status = "okay";
|
||||
qcom,msm-mi2s-lines = <1>;
|
||||
};
|
||||
|
||||
&dai_mi2s3_tx {
|
||||
status = "okay";
|
||||
qcom,msm-mi2s-lines = <0>;
|
||||
};
|
||||
|
||||
&bolero {
|
||||
qcom,num-macros = <3>;
|
||||
qcom,bolero-version = <5>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
bolero-clk-rsc-mngr {
|
||||
compatible = "qcom,bolero-clk-rsc-mngr";
|
||||
qcom,fs-gen-sequence = <0x3000 0x1 0x1>, <0x3004 0x3 0x3>,
|
||||
<0x3004 0x3 0x1>, <0x3080 0x2 0x2>;
|
||||
qcom,rx_mclk_mode_muxsel = <0x0A5640D8>;
|
||||
qcom,va_mclk_mode_muxsel = <0x0A7A0000>;
|
||||
clock-names = "tx_core_clk", "tx_npl_clk", "rx_core_clk", "rx_npl_clk",
|
||||
"va_core_clk", "va_npl_clk";
|
||||
clocks = <&clock_audio_tx_1 0>, <&clock_audio_tx_2 0>,
|
||||
<&clock_audio_rx_1 0>, <&clock_audio_rx_2 0>,
|
||||
<&clock_audio_va_1 0>, <&clock_audio_va_2 0>;
|
||||
};
|
||||
|
||||
va_macro: va-macro@A730000 {
|
||||
compatible = "qcom,va-macro";
|
||||
reg = <0xA730000 0x0>;
|
||||
clock-names = "lpass_audio_hw_vote";
|
||||
clocks = <&lpass_audio_hw_vote 0>;
|
||||
qcom,va-dmic-sample-rate = <600000>;
|
||||
qcom,default-clk-id = <TX_CORE_CLK>;
|
||||
qcom,is-used-swr-gpio = <1>;
|
||||
qcom,va-swr-gpios = <&va_swr_gpios>;
|
||||
swr0: va_swr_master {
|
||||
compatible = "qcom,swr-mstr";
|
||||
qcom,is_wcd937x = <1>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
clock-names = "lpass_audio_hw_vote";
|
||||
clocks = <&lpass_audio_hw_vote 0>;
|
||||
qcom,swr_master_id = <3>;
|
||||
qcom,swrm-hctl-reg = <0x0A7EC100>;
|
||||
qcom,mipi-sdw-block-packing-mode = <1>;
|
||||
swrm-io-base = <0xA740000 0x0>;
|
||||
interrupts-extended =
|
||||
<&wakegic 5 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&tlmm 128 GPIO_ACTIVE_HIGH>;
|
||||
interrupt-names = "swr_master_irq", "swr_wake_irq";
|
||||
qcom,swr-num-ports = <3>;
|
||||
qcom,swr-port-mapping = <1 SWRM_TX1_CH1 0x1>,
|
||||
<1 SWRM_TX1_CH2 0x2>,
|
||||
<1 SWRM_TX1_CH3 0x4>, <1 SWRM_TX1_CH4 0x8>,
|
||||
<2 SWRM_TX2_CH1 0x1>, <2 SWRM_TX2_CH2 0x2>,
|
||||
<2 SWRM_TX2_CH3 0x4>, <2 SWRM_TX2_CH4 0x8>,
|
||||
<3 SWRM_TX3_CH1 0x1>, <3 SWRM_TX3_CH2 0x2>,
|
||||
<3 SWRM_TX3_CH3 0x4>, <3 SWRM_TX3_CH4 0x8>;
|
||||
qcom,swr-num-dev = <1>;
|
||||
qcom,swr-phy-dev-addr = <0x0A 0x01170223>,
|
||||
<0x08 0x58350223>,
|
||||
<0x08 0x58350222>,
|
||||
<0x08 0x58350221>,
|
||||
<0x08 0x58350220>;
|
||||
qcom,swr-clock-stop-mode0 = <1>;
|
||||
qcom,swr-mstr-irq-wakeup-capable = <1>;
|
||||
qcom,is-always-on = <1>;
|
||||
wcd937x_tx_slave: wcd937x-tx-slave {
|
||||
compatible = "qcom,wcd937x-slave";
|
||||
reg = <0x0A 0x01170223>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tx_macro: tx-macro@A620000 {
|
||||
compatible = "qcom,tx-macro";
|
||||
reg = <0xA620000 0x0>;
|
||||
clock-names = "tx_core_clk", "tx_npl_clk";
|
||||
clocks = <&clock_audio_tx_1 0>,
|
||||
<&clock_audio_tx_2 0>;
|
||||
qcom,tx-dmic-sample-rate = <2400000>;
|
||||
qcom,is-used-swr-gpio = <0>;
|
||||
};
|
||||
|
||||
rx_macro: rx-macro@A600000 {
|
||||
compatible = "qcom,rx-macro";
|
||||
reg = <0xA600000 0x0>;
|
||||
clock-names = "rx_core_clk", "rx_npl_clk";
|
||||
clocks = <&clock_audio_rx_1 0>,
|
||||
<&clock_audio_rx_2 0>;
|
||||
qcom,rx-swr-gpios = <&rx_swr_gpios>;
|
||||
qcom,rx_mclk_mode_muxsel = <0xA5640D8>;
|
||||
qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>;
|
||||
qcom,default-clk-id = <TX_CORE_CLK>;
|
||||
swr1: rx_swr_master {
|
||||
compatible = "qcom,swr-mstr";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
clock-names = "lpass_audio_hw_vote";
|
||||
clocks = <&lpass_audio_hw_vote 0>;
|
||||
qcom,swr_master_id = <2>;
|
||||
qcom,swrm-hctl-reg = <0x0A6A9098>;
|
||||
qcom,mipi-sdw-block-packing-mode = <1>;
|
||||
swrm-io-base = <0xA610000 0x0>;
|
||||
interrupts = <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "swr_master_irq";
|
||||
qcom,swr-num-ports = <6>;
|
||||
qcom,swr-port-mapping = <1 HPH_L 0x1>,
|
||||
<1 HPH_R 0x2>, <2 CLSH 0x1>,
|
||||
<3 COMP_L 0x1>, <3 COMP_R 0x2>,
|
||||
<4 LO 0x1>, <5 DSD_L 0x1>,
|
||||
<5 DSD_R 0x2>, <6 PCM_OUT1 0x01>;
|
||||
qcom,swr-num-dev = <1>;
|
||||
qcom,swr-clock-stop-mode0 = <1>;
|
||||
wcd937x_rx_slave: wcd937x-rx-slave {
|
||||
compatible = "qcom,wcd937x-slave";
|
||||
reg = <0x0A 0x01170224>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
wcd937x_codec: wcd937x-codec {
|
||||
compatible = "qcom,wcd937x-codec";
|
||||
qcom,split-codec = <1>;
|
||||
qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>,
|
||||
<0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>,
|
||||
<2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>,
|
||||
<3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>,
|
||||
<4 DSD_R 0x2 0 DSD_R>;
|
||||
qcom,tx_swr_ch_map = <0 ADC1 0x1 0 SWRM_TX1_CH1>,
|
||||
<1 ADC2 0x1 0 SWRM_TX2_CH1>,
|
||||
<1 ADC3 0x2 0 SWRM_TX2_CH2>,
|
||||
<2 DMIC0 0x1 0 SWRM_TX1_CH4>,
|
||||
<2 DMIC1 0x2 0 SWRM_TX2_CH1>,
|
||||
<2 MBHC 0x4 0 SWRM_TX2_CH2>,
|
||||
<3 DMIC2 0x1 0 SWRM_TX2_CH3>,
|
||||
<3 DMIC3 0x2 0 SWRM_TX2_CH4>,
|
||||
<3 DMIC4 0x4 0 SWRM_TX3_CH1>,
|
||||
<3 DMIC5 0x8 0 SWRM_TX3_CH2>;
|
||||
|
||||
qcom,wcd-rst-gpio-node = <&wcd937x_rst_gpio>;
|
||||
qcom,rx-slave = <&wcd937x_rx_slave>;
|
||||
qcom,tx-slave = <&wcd937x_tx_slave>;
|
||||
|
||||
cdc-vdd-rxtx-supply = <&L11A>;
|
||||
qcom,cdc-vdd-rxtx-voltage = <1800000 1800000>;
|
||||
qcom,cdc-vdd-rxtx-current = <30000>;
|
||||
|
||||
cdc-vddpx-supply = <&L11A>;
|
||||
qcom,cdc-vddpx-voltage = <1800000 1800000>;
|
||||
qcom,cdc-vddpx-current = <30000>;
|
||||
|
||||
cdc-vdd-buck-supply = <&L14A>;
|
||||
qcom,cdc-vdd-buck-voltage = <1800000 1800000>;
|
||||
qcom,cdc-vdd-buck-current = <650000>;
|
||||
|
||||
cdc-vdd-mic-bias-supply = <&BOB>;
|
||||
qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>;
|
||||
qcom,cdc-vdd-mic-bias-current = <45000>;
|
||||
|
||||
qcom,cdc-micbias1-mv = <2800>;
|
||||
qcom,cdc-micbias2-mv = <2800>;
|
||||
qcom,cdc-micbias3-mv = <2800>;
|
||||
|
||||
qcom,cdc-static-supplies = "cdc-vdd-rxtx",
|
||||
"cdc-vddpx",
|
||||
"cdc-vdd-mic-bias";
|
||||
qcom,cdc-on-demand-supplies = "cdc-vdd-buck";
|
||||
};
|
||||
};
|
||||
|
||||
&holi_snd {
|
||||
qcom,model = "holi-9370_fs1815-snd-card";
|
||||
qcom,wcn-btfm = <1>;
|
||||
qcom,tdm-max-slots = <4>;
|
||||
qcom,mi2s-audio-intf = <0>;
|
||||
|
||||
qcom,audio-routing =
|
||||
"AMIC1", "Analog Mic1",
|
||||
"Analog Mic1", "MIC BIAS1",
|
||||
"AMIC2", "Analog Mic2",
|
||||
"Analog Mic2", "MIC BIAS2",
|
||||
"AMIC3", "Analog Mic3",
|
||||
"Analog Mic3", "MIC BIAS3",
|
||||
"Analog Mic4", "MIC BIAS3",
|
||||
"TX DMIC0", "Digital Mic0",
|
||||
"TX DMIC0", "MIC BIAS1",
|
||||
"TX DMIC1", "Digital Mic1",
|
||||
"TX DMIC1", "MIC BIAS1",
|
||||
"TX DMIC2", "Digital Mic2",
|
||||
"TX DMIC2", "MIC BIAS3",
|
||||
"TX DMIC3", "Digital Mic3",
|
||||
"TX DMIC3", "MIC BIAS3",
|
||||
"IN1_HPHL", "HPHL_OUT",
|
||||
"IN2_HPHR", "HPHR_OUT",
|
||||
"IN3_AUX", "AUX_OUT",
|
||||
"RX_TX DEC0_INP", "TX DEC0 MUX",
|
||||
"RX_TX DEC1_INP", "TX DEC1 MUX",
|
||||
"RX_TX DEC2_INP", "TX DEC2 MUX",
|
||||
"RX_TX DEC3_INP", "TX DEC3 MUX",
|
||||
"TX SWR_INPUT", "WCD_TX_OUTPUT",
|
||||
"VA SWR_INPUT", "VA_SWR_CLK",
|
||||
"VA SWR_INPUT", "WCD_TX_OUTPUT",
|
||||
"VA_AIF1 CAP", "VA_SWR_CLK",
|
||||
"VA_AIF2 CAP", "VA_SWR_CLK",
|
||||
"VA_AIF3 CAP", "VA_SWR_CLK",
|
||||
"VA DMIC0", "Digital Mic0",
|
||||
"VA DMIC1", "Digital Mic1",
|
||||
"VA DMIC2", "Digital Mic2",
|
||||
"VA DMIC3", "Digital Mic3",
|
||||
"VA DMIC4", "Digital Mic4",
|
||||
"VA DMIC5", "Digital Mic5",
|
||||
"VA DMIC0", "VA MIC BIAS1",
|
||||
"VA DMIC1", "VA MIC BIAS1",
|
||||
"VA DMIC2", "VA MIC BIAS3",
|
||||
"VA DMIC3", "VA MIC BIAS3";
|
||||
qcom,msm-mbhc-hphl-swh = <1>;
|
||||
qcom,msm-mbhc-gnd-swh = <1>;
|
||||
asoc-codec = <&stub_codec>, <&bolero>,
|
||||
<&wcd937x_codec>;
|
||||
asoc-codec-names = "msm-stub-codec.1", "bolero_codec",
|
||||
"wcd937x_codec";
|
||||
qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>, <&lpi_tlmm>,
|
||||
<&bolero>;
|
||||
qcom,msm-mbhc-hs-mic-max-threshold-mv = <2700>;
|
||||
qcom,msm-mbhc-hs-mic-min-threshold-mv = <116>;
|
||||
};
|
||||
|
||||
&qupv3_se10_i2c {
|
||||
status = "ok"
|
||||
fs1815_rcv: fs1815_rcv@34{
|
||||
compatible = "foursemi,fs1815";
|
||||
reg = <0x34>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&fsm_rcv_rst>;
|
||||
fsm,rst-gpio = <&tlmm 86 0x00>;
|
||||
status = "okay";
|
||||
};
|
||||
fs1815_spk: fs1815_spk@35{
|
||||
compatible = "foursemi,fs1815";
|
||||
reg = <0x35>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&fsm_spk_rst>;
|
||||
fsm,rst-gpio = <&tlmm 58 0x00>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&va_cdc_dma_0_tx {
|
||||
qcom,msm-dai-is-island-supported = <1>;
|
||||
};
|
||||
|
||||
&soc {
|
||||
wcd937x_rst_gpio: msm_cdc_pinctrl@32 {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&wcd937x_reset_active>;
|
||||
pinctrl-1 = <&wcd937x_reset_sleep>;
|
||||
};
|
||||
|
||||
clock_audio_rx_1: rx_core_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_4>;
|
||||
qcom,codec-lpass-ext-clk-freq = <22579200>;
|
||||
qcom,codec-lpass-clk-id = <0x30E>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_rx_2: rx_npl_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_5>;
|
||||
qcom,codec-lpass-ext-clk-freq = <22579200>;
|
||||
qcom,codec-lpass-clk-id = <0x30F>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_tx_1: tx_core_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_6>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x30C>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_tx_2: tx_npl_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_7>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x30D>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_va_1: va_core_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x30B>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_va_2: va_npl_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_8>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x310>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&adsp_loader {
|
||||
nvmem-cells = <&adsp_variant>;
|
||||
nvmem-cell-names = "adsp_variant";
|
||||
adsp-fw-names = "adsp2";
|
||||
adsp-fw-bit-values = <0x1>;
|
||||
};
|
||||
Loading…
Reference in a new issue