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[IA64] SGI Altix : fix pcibr_dmamap_ate32() bug

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On a SGI Altix TIOCP based PCI bus we need to include the ATE_PIO attribute
bit if we're mapping a 32bit MSI address.

Signed-off-by: Mike Habeck <[email protected]>
Signed-off-by: Tony Luck <[email protected]>
This commit is contained in:
Mike Habeck 2007-04-06 12:04:39 -05:00 • committed by Tony Luck
commit 2e0d232bff
2 changed files with 9 additions and 4 deletions
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5
include/asm-ia64/sn/pcibr_provider.h
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@ -21,6 +21,7 @@
#define IS_PCI_BRIDGE_ASIC(asic) (asic == PCIIO_ASIC_TYPE_PIC || \
asic == PCIIO_ASIC_TYPE_TIOCP)
#define IS_PIC_SOFT(ps) (ps->pbi_bridge_type == PCIBR_BRIDGETYPE_PIC)
#define IS_TIOCP_SOFT(ps) (ps->pbi_bridge_type == PCIBR_BRIDGETYPE_TIOCP)
/*
@ -53,8 +54,8 @@
* Bridge PMU Address Transaltion Entry Attibutes
*/
#define PCI32_ATE_V (0x1 << 0)
#define PCI32_ATE_CO (0x1 << 1)
#define PCI32_ATE_PREC (0x1 << 2)
#define PCI32_ATE_CO (0x1 << 1) /* PIC ASIC ONLY */
#define PCI32_ATE_PIO (0x1 << 1) /* TIOCP ASIC ONLY */
#define PCI32_ATE_MSI (0x1 << 2)
#define PCI32_ATE_PREF (0x1 << 3)
#define PCI32_ATE_BAR (0x1 << 4)