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hwmon: (max31790) Fix pwmX_enable attributes
[ Upstream commit 148c847c9e5a54b99850617bf9c143af9a344f92 ] pwmX_enable supports three possible values: 0: Fan control disabled. Duty cycle is fixed to 0% 1: Fan control enabled, pwm mode. Duty cycle is determined by values written into Target Duty Cycle registers. 2: Fan control enabled, rpm mode Duty cycle is adjusted such that fan speed matches the values in Target Count registers The current code does not do this; instead, it mixes pwm control configuration with fan speed monitoring configuration. Worse, it reports that pwm control would be disabled (pwmX_enable==0) when it is in fact enabled in pwm mode. Part of the problem may be that the chip sets the "TACH input enable" bit on its own whenever the mode bit is set to RPM mode, but that doesn't mean that "TACH input enable" accurately reflects the pwm mode. Fix it up and only handle pwm control with the pwmX_enable attributes. In the documentation, clarify that disabling pwm control (pwmX_enable=0) sets the pwm duty cycle to 0%. In the code, explain why TACH_INPUT_EN is set together with RPM_MODE. While at it, only update the configuration register if the configuration has changed, and only update the cached configuration if updating the chip configuration was successful. Cc: Jan Kundrát <[email protected]> Cc: Václav Kubernát <[email protected]> Signed-off-by: Guenter Roeck <[email protected]> Tested-by: Václav Kubernát <[email protected]> Reviewed-by: Jan Kundrát <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Sasha Levin <[email protected]>
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2 changed files with 27 additions and 16 deletions
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@ -38,7 +38,7 @@ Sysfs entries
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fan[1-12]_input RO fan tachometer speed in RPM
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fan[1-12]_fault RO fan experienced fault
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fan[1-6]_target RW desired fan speed in RPM
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pwm[1-6]_enable RW regulator mode, 0=disabled, 1=manual mode, 2=rpm mode
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pwm[1-6]_enable RW regulator mode, 0=disabled (duty cycle=0%), 1=manual mode, 2=rpm mode
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pwm[1-6] RW read: current pwm duty cycle,
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write: target pwm duty cycle (0-255)
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================== === =======================================================
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