From 376ea4e15651f73dbcb33860aa033bf8dfa2dff2 Mon Sep 17 00:00:00 2001
From: Naman Padhiar <npadhiar@qti.qualcomm.com>
Date: Fri, 29 Jan 2021 11:58:18 +0530
Subject: [PATCH] ARM: dts: msm: Enable SMMU S1 for WLAN

Enable SMMU S1 for WLAN adn add dma-coherent flag
for enabling IO-coherency.

Change-Id: I10b8dc81f94a3d77e517504dd07ab4eae9ed4e73
---
 qcom/yupik.dtsi | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/qcom/yupik.dtsi b/qcom/yupik.dtsi
index 6be910929dec..a30931465a30 100644
--- a/qcom/yupik.dtsi
+++ b/qcom/yupik.dtsi
@@ -1128,8 +1128,9 @@
 	icnss2: qcom,wcn6750 {
 		compatible = "qcom,wcn6750";
 		reg = <0x17a10040 0x0>,
+		      <0xb0000000 0x10000>,
 		      <0xb2e5510 0x5c0>;
-		reg-names = "msi_addr", "tcs_cmd";
+		reg-names = "msi_addr", "smmu_iova_ipa", "tcs_cmd";
 		iommus = <&apps_smmu 0x1c00 0x1>;
 		interrupts = <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
 			   <GIC_SPI 769 IRQ_TYPE_EDGE_RISING>,
@@ -1164,12 +1165,13 @@
 			   <GIC_SPI 798 IRQ_TYPE_EDGE_RISING>,
 			   <GIC_SPI 799 IRQ_TYPE_EDGE_RISING>;
 
-		qcom,iommu-dma = "bypass";
+		qcom,iommu-dma = "fastmap";
 		qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal";
 		qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
 		qcom,wlan-msa-fixed-region = <&wlan_fw_mem>;
 		qcom,cmd_db_name = "smpb7";
 		cnss-daemon-support;
+		dma-coherent;
 		qcom,fw-prefix;
 		vdd-cx-mx-supply = <&S7B>;
 		qcom,vdd-cx-mx-config = <824000 1120000 0 0 1>;