From 3f4f4ec249da0307ec72e6ae95c09324116b62cc Mon Sep 17 00:00:00 2001
From: Jagadeesh Kona <jkona@qti.qualcomm.com>
Date: Wed, 17 Jun 2020 15:02:36 +0530
Subject: [PATCH] ARM: dts: msm: Add support for MMNOC TBU MDP0, MDP1, SF1 GDS

Add support for MMNOC TBU MDP0, MDP1, SF1 GDS.

Change-Id: Ib2a391e01cfc66a3c299f5b228f8119771bc8344
---
 qcom/shima-gdsc.dtsi | 33 ++++++++++++++++++++++++++++++---
 qcom/shima.dtsi      | 12 ++++++++++++
 2 files changed, 42 insertions(+), 3 deletions(-)

diff --git a/qcom/shima-gdsc.dtsi b/qcom/shima-gdsc.dtsi
index 29e8a42f1020..7a359ef8f6b2 100644
--- a/qcom/shima-gdsc.dtsi
+++ b/qcom/shima-gdsc.dtsi
@@ -37,6 +37,15 @@
 		status = "disabled";
 	};
 
+	hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc: qcom,gdsc@17d050 {
+		compatible = "qcom,gdsc";
+		reg = <0x17d050 0x4>;
+		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc";
+		qcom,gds-timeout = <500>;
+		qcom,no-status-check-on-disable;
+		status = "disabled";
+	};
+
 	hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc: qcom,gdsc@17d058 {
 		compatible = "qcom,gdsc";
 		reg = <0x17d058 0x4>;
@@ -46,6 +55,24 @@
 		status = "disabled";
 	};
 
+	hlos1_vote_mmnoc_mmu_tbu_mdp0_gdsc: qcom,gdsc@17d078 {
+		compatible = "qcom,gdsc";
+		reg = <0x17d078 0x4>;
+		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_mdp0_gdsc";
+		qcom,gds-timeout = <500>;
+		qcom,no-status-check-on-disable;
+		status = "disabled";
+	};
+
+	hlos1_vote_mmnoc_mmu_tbu_mdp1_gdsc: qcom,gdsc@17d07c {
+		compatible = "qcom,gdsc";
+		reg = <0x17d07c 0x4>;
+		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_mdp1_gdsc";
+		qcom,gds-timeout = <500>;
+		qcom,no-status-check-on-disable;
+		status = "disabled";
+	};
+
 	hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc: qcom,gdsc@17d054 {
 		compatible = "qcom,gdsc";
 		reg = <0x17d054 0x4>;
@@ -55,10 +82,10 @@
 		status = "disabled";
 	};
 
-	hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc: qcom,gdsc@17d050 {
+	hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc: qcom,gdsc@17d06c {
 		compatible = "qcom,gdsc";
-		reg = <0x17d050 0x4>;
-		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc";
+		reg = <0x17d06c 0x4>;
+		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc";
 		qcom,gds-timeout = <500>;
 		qcom,no-status-check-on-disable;
 		status = "disabled";
diff --git a/qcom/shima.dtsi b/qcom/shima.dtsi
index 36d8b95c6ad2..c1b9fc916597 100644
--- a/qcom/shima.dtsi
+++ b/qcom/shima.dtsi
@@ -2104,6 +2104,18 @@
 	status = "ok";
 };
 
+&hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc {
+	status = "ok";
+};
+
+&hlos1_vote_mmnoc_mmu_tbu_mdp0_gdsc {
+	status = "ok";
+};
+
+&hlos1_vote_mmnoc_mmu_tbu_mdp1_gdsc {
+	status = "ok";
+};
+
 &hlos1_vote_turing_mmu_tbu0_gdsc {
 	status = "ok";
 };