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msm: vidc: Update Lahaina platform data

Browse source 
Add Lahaina-specific platform data needed for driver probe
and remove data for older platforms.

Change-Id: I35e7711fd024467f0b6ce40aabdaf71f0c523e9a
Signed-off-by: Mihir Ganu <mganu@codeaurora.org>
This commit is contained in:
Mihir Ganu 2019-11-08 14:21:28 -08:00
commit 2ee4d803f6
1 changed files with 96 additions and 953 deletions
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889
msm/vidc/msm_vidc_platform.c
View file

@ -54,20 +54,8 @@ static struct msm_vidc_codec_data default_codec_data[] = {
CODEC_ENTRY(V4L2_PIX_FMT_H264, MSM_VIDC_DECODER, 125, 675, 320),
};
/* Update with lito data */
static struct msm_vidc_codec_data lito_codec_data[] = {
CODEC_ENTRY(V4L2_PIX_FMT_H264, MSM_VIDC_ENCODER, 0, 675, 320),
CODEC_ENTRY(V4L2_PIX_FMT_HEVC, MSM_VIDC_ENCODER, 0, 675, 320),
CODEC_ENTRY(V4L2_PIX_FMT_VP8, MSM_VIDC_ENCODER, 0, 675, 320),
CODEC_ENTRY(V4L2_PIX_FMT_MPEG2, MSM_VIDC_DECODER, 0, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_H264, MSM_VIDC_DECODER, 0, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_HEVC, MSM_VIDC_DECODER, 0, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_VP8, MSM_VIDC_DECODER, 0, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_VP9, MSM_VIDC_DECODER, 0, 200, 200),
};
/* Update with Kona data */
static struct msm_vidc_codec_data kona_codec_data[] = {
/* Update with Lahaina data */
static struct msm_vidc_codec_data lahaina_codec_data[] = {
CODEC_ENTRY(V4L2_PIX_FMT_H264, MSM_VIDC_ENCODER, 25, 675, 320),
CODEC_ENTRY(V4L2_PIX_FMT_HEVC, MSM_VIDC_ENCODER, 25, 675, 320),
CODEC_ENTRY(V4L2_PIX_FMT_VP8, MSM_VIDC_ENCODER, 25, 675, 320),
@ -78,18 +66,6 @@ static struct msm_vidc_codec_data kona_codec_data[] = {
CODEC_ENTRY(V4L2_PIX_FMT_VP9, MSM_VIDC_DECODER, 25, 200, 200),
};
/* Update with SM6150 data */
static struct msm_vidc_codec_data sm6150_codec_data[] = {
CODEC_ENTRY(V4L2_PIX_FMT_H264, MSM_VIDC_ENCODER, 125, 675, 320),
CODEC_ENTRY(V4L2_PIX_FMT_HEVC, MSM_VIDC_ENCODER, 125, 675, 320),
CODEC_ENTRY(V4L2_PIX_FMT_VP8, MSM_VIDC_ENCODER, 125, 675, 320),
CODEC_ENTRY(V4L2_PIX_FMT_MPEG2, MSM_VIDC_DECODER, 50, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_H264, MSM_VIDC_DECODER, 50, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_HEVC, MSM_VIDC_DECODER, 50, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_VP8, MSM_VIDC_DECODER, 50, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_VP9, MSM_VIDC_DECODER, 50, 200, 200),
};
static struct msm_vidc_codec_data bengal_codec_data[] = {
CODEC_ENTRY(V4L2_PIX_FMT_H264, MSM_VIDC_ENCODER, 125, 675, 320),
CODEC_ENTRY(V4L2_PIX_FMT_HEVC, MSM_VIDC_ENCODER, 125, 675, 320),
@ -101,40 +77,6 @@ static struct msm_vidc_codec_data bengal_codec_data[] = {
CODEC_ENTRY(V4L2_PIX_FMT_VP9, MSM_VIDC_DECODER, 50, 200, 200),
};
/* Update with 855 data */
static struct msm_vidc_codec_data sm8150_codec_data[] = {
CODEC_ENTRY(V4L2_PIX_FMT_H264, MSM_VIDC_ENCODER, 0, 675, 320),
CODEC_ENTRY(V4L2_PIX_FMT_HEVC, MSM_VIDC_ENCODER, 0, 675, 320),
CODEC_ENTRY(V4L2_PIX_FMT_VP8, MSM_VIDC_ENCODER, 0, 675, 320),
CODEC_ENTRY(V4L2_PIX_FMT_MPEG2, MSM_VIDC_DECODER, 0, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_H264, MSM_VIDC_DECODER, 0, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_HEVC, MSM_VIDC_DECODER, 0, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_VP8, MSM_VIDC_DECODER, 0, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_VP9, MSM_VIDC_DECODER, 0, 200, 200),
};
static struct msm_vidc_codec_data sdm845_codec_data[] = {
CODEC_ENTRY(V4L2_PIX_FMT_H264, MSM_VIDC_ENCODER, 125, 675, 320),
CODEC_ENTRY(V4L2_PIX_FMT_HEVC, MSM_VIDC_ENCODER, 125, 675, 320),
CODEC_ENTRY(V4L2_PIX_FMT_VP8, MSM_VIDC_ENCODER, 125, 675, 320),
CODEC_ENTRY(V4L2_PIX_FMT_MPEG2, MSM_VIDC_DECODER, 50, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_H264, MSM_VIDC_DECODER, 50, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_HEVC, MSM_VIDC_DECODER, 50, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_VP8, MSM_VIDC_DECODER, 50, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_VP9, MSM_VIDC_DECODER, 50, 200, 200),
};
static struct msm_vidc_codec_data sdm670_codec_data[] = {
CODEC_ENTRY(V4L2_PIX_FMT_H264, MSM_VIDC_ENCODER, 125, 675, 320),
CODEC_ENTRY(V4L2_PIX_FMT_HEVC, MSM_VIDC_ENCODER, 125, 675, 320),
CODEC_ENTRY(V4L2_PIX_FMT_VP8, MSM_VIDC_ENCODER, 125, 675, 320),
CODEC_ENTRY(V4L2_PIX_FMT_MPEG2, MSM_VIDC_DECODER, 50, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_H264, MSM_VIDC_DECODER, 50, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_HEVC, MSM_VIDC_DECODER, 50, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_VP8, MSM_VIDC_DECODER, 50, 200, 200),
CODEC_ENTRY(V4L2_PIX_FMT_VP9, MSM_VIDC_DECODER, 50, 200, 200),
};
#define ENC HAL_VIDEO_DOMAIN_ENCODER
#define DEC HAL_VIDEO_DOMAIN_DECODER
#define H264 HAL_VIDEO_CODEC_H264
@ -159,186 +101,6 @@ static struct msm_vidc_codec default_codecs[] = {
{ENC, H264}, {ENC, HEVC}, {ENC, VP8},
};
static struct msm_vidc_codec_capability lito_capabilities_v0[] = {
/* {cap_type, domains, codecs, min, max, step_size, default_value} */
{CAP_FRAME_WIDTH, DOMAINS_ALL, CODECS_ALL, 96, 5760, 1, 1920},
{CAP_FRAME_HEIGHT, DOMAINS_ALL, CODECS_ALL, 96, 5760, 1, 1080},
/* ((5760 * 2880) / 256) */
{CAP_MBS_PER_FRAME, DOMAINS_ALL, CODECS_ALL, 36, 64800, 1, 8160},
/* ((4096x2160)/256)@90fps */
{CAP_MBS_PER_SECOND, DOMAINS_ALL, CODECS_ALL, 36, 3110400, 1, 2073600},
{CAP_FRAMERATE, DOMAINS_ALL, CODECS_ALL, 1, 480, 1, 30},
{CAP_BITRATE, DOMAINS_ALL, CODECS_ALL, 1, 200000000, 1, 20000000},
{CAP_SCALE_X, ENC, CODECS_ALL, 8192, 65536, 1, 8192},
{CAP_SCALE_Y, ENC, CODECS_ALL, 8192, 65536, 1, 8192},
{CAP_SCALE_X, DEC, CODECS_ALL, 65536, 65536, 1, 65536},
{CAP_SCALE_Y, DEC, CODECS_ALL, 65536, 65536, 1, 65536},
{CAP_BFRAME, ENC, H264|HEVC, 0, 1, 1, 0},
{CAP_HIER_P_NUM_ENH_LAYERS, ENC, H264|HEVC, 0, 6, 1, 0},
{CAP_LTR_COUNT, ENC, H264|HEVC, 0, 4, 1, 0},
/* ((1920 * 1088) / 256) * 30 fps */
{CAP_MBS_PER_SECOND_POWER_SAVE, ENC, CODECS_ALL,
0, 244800, 1, 244800},
{CAP_I_FRAME_QP, ENC, H264|HEVC, 0, 51, 1, 10},
{CAP_P_FRAME_QP, ENC, H264|HEVC, 0, 51, 1, 20},
{CAP_B_FRAME_QP, ENC, H264|HEVC, 0, 51, 1, 20},
{CAP_I_FRAME_QP, ENC, VP8|VP9, 0, 127, 1, 20},
{CAP_P_FRAME_QP, ENC, VP8|VP9, 0, 127, 1, 40},
{CAP_B_FRAME_QP, ENC, VP8|VP9, 0, 127, 1, 40},
/* 10 slices */
{CAP_SLICE_BYTE, ENC, H264|HEVC, 1, 10, 1, 10},
{CAP_SLICE_MB, ENC, H264|HEVC, 1, 10, 1, 10},
{CAP_MAX_VIDEOCORES, DOMAINS_ALL, CODECS_ALL, 0, 1, 1, 1},
/* VP8 specific */
{CAP_FRAME_WIDTH, ENC|DEC, VP8, 96, 4096, 1, 1920},
{CAP_FRAME_HEIGHT, ENC|DEC, VP8, 96, 4096, 1, 1080},
/* (4096 * 2304) / 256 */
{CAP_MBS_PER_FRAME, ENC|DEC, VP8, 36, 36864, 1, 8160},
/* (4096 * 2160) / 256) * 30*/
{CAP_MBS_PER_SECOND, ENC|DEC, VP8, 36, 1036800, 1, 244800},
{CAP_FRAMERATE, ENC|DEC, VP8, 1, 30, 1, 30},
{CAP_BITRATE, ENC, VP8, 1, 100000000, 1, 20000000},
{CAP_BITRATE, DEC, VP8, 1, 100000000, 1, 20000000},
/* Mpeg2 decoder specific */
{CAP_FRAME_WIDTH, DEC, MPEG2, 96, 1920, 1, 1920},
{CAP_FRAME_HEIGHT, DEC, MPEG2, 96, 1920, 1, 1080},
/* (1920 * 1088) / 256 */
{CAP_MBS_PER_FRAME, DEC, MPEG2, 36, 8160, 1, 8160},
/* ((1920 * 1088) / 256) * 30*/
{CAP_MBS_PER_SECOND, DEC, MPEG2, 36, 244800, 1, 244800},
{CAP_FRAMERATE, DEC, MPEG2, 1, 30, 1, 30},
{CAP_BITRATE, DEC, MPEG2, 1, 40000000, 1, 20000000},
/* Secure usecase specific */
{CAP_SECURE_FRAME_WIDTH, DOMAINS_ALL, CODECS_ALL, 96, 4096, 1, 1920},
{CAP_SECURE_FRAME_HEIGHT, DOMAINS_ALL, CODECS_ALL, 96, 4096, 1, 1080},
/* (4096 * 2304) / 256 */
{CAP_SECURE_MBS_PER_FRAME, DOMAINS_ALL, CODECS_ALL, 36, 36864, 1, 8160},
{CAP_SECURE_BITRATE, DOMAINS_ALL, CODECS_ALL, 1, 40000000, 1, 20000000},
/* Batch Mode Decode */
{CAP_BATCH_MAX_MB_PER_FRAME, DEC, CODECS_ALL, 36, 8160, 1, 8160},
/* (1920 * 1080) / 256 */
{CAP_BATCH_MAX_FPS, DEC, CODECS_ALL, 1, 30, 1, 30},
/* All intra encoding usecase specific */
{CAP_ALLINTRA_MAX_FPS, ENC, H264|HEVC, 1, 240, 1, 30},
/* Image specific */
{CAP_HEVC_IMAGE_FRAME_WIDTH, ENC, HEVC, 128, 512, 1, 512},
{CAP_HEVC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 128, 512, 1, 512},
{CAP_HEIC_IMAGE_FRAME_WIDTH, ENC, HEVC, 512, 8192, 1, 8192},
{CAP_HEIC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 512, 8192, 1, 8192},
/* Level for AVC and HEVC encoder specific */
{CAP_H264_LEVEL, ENC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
V4L2_MPEG_VIDEO_H264_LEVEL_6_0, 1,
V4L2_MPEG_VIDEO_H264_LEVEL_6_0},
{CAP_HEVC_LEVEL, ENC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
V4L2_MPEG_VIDEO_HEVC_LEVEL_6, 1,
V4L2_MPEG_VIDEO_HEVC_LEVEL_6},
/* Level for AVC, HEVC and VP9 decoder specific */
{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
V4L2_MPEG_VIDEO_H264_LEVEL_6_1, 1,
V4L2_MPEG_VIDEO_H264_LEVEL_5_0},
{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, 1,
V4L2_MPEG_VIDEO_HEVC_LEVEL_5},
};
static struct msm_vidc_codec_capability lito_capabilities_v1[] = {
/* {cap_type, domains, codecs, min, max, step_size, default_value} */
{CAP_FRAME_WIDTH, DOMAINS_ALL, CODECS_ALL, 96, 4096, 1, 1920},
{CAP_FRAME_HEIGHT, DOMAINS_ALL, CODECS_ALL, 96, 4096, 1, 1080},
/* ((4096 * 2304) / 256) */
{CAP_MBS_PER_FRAME, DOMAINS_ALL, CODECS_ALL, 36, 36864, 1, 8160},
/* 4K@30 decode + 1080@30 encode */
{CAP_MBS_PER_SECOND, DOMAINS_ALL, CODECS_ALL, 36, 1281600, 1, 2073600},
{CAP_FRAMERATE, DOMAINS_ALL, CODECS_ALL, 1, 240, 1, 30},
{CAP_BITRATE, DOMAINS_ALL, CODECS_ALL, 1, 100000000, 1, 20000000},
{CAP_SCALE_X, ENC, CODECS_ALL, 8192, 65536, 1, 8192},
{CAP_SCALE_Y, ENC, CODECS_ALL, 8192, 65536, 1, 8192},
{CAP_SCALE_X, DEC, CODECS_ALL, 65536, 65536, 1, 65536},
{CAP_SCALE_Y, DEC, CODECS_ALL, 65536, 65536, 1, 65536},
{CAP_BFRAME, ENC, H264|HEVC, 0, 1, 1, 0},
{CAP_HIER_P_NUM_ENH_LAYERS, ENC, H264|HEVC, 0, 6, 1, 0},
{CAP_LTR_COUNT, ENC, H264|HEVC, 0, 4, 1, 0},
/* ((1920 * 1088) / 256) * 30 fps */
{CAP_MBS_PER_SECOND_POWER_SAVE, ENC, CODECS_ALL,
0, 244800, 1, 244800},
{CAP_I_FRAME_QP, ENC, H264|HEVC, 0, 51, 1, 10},
{CAP_P_FRAME_QP, ENC, H264|HEVC, 0, 51, 1, 20},
{CAP_B_FRAME_QP, ENC, H264|HEVC, 0, 51, 1, 20},
{CAP_I_FRAME_QP, ENC, VP8|VP9, 0, 127, 1, 20},
{CAP_P_FRAME_QP, ENC, VP8|VP9, 0, 127, 1, 40},
{CAP_B_FRAME_QP, ENC, VP8|VP9, 0, 127, 1, 40},
/* 10 slices */
{CAP_SLICE_BYTE, ENC, H264|HEVC, 1, 10, 1, 10},
{CAP_SLICE_MB, ENC, H264|HEVC, 1, 10, 1, 10},
{CAP_MAX_VIDEOCORES, DOMAINS_ALL, CODECS_ALL, 0, 1, 1, 1},
/* VP8 specific */
{CAP_FRAME_WIDTH, ENC|DEC, VP8, 96, 1920, 1, 1920},
{CAP_FRAME_HEIGHT, ENC|DEC, VP8, 96, 1920, 1, 1080},
/* (1920 * 1088) / 256 */
{CAP_MBS_PER_FRAME, ENC|DEC, VP8, 36, 8160, 1, 8160},
/* ((1920 * 1088) / 256) * 60*/
{CAP_MBS_PER_SECOND, ENC|DEC, VP8, 36, 489600, 1, 244800},
{CAP_FRAMERATE, ENC|DEC, VP8, 1, 60, 1, 30},
{CAP_BITRATE, ENC, VP8, 1, 40000000, 1, 20000000},
{CAP_BITRATE, DEC, VP8, 1, 100000000, 1, 20000000},
/* Mpeg2 decoder specific */
{CAP_FRAME_WIDTH, DEC, MPEG2, 96, 1920, 1, 1920},
{CAP_FRAME_HEIGHT, DEC, MPEG2, 96, 1920, 1, 1080},
/* (1920 * 1088) / 256 */
{CAP_MBS_PER_FRAME, DEC, MPEG2, 36, 8160, 1, 8160},
/* ((1920 * 1088) / 256) * 30*/
{CAP_MBS_PER_SECOND, DEC, MPEG2, 36, 244800, 1, 244800},
{CAP_FRAMERATE, DEC, MPEG2, 1, 30, 1, 30},
{CAP_BITRATE, DEC, MPEG2, 1, 40000000, 1, 20000000},
/* Secure usecase specific */
{CAP_SECURE_FRAME_WIDTH, DOMAINS_ALL, CODECS_ALL, 96, 4096, 1, 1920},
{CAP_SECURE_FRAME_HEIGHT, DOMAINS_ALL, CODECS_ALL, 96, 4096, 1, 1080},
/* (4096 * 2304) / 256 */
{CAP_SECURE_MBS_PER_FRAME, DOMAINS_ALL, CODECS_ALL, 36, 36864, 1, 8160},
{CAP_SECURE_BITRATE, DOMAINS_ALL, CODECS_ALL, 1, 40000000, 1, 20000000},
/* Batch Mode Decode */
{CAP_BATCH_MAX_MB_PER_FRAME, DEC, CODECS_ALL, 36, 8160, 1, 8160},
/* (1920 * 1080) / 256 */
{CAP_BATCH_MAX_FPS, DEC, CODECS_ALL, 1, 30, 1, 30},
/* All intra encoding usecase specific */
{CAP_ALLINTRA_MAX_FPS, ENC, H264|HEVC, 1, 240, 1, 30},
/* Image specific */
{CAP_HEVC_IMAGE_FRAME_WIDTH, ENC, HEVC, 128, 512, 1, 512},
{CAP_HEVC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 128, 512, 1, 512},
{CAP_HEIC_IMAGE_FRAME_WIDTH, ENC, HEVC, 512, 8192, 1, 8192},
{CAP_HEIC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 512, 8192, 1, 8192},
/* Level for AVC and HEVC encoder specific */
{CAP_H264_LEVEL, ENC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
V4L2_MPEG_VIDEO_H264_LEVEL_6_0, 1,
V4L2_MPEG_VIDEO_H264_LEVEL_6_0},
{CAP_HEVC_LEVEL, ENC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
V4L2_MPEG_VIDEO_HEVC_LEVEL_6, 1,
V4L2_MPEG_VIDEO_HEVC_LEVEL_6},
/* Level for AVC, HEVC and VP9 decoder specific */
{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
V4L2_MPEG_VIDEO_H264_LEVEL_6_1, 1,
V4L2_MPEG_VIDEO_H264_LEVEL_5_0},
{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, 1,
V4L2_MPEG_VIDEO_HEVC_LEVEL_5},
};
static struct msm_vidc_codec_capability bengal_capabilities[] = {
/* {cap_type, domains, codecs, min, max, step_size, default_value} */
{CAP_FRAME_WIDTH, DOMAINS_ALL, CODECS_ALL, 96, 1920, 1, 1920},
@ -372,7 +134,7 @@ static struct msm_vidc_codec_capability bengal_capabilities[] = {
{CAP_SECURE_BITRATE, DOMAINS_ALL, CODECS_ALL, 1, 40000000, 1, 20000000},
};
static struct msm_vidc_codec_capability kona_capabilities[] = {
static struct msm_vidc_codec_capability lahaina_capabilities[] = {
/* {cap_type, domains, codecs, min, max, step_size, default_value,} */
{CAP_FRAME_WIDTH, DOMAINS_ALL, CODECS_ALL, 128, 8192, 1, 1920},
{CAP_FRAME_HEIGHT, DOMAINS_ALL, CODECS_ALL, 128, 8192, 1, 1080},
@ -497,151 +259,7 @@ static struct msm_vidc_common_data default_common_data[] = {
},
};
/* Update with lito */
static struct msm_vidc_common_data lito_common_data_v0[] = {
{
.key = "qcom,never-unload-fw",
.value = 1,
},
{
.key = "qcom,sw-power-collapse",
.value = 1,
},
{
.key = "qcom,domain-attr-non-fatal-faults",
.value = 1,
},
{
.key = "qcom,max-secure-instances",
.value = 3,
},
{
.key = "qcom,max-hw-load",
.value = 3110400,/* ((4096x2160)/256)@90fps */
/* 4k@60 decode + 4k@30 encode */
},
{
.key = "qcom,max-hq-mbs-per-frame",
.value = 8160,/* ((1920x1088)/256) */
},
{
.key = "qcom,max-hq-mbs-per-sec",
.value = 244800,/* ((1920x1088)/256) MBs@30fps */
},
{
.key = "qcom,max-b-frame-mbs-per-frame",
.value = 8160,/* ((1920x1088)/256) */
},
{
.key = "qcom,max-b-frame-mbs-per-sec",
.value = 244800,/* ((1920x1088)/256) MBs@30fps */
},
{
.key = "qcom,power-collapse-delay",
.value = 1500,
},
{
.key = "qcom,hw-resp-timeout",
.value = 1000,
},
{
.key = "qcom,debug-timeout",
.value = 0,
},
{
.key = "qcom,decode-batching",
.value = 1,
},
{
.key = "qcom,batch-timeout",
.value = 200,
},
{
.key = "qcom,dcvs",
.value = 1,
},
{
.key = "qcom,fw-cycles",
.value = 760000,
},
{
.key = "qcom,fw-vpp-cycles",
.value = 166667,
},
};
static struct msm_vidc_common_data lito_common_data_v1[] = {
{
.key = "qcom,never-unload-fw",
.value = 1,
},
{
.key = "qcom,sw-power-collapse",
.value = 1,
},
{
.key = "qcom,domain-attr-non-fatal-faults",
.value = 1,
},
{
.key = "qcom,max-secure-instances",
.value = 3,
},
{
.key = "qcom,max-hw-load",
.value = 1281600,/* 4K@30 decode + 1080@30 encode */
},
{
.key = "qcom,max-hq-mbs-per-frame",
.value = 8160,/* ((1920x1088)/256) */
},
{
.key = "qcom,max-hq-mbs-per-sec",
.value = 244800,/* ((1920x1088)/256) MBs@30fps */
},
{
.key = "qcom,max-b-frame-mbs-per-frame",
.value = 8160,/* ((1920x1088)/256) */
},
{
.key = "qcom,max-b-frame-mbs-per-sec",
.value = 244800,/* ((1920x1088)/256) MBs@30fps */
},
{
.key = "qcom,power-collapse-delay",
.value = 1500,
},
{
.key = "qcom,hw-resp-timeout",
.value = 1000,
},
{
.key = "qcom,debug-timeout",
.value = 0,
},
{
.key = "qcom,decode-batching",
.value = 1,
},
{
.key = "qcom,batch-timeout",
.value = 200,
},
{
.key = "qcom,dcvs",
.value = 1,
},
{
.key = "qcom,fw-cycles",
.value = 760000,
},
{
.key = "qcom,fw-vpp-cycles",
.value = 166667,
},
};
static struct msm_vidc_common_data kona_common_data[] = {
static struct msm_vidc_common_data lahaina_common_data[] = {
{
.key = "qcom,never-unload-fw",
.value = 1,
@ -724,65 +342,6 @@ static struct msm_vidc_common_data kona_common_data[] = {
},
};
static struct msm_vidc_common_data sm6150_common_data[] = {
{
.key = "qcom,never-unload-fw",
.value = 1,
},
{
.key = "qcom,sw-power-collapse",
.value = 1,
},
{
.key = "qcom,domain-attr-non-fatal-faults",
.value = 1,
},
{
.key = "qcom,max-secure-instances",
.value = 5,
},
{
.key = "qcom,max-hw-load",
.value = 1216800,
},
{
.key = "qcom,max-hq-mbs-per-frame",
.value = 8160,
},
{
.key = "qcom,max-hq-mbs-per-sec",
.value = 244800, /* 1920 x 1088 @ 30 fps */
},
{
.key = "qcom,max-b-frame-mbs-per-frame",
.value = 8160,
},
{
.key = "qcom,max-b-frame-mbs-per-sec",
.value = 489600,
},
{
.key = "qcom,power-collapse-delay",
.value = 1500,
},
{
.key = "qcom,hw-resp-timeout",
.value = 1000,
},
{
.key = "qcom,dcvs",
.value = 1,
},
{
.key = "qcom,fw-cycles",
.value = 733003,
},
{
.key = "qcom,fw-vpp-cycles",
.value = 225975,
},
};
static struct msm_vidc_common_data bengal_common_data[] = {
{
.key = "qcom,never-unload-fw",
@ -842,260 +401,8 @@ static struct msm_vidc_common_data bengal_common_data[] = {
},
};
static struct msm_vidc_common_data sm8150_common_data[] = {
{
.key = "qcom,never-unload-fw",
.value = 1,
},
{
.key = "qcom,sw-power-collapse",
.value = 1,
},
{
.key = "qcom,domain-attr-non-fatal-faults",
.value = 1,
},
{
.key = "qcom,max-secure-instances",
.value = 2, /*
* As per design driver allows 3rd
* instance as well since the secure
* flags were updated later for the
* current instance. Hence total
* secure sessions would be
* max-secure-instances + 1.
*/
},
{
.key = "qcom,max-hw-load",
.value = 3916800, /*
* 1920x1088/256 MBs@480fps. It is less
* any other usecases (ex:
* 3840x2160@120fps, 4096x2160@96ps,
* 7680x4320@30fps)
*/
},
{
.key = "qcom,max-hq-mbs-per-frame",
.value = 8160,
},
{
.key = "qcom,max-hq-mbs-per-sec",
.value = 244800, /* 1920 x 1088 @ 30 fps */
},
{
.key = "qcom,max-b-frame-mbs-per-frame",
.value = 8160,
},
{
.key = "qcom,max-b-frame-mbs-per-sec",
.value = 489600,
},
{
.key = "qcom,power-collapse-delay",
.value = 1500,
},
{
.key = "qcom,hw-resp-timeout",
.value = 1000,
},
{
.key = "qcom,debug-timeout",
.value = 0,
},
{
.key = "qcom,decode-batching",
.value = 1,
},
{
.key = "qcom,batch-timeout",
.value = 200,
},
{
.key = "qcom,dcvs",
.value = 1,
},
{
.key = "qcom,fw-cycles",
.value = 760000,
},
{
.key = "qcom,fw-vpp-cycles",
.value = 166667,
},
};
static struct msm_vidc_common_data sdm845_common_data[] = {
{
.key = "qcom,never-unload-fw",
.value = 1,
},
{
.key = "qcom,sw-power-collapse",
.value = 1,
},
{
.key = "qcom,domain-attr-non-fatal-faults",
.value = 1,
},
{
.key = "qcom,domain-attr-cache-pagetables",
.value = 1,
},
{
.key = "qcom,max-secure-instances",
.value = 5,
},
{
.key = "qcom,max-hw-load",
.value = 3110400, /* 4096x2160@90 */
},
{
.key = "qcom,max-hq-mbs-per-frame",
.value = 8160,
},
{
.key = "qcom,max-hq-mbs-per-sec",
.value = 244800, /* 1920 x 1088 @ 30 fps */
},
{
.key = "qcom,max-b-frame-mbs-per-frame",
.value = 8160,
},
{
.key = "qcom,max-b-frame-mbs-per-sec",
.value = 489600,
},
{
.key = "qcom,power-collapse-delay",
.value = 500,
},
{
.key = "qcom,hw-resp-timeout",
.value = 250,
},
{
.key = "qcom,debug-timeout",
.value = 0,
},
{
.key = "qcom,dcvs",
.value = 1,
},
};
static struct msm_vidc_common_data sdm670_common_data_v0[] = {
{
.key = "qcom,never-unload-fw",
.value = 1,
},
{
.key = "qcom,sw-power-collapse",
.value = 1,
},
{
.key = "qcom,domain-attr-non-fatal-faults",
.value = 1,
},
{
.key = "qcom,max-secure-instances",
.value = 5,
},
{
.key = "qcom,max-hw-load",
.value = 1944000,
},
{
.key = "qcom,max-hq-mbs-per-frame",
.value = 8160,
},
{
.key = "qcom,max-hq-mbs-per-sec",
.value = 244800, /* 1920 x 1088 @ 30 fps */
},
{
.key = "qcom,max-b-frame-mbs-per-frame",
.value = 8160,
},
{
.key = "qcom,max-b-frame-mbs-per-sec",
.value = 489600,
},
{
.key = "qcom,power-collapse-delay",
.value = 500,
},
{
.key = "qcom,hw-resp-timeout",
.value = 250,
},
{
.key = "qcom,dcvs",
.value = 1,
},
};
static struct msm_vidc_common_data sdm670_common_data_v1[] = {
{
.key = "qcom,never-unload-fw",
.value = 1,
},
{
.key = "qcom,sw-power-collapse",
.value = 1,
},
{
.key = "qcom,domain-attr-non-fatal-faults",
.value = 1,
},
{
.key = "qcom,max-secure-instances",
.value = 5,
},
{
.key = "qcom,max-hw-load",
.value = 1216800,
},
{
.key = "qcom,max-hq-mbs-per-frame",
.value = 8160,
},
{
.key = "qcom,max-hq-mbs-per-sec",
.value = 244800, /* 1920 x 1088 @ 30 fps */
},
{
.key = "qcom,max-b-frame-mbs-per-frame",
.value = 8160,
},
{
.key = "qcom,max-b-frame-mbs-per-sec",
.value = 489600,
},
{
.key = "qcom,power-collapse-delay",
.value = 500,
},
{
.key = "qcom,hw-resp-timeout",
.value = 250,
},
{
.key = "qcom,dcvs",
.value = 1,
},
};
static struct msm_vidc_efuse_data lito_efuse_data[] = {
EFUSE_ENTRY(0x00786008, 4, 0x00200000, 0x15, SKU_VERSION),
};
static struct msm_vidc_efuse_data sdm670_efuse_data[] = {
EFUSE_ENTRY(0x007801A0, 4, 0x00008000, 0x0f, SKU_VERSION),
};
/* Default UBWC config for LPDDR5 */
static struct msm_vidc_ubwc_config_data kona_ubwc_data[] = {
static struct msm_vidc_ubwc_config_data lahaina_ubwc_data[] = {
UBWC_CONFIG(1, 1, 1, 0, 0, 0, 8, 32, 16, 0, 0),
};
@ -1114,30 +421,11 @@ static struct msm_vidc_platform_data default_data = {
.ubwc_config = 0x0,
};
static struct msm_vidc_platform_data lito_data = {
.codec_data = lito_codec_data,
.codec_data_length = ARRAY_SIZE(lito_codec_data),
.common_data = lito_common_data_v0,
.common_data_length = ARRAY_SIZE(lito_common_data_v0),
.csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff,
.csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff,
.csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff,
.efuse_data = lito_efuse_data,
.efuse_data_length = ARRAY_SIZE(lito_efuse_data),
.sku_version = 0,
.vpu_ver = VPU_VERSION_IRIS1,
.ubwc_config = 0x0,
.codecs = default_codecs,
.codecs_count = ARRAY_SIZE(default_codecs),
.codec_caps = lito_capabilities_v0,
.codec_caps_count = ARRAY_SIZE(lito_capabilities_v0),
};
static struct msm_vidc_platform_data kona_data = {
.codec_data = kona_codec_data,
.codec_data_length = ARRAY_SIZE(kona_codec_data),
.common_data = kona_common_data,
.common_data_length = ARRAY_SIZE(kona_common_data),
static struct msm_vidc_platform_data lahaina_data = {
.codec_data = lahaina_codec_data,
.codec_data_length = ARRAY_SIZE(lahaina_codec_data),
.common_data = lahaina_common_data,
.common_data_length = ARRAY_SIZE(lahaina_common_data),
.csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff,
.csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff,
.csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff,
@ -1145,26 +433,11 @@ static struct msm_vidc_platform_data kona_data = {
.efuse_data_length = 0,
.sku_version = 0,
.vpu_ver = VPU_VERSION_IRIS2,
.ubwc_config = kona_ubwc_data,
.ubwc_config = lahaina_ubwc_data,
.codecs = default_codecs,
.codecs_count = ARRAY_SIZE(default_codecs),
.codec_caps = kona_capabilities,
.codec_caps_count = ARRAY_SIZE(kona_capabilities),
};
static struct msm_vidc_platform_data sm6150_data = {
.codec_data = sm6150_codec_data,
.codec_data_length = ARRAY_SIZE(sm6150_codec_data),
.common_data = sm6150_common_data,
.common_data_length = ARRAY_SIZE(sm6150_common_data),
.csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff,
.csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff,
.csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff,
.efuse_data = NULL,
.efuse_data_length = 0,
.sku_version = 0,
.vpu_ver = VPU_VERSION_AR50,
.ubwc_config = 0x0,
.codec_caps = lahaina_capabilities,
.codec_caps_count = ARRAY_SIZE(lahaina_capabilities),
};
static struct msm_vidc_platform_data bengal_data = {
@ -1186,75 +459,10 @@ static struct msm_vidc_platform_data bengal_data = {
.codec_caps_count = ARRAY_SIZE(bengal_capabilities),
};
static struct msm_vidc_platform_data sm8150_data = {
.codec_data = sm8150_codec_data,
.codec_data_length = ARRAY_SIZE(sm8150_codec_data),
.common_data = sm8150_common_data,
.common_data_length = ARRAY_SIZE(sm8150_common_data),
.csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff,
.csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff,
.csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff,
.efuse_data = NULL,
.efuse_data_length = 0,
.sku_version = 0,
.vpu_ver = VPU_VERSION_IRIS1,
.ubwc_config = 0x0,
};
static struct msm_vidc_platform_data sdm845_data = {
.codec_data = sdm845_codec_data,
.codec_data_length = ARRAY_SIZE(sdm845_codec_data),
.common_data = sdm845_common_data,
.common_data_length = ARRAY_SIZE(sdm845_common_data),
.csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff,
.csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff,
.csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff,
.efuse_data = NULL,
.efuse_data_length = 0,
.sku_version = 0,
.vpu_ver = VPU_VERSION_AR50,
.ubwc_config = 0x0,
};
static struct msm_vidc_platform_data sdm670_data = {
.codec_data = sdm670_codec_data,
.codec_data_length = ARRAY_SIZE(sdm670_codec_data),
.common_data = sdm670_common_data_v0,
.common_data_length = ARRAY_SIZE(sdm670_common_data_v0),
.csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff,
.csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff,
.csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff,
.efuse_data = sdm670_efuse_data,
.efuse_data_length = ARRAY_SIZE(sdm670_efuse_data),
.sku_version = 0,
.vpu_ver = VPU_VERSION_AR50,
.ubwc_config = 0x0,
};
static const struct of_device_id msm_vidc_dt_match[] = {
{
.compatible = "qcom,lito-vidc",
.data = &lito_data,
},
{
.compatible = "qcom,kona-vidc",
.data = &kona_data,
},
{
.compatible = "qcom,sm6150-vidc",
.data = &sm6150_data,
},
{
.compatible = "qcom,sm8150-vidc",
.data = &sm8150_data,
},
{
.compatible = "qcom,sdm845-vidc",
.data = &sdm845_data,
},
{
.compatible = "qcom,sdm670-vidc",
.data = &sdm670_data,
.compatible = "qcom,lahaina-vidc",
.data = &lahaina_data,
},
{
.compatible = "qcom,bengal-vidc",
@ -1265,53 +473,11 @@ static const struct of_device_id msm_vidc_dt_match[] = {
MODULE_DEVICE_TABLE(of, msm_vidc_dt_match);
static int msm_vidc_read_efuse(
struct msm_vidc_platform_data *data, struct device *dev)
{
void __iomem *base;
uint32_t i;
struct msm_vidc_efuse_data *efuse_data = data->efuse_data;
uint32_t efuse_data_count = data->efuse_data_length;
for (i = 0; i < efuse_data_count; i++) {
switch ((efuse_data[i]).purpose) {
case SKU_VERSION:
base = devm_ioremap(dev, (efuse_data[i]).start_address,
(efuse_data[i]).size);
if (!base) {
d_vpr_e("failed efuse: start %#x, size %d\n",
(efuse_data[i]).start_address,
(efuse_data[i]).size);
return -EINVAL;
} else {
u32 efuse = 0;
efuse = readl_relaxed(base);
data->sku_version =
(efuse & (efuse_data[i]).mask) >>
(efuse_data[i]).shift;
d_vpr_h("efuse 0x%x, platform version 0x%x\n",
efuse, data->sku_version);
devm_iounmap(dev, base);
}
break;
default:
break;
}
}
return 0;
}
void *vidc_get_drv_data(struct device *dev)
{
struct msm_vidc_platform_data *driver_data = NULL;
const struct of_device_id *match;
uint32_t ddr_type = DDR_TYPE_LPDDR5;
int rc = 0;
if (!IS_ENABLED(CONFIG_OF) || !dev->of_node) {
driver_data = &default_data;
@ -1326,17 +492,7 @@ void *vidc_get_drv_data(struct device *dev)
if (!of_find_property(dev->of_node, "sku-index", NULL) ||
!driver_data) {
goto exit;
} else if (!strcmp(match->compatible, "qcom,sdm670-vidc")) {
rc = msm_vidc_read_efuse(driver_data, dev);
if (rc)
goto exit;
if (driver_data->sku_version == SKU_VERSION_1) {
driver_data->common_data = sdm670_common_data_v1;
driver_data->common_data_length =
ARRAY_SIZE(sdm670_common_data_v1);
}
} else if (!strcmp(match->compatible, "qcom,kona-vidc")) {
} else if (!strcmp(match->compatible, "qcom,lahaina-vidc")) {
ddr_type = of_fdt_get_ddrtype();
if (ddr_type == -ENOENT) {
d_vpr_e("Failed to get ddr type, use LPDDR5\n");
@ -1348,20 +504,7 @@ void *vidc_get_drv_data(struct device *dev)
ddr_type == DDR_TYPE_LPDDR4X ||
ddr_type == DDR_TYPE_LPDDR4Y))
driver_data->ubwc_config->highest_bank_bit = 0xf;
} else if (!strcmp(match->compatible, "qcom,lito-vidc")) {
rc = msm_vidc_read_efuse(driver_data, dev);
if (rc)
goto exit;
if (driver_data->sku_version == SKU_VERSION_1) {
driver_data->common_data = lito_common_data_v1;
driver_data->common_data_length =
ARRAY_SIZE(lito_common_data_v1);
driver_data->codec_caps = lito_capabilities_v1;
driver_data->codec_caps_count = ARRAY_SIZE(lito_capabilities_v1);
}
}
exit:
return driver_data;
}