From 2f13701c28de260ac662a3fde4aeec67b2a35473 Mon Sep 17 00:00:00 2001
From: Jishnu Prakash <jprakash@qti.qualcomm.com>
Date: Tue, 28 Apr 2020 09:43:57 +0530
Subject: [PATCH] ARM: dts: msm: Add SPMI PMIC arbiter device for holi

Add SPMI PMIC arbiter device so that it is possible to
communicate with the PMICs attached to SPMI bus.

Change-Id: I21fa09b937a2ae18c0319e5da4ff4324099888bb
---
 qcom/holi.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/qcom/holi.dtsi b/qcom/holi.dtsi
index b311cd4e6fb5..aa90d7cad5d9 100644
--- a/qcom/holi.dtsi
+++ b/qcom/holi.dtsi
@@ -222,6 +222,25 @@
 		interrupts = <GIC_PPI 8 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	spmi_bus: qcom,spmi@1c40000 {
+		compatible = "qcom,spmi-pmic-arb";
+		reg = <0x1c40000 0x1100>,
+			<0x1e00000 0x2000000>,
+			<0x3e00000 0x100000>,
+			<0x3f00000 0xa0000>,
+			<0x1c0a000 0x26000>;
+		reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
+		interrupt-names = "periph_irq";
+		interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
+		qcom,ee = <0>;
+		qcom,channel = <0>;
+		#address-cells = <2>;
+		#size-cells = <0>;
+		interrupt-controller;
+		#interrupt-cells = <4>;
+		cell-index = <0>;
+	};
+
 	arch_timer: timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,