From c7862b2740c2959ff77f8fbf5b2ce086634abf02 Mon Sep 17 00:00:00 2001 From: Gopala Krishna Nuthaki Date: Fri, 23 Oct 2020 16:16:35 +0530 Subject: [PATCH 1/2] ARM: dts: msm: Add CX and MX SDPM configuration for SHIMA Add CX SDPM configuration to monitor Camera, UFS clocks for SHIMA. Add MX SDPM configuration to monitor Camera, Video, and other misc clocks for SHIMA. Change-Id: I2d38c7d48cf4b05198f924dccb7b2858d679e6a6 --- qcom/shima-thermal.dtsi | 146 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 146 insertions(+) diff --git a/qcom/shima-thermal.dtsi b/qcom/shima-thermal.dtsi index 73aa20666ae0..25d67c087505 100644 --- a/qcom/shima-thermal.dtsi +++ b/qcom/shima-thermal.dtsi @@ -64,6 +64,44 @@ "msm_skin_therm"; }; }; + + mx_sdpm@0x00636000 { + compatible = "qcom,sdpm"; + reg = <0x00636000 0x1000>; + clock-names = "cam_cc_ipe", "video_cc_mvs0"; + clocks = <&camcc CAM_CC_IPE_0_CLK_SRC>, + <&videocc VIDEO_CC_MVS0_CLK_SRC>; + cam_cc_ipe-supply = <&cam_cc_ipe_0_gdsc>; + video_cc_mvs0-supply = <&video_cc_mvs0_gdsc>; + csr-id = <1 3>; + }; + + cx_sdpm@0x00634000 { + compatible = "qcom,sdpm"; + reg = <0x00634000 0x1000>; + clock-names = "cam_cc_csi0phytiimer", "video_cc_mvs0", "disp_cc_mdss_mdp"; + clocks = <&camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, + <&videocc VIDEO_CC_MVS0_CLK_SRC>, + <&dispcc DISP_CC_MDSS_MDP_CLK_SRC>; + cam_cc_csi0phytiimer-supply = <&cam_cc_titan_top_gdsc>; + video_cc_mvs0-supply = <&video_cc_mvs0_gdsc>; + disp_cc_mdss-mdp-supply = <&disp_cc_mdss_core_gdsc>; + csr-id = <0 2 5>; + }; + + mx_pe: mx_rdpm_pe@0x00637000 { + compatible = "qcom,policy-engine"; + #thermal-sensor-cells = <0>; + reg = <0x00637000 0x1000>; + interrupts = ; + }; + + cx_pe: cx_rdpm_pe@0x00635000 { + compatible = "qcom,policy-engine"; + #thermal-sensor-cells = <0>; + reg = <0x00635000 0x1000>; + interrupts = ; + }; }; &cpufreq_hw { @@ -1366,4 +1404,112 @@ }; }; }; + + mx-pe-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&mx_pe>; + thermal-governor = "step_wise"; + trips { + mx_pe_config1: mx-pe-config1 { + temperature = <1>; + hysteresis = <1>; + type = "passive"; + }; + + mx_pe_config2: mx-pe-config2 { + temperature = <2>; + hysteresis = <1>; + type = "passive"; + }; + + mx_pe_config3: mx-pe-config3 { + temperature = <3>; + hysteresis = <1>; + type = "passive"; + }; + }; + + cooling-maps { + mx_pe_cdev_1 { + trip = <&mx_pe_config1>; + cooling-device = <&cdsp_sw 0 0>; + }; + + mx_pe_cdev_2 { + trip = <&mx_pe_config2>; + cooling-device = <&msm_gpu 0 0>; + }; + + mx_pe_cdev_3 { + trip = <&mx_pe_config3>; + cooling-device = <&modem_tj 0 0>; + }; + }; + }; + + cx-pe-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&cx_pe>; + thermal-governor = "step_wise"; + trips { + cx_pe_config1: cx-pe-config1 { + temperature = <1>; + hysteresis = <1>; + type = "passive"; + }; + + cx_pe_config2: cx-pe-config2 { + temperature = <2>; + hysteresis = <1>; + type = "passive"; + }; + + cx_pe_config3: cx-pe-config3 { + temperature = <3>; + hysteresis = <1>; + type = "passive"; + }; + + cx_pe_config4: cx-pe-config4 { + temperature = <4>; + hysteresis = <1>; + type = "passive"; + }; + + cx_pe_config5: cx-pe-config5 { + temperature = <5>; + hysteresis = <2>; + type = "passive"; + }; + }; + + cooling-maps { + cx_pe_cdev_1 { + trip = <&cx_pe_config1>; + cooling-device = <&cdsp_sw 0 0>; + }; + + cx_pe_cdev_2 { + trip = <&cx_pe_config2>; + cooling-device = <&cdsp_sw 0 0>; + }; + + cx_pe_cdev_3 { + trip = <&cx_pe_config3>; + cooling-device = <&cdsp_sw 0 0>; + }; + + cx_pe_cdev_4 { + trip = <&cx_pe_config4>; + cooling-device = <&modem_tj 0 0>; + }; + + cx_pe_cdev_5 { + trip = <&cx_pe_config5>; + cooling-device = <&cdsp_sw 0 0>; + }; + }; + }; }; From 7b5b6824e687e43795fa9ff57f7669bb42a3bbf0 Mon Sep 17 00:00:00 2001 From: Gopala Krishna Nuthaki Date: Tue, 3 Nov 2020 17:50:55 +0530 Subject: [PATCH 2/2] ARM: dts: msm: Add configuration for vref regulator vote for SHIMA Add regulator configuration for vref regulators so that LMH driver can place a active only vote for shima. Change-Id: I67ffdf7cac820ddcc81b901d4652c4f44aa8fdaf --- qcom/shima-thermal.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/qcom/shima-thermal.dtsi b/qcom/shima-thermal.dtsi index 25d67c087505..0568cabd69b5 100644 --- a/qcom/shima-thermal.dtsi +++ b/qcom/shima-thermal.dtsi @@ -191,6 +191,14 @@ }; }; + qcom,limits-dcvs { + compatible = "qcom,msm-hw-limits"; + isens_vref_0p8-supply = <&pm8350c_l10_ao>; + isens-vref-0p8-settings = <880000 880000 30000>; + isens_vref_1p8-supply = <&pm8350c_l1_ao>; + isens-vref-1p8-settings = <1800000 1800000 20000>; + }; + qcom,cpu-voltage-cdev { compatible = "qcom,cc-cooling-devices"; apc1_cluster: qcom,apc1-cluster {