mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 10:41:38 -04:00
Merge branch 'x86-dma-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 dma mapping updates from Ingo Molnar:
"This tree, by Christoph Hellwig, switches over the x86 architecture to
the generic dma-direct and swiotlb code, and also unifies more of the
dma-direct code between architectures. The now unused x86-only
primitives are removed"
* 'x86-dma-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
dma-mapping: Don't clear GFP_ZERO in dma_alloc_attrs
swiotlb: Make swiotlb_{alloc,free}_buffer depend on CONFIG_DMA_DIRECT_OPS
dma/swiotlb: Remove swiotlb_{alloc,free}_coherent()
dma/direct: Handle force decryption for DMA coherent buffers in common code
dma/direct: Handle the memory encryption bit in common code
dma/swiotlb: Remove swiotlb_set_mem_attributes()
set_memory.h: Provide set_memory_{en,de}crypted() stubs
x86/dma: Remove dma_alloc_coherent_gfp_flags()
iommu/intel-iommu: Enable CONFIG_DMA_DIRECT_OPS=y and clean up intel_{alloc,free}_coherent()
iommu/amd_iommu: Use CONFIG_DMA_DIRECT_OPS=y and dma_direct_{alloc,free}()
x86/dma/amd_gart: Use dma_direct_{alloc,free}()
x86/dma/amd_gart: Look at dev->coherent_dma_mask instead of GFP_DMA
x86/dma: Use generic swiotlb_ops
x86/dma: Use DMA-direct (CONFIG_DMA_DIRECT_OPS=y)
x86/dma: Remove dma_alloc_coherent_mask()
This commit is contained in:
commit
2fcd2b306a
30 changed files with 182 additions and 558 deletions
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@ -107,6 +107,7 @@ config IOMMU_PGTABLES_L2
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# AMD IOMMU support
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config AMD_IOMMU
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bool "AMD IOMMU support"
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select DMA_DIRECT_OPS
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select SWIOTLB
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select PCI_MSI
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select PCI_ATS
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@ -142,6 +143,7 @@ config DMAR_TABLE
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config INTEL_IOMMU
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bool "Support for Intel IOMMU using DMA Remapping Devices"
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depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
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select DMA_DIRECT_OPS
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select IOMMU_API
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select IOMMU_IOVA
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select DMAR_TABLE
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@ -28,6 +28,7 @@
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#include <linux/debugfs.h>
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#include <linux/scatterlist.h>
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#include <linux/dma-mapping.h>
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#include <linux/dma-direct.h>
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#include <linux/iommu-helper.h>
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#include <linux/iommu.h>
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#include <linux/delay.h>
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@ -2193,7 +2194,7 @@ static int amd_iommu_add_device(struct device *dev)
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dev_name(dev));
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iommu_ignore_device(dev);
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dev->dma_ops = &nommu_dma_ops;
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dev->dma_ops = &dma_direct_ops;
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goto out;
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}
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init_iommu_group(dev);
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@ -2599,51 +2600,32 @@ static void *alloc_coherent(struct device *dev, size_t size,
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unsigned long attrs)
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{
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u64 dma_mask = dev->coherent_dma_mask;
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struct protection_domain *domain;
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struct dma_ops_domain *dma_dom;
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struct page *page;
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struct protection_domain *domain = get_domain(dev);
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bool is_direct = false;
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void *virt_addr;
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domain = get_domain(dev);
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if (PTR_ERR(domain) == -EINVAL) {
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page = alloc_pages(flag, get_order(size));
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*dma_addr = page_to_phys(page);
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return page_address(page);
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} else if (IS_ERR(domain))
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return NULL;
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dma_dom = to_dma_ops_domain(domain);
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size = PAGE_ALIGN(size);
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dma_mask = dev->coherent_dma_mask;
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flag &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);
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flag |= __GFP_ZERO;
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page = alloc_pages(flag | __GFP_NOWARN, get_order(size));
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if (!page) {
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if (!gfpflags_allow_blocking(flag))
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return NULL;
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page = dma_alloc_from_contiguous(dev, size >> PAGE_SHIFT,
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get_order(size), flag);
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if (!page)
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if (IS_ERR(domain)) {
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if (PTR_ERR(domain) != -EINVAL)
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return NULL;
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is_direct = true;
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}
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virt_addr = dma_direct_alloc(dev, size, dma_addr, flag, attrs);
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if (!virt_addr || is_direct)
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return virt_addr;
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if (!dma_mask)
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dma_mask = *dev->dma_mask;
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*dma_addr = __map_single(dev, dma_dom, page_to_phys(page),
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size, DMA_BIDIRECTIONAL, dma_mask);
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*dma_addr = __map_single(dev, to_dma_ops_domain(domain),
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virt_to_phys(virt_addr), PAGE_ALIGN(size),
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DMA_BIDIRECTIONAL, dma_mask);
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if (*dma_addr == AMD_IOMMU_MAPPING_ERROR)
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goto out_free;
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return page_address(page);
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return virt_addr;
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out_free:
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if (!dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT))
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__free_pages(page, get_order(size));
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dma_direct_free(dev, size, virt_addr, *dma_addr, attrs);
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return NULL;
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}
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@ -2654,24 +2636,17 @@ static void free_coherent(struct device *dev, size_t size,
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void *virt_addr, dma_addr_t dma_addr,
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unsigned long attrs)
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{
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struct protection_domain *domain;
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struct dma_ops_domain *dma_dom;
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struct page *page;
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struct protection_domain *domain = get_domain(dev);
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page = virt_to_page(virt_addr);
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size = PAGE_ALIGN(size);
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domain = get_domain(dev);
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if (IS_ERR(domain))
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goto free_mem;
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if (!IS_ERR(domain)) {
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struct dma_ops_domain *dma_dom = to_dma_ops_domain(domain);
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dma_dom = to_dma_ops_domain(domain);
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__unmap_single(dma_dom, dma_addr, size, DMA_BIDIRECTIONAL);
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}
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__unmap_single(dma_dom, dma_addr, size, DMA_BIDIRECTIONAL);
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free_mem:
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if (!dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT))
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__free_pages(page, get_order(size));
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dma_direct_free(dev, size, virt_addr, dma_addr, attrs);
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}
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/*
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@ -2680,7 +2655,7 @@ free_mem:
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*/
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static int amd_iommu_dma_supported(struct device *dev, u64 mask)
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{
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if (!x86_dma_supported(dev, mask))
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if (!dma_direct_supported(dev, mask))
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return 0;
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return check_device(dev);
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}
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@ -2794,7 +2769,7 @@ int __init amd_iommu_init_dma_ops(void)
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* continue to be SWIOTLB.
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*/
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if (!swiotlb)
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dma_ops = &nommu_dma_ops;
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dma_ops = &dma_direct_ops;
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if (amd_iommu_unmap_flush)
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pr_info("AMD-Vi: IO/TLB flush on unmap enabled\n");
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@ -31,6 +31,7 @@
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#include <linux/pci.h>
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#include <linux/dmar.h>
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#include <linux/dma-mapping.h>
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#include <linux/dma-direct.h>
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#include <linux/mempool.h>
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#include <linux/memory.h>
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#include <linux/cpu.h>
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@ -45,6 +46,7 @@
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#include <linux/pci-ats.h>
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#include <linux/memblock.h>
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#include <linux/dma-contiguous.h>
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#include <linux/dma-direct.h>
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#include <linux/crash_dump.h>
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#include <asm/irq_remapping.h>
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#include <asm/cacheflush.h>
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@ -3707,61 +3709,30 @@ static void *intel_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flags,
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unsigned long attrs)
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{
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struct page *page = NULL;
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int order;
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void *vaddr;
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size = PAGE_ALIGN(size);
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order = get_order(size);
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vaddr = dma_direct_alloc(dev, size, dma_handle, flags, attrs);
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if (iommu_no_mapping(dev) || !vaddr)
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return vaddr;
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if (!iommu_no_mapping(dev))
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flags &= ~(GFP_DMA | GFP_DMA32);
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else if (dev->coherent_dma_mask < dma_get_required_mask(dev)) {
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if (dev->coherent_dma_mask < DMA_BIT_MASK(32))
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flags |= GFP_DMA;
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else
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flags |= GFP_DMA32;
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}
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if (gfpflags_allow_blocking(flags)) {
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unsigned int count = size >> PAGE_SHIFT;
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page = dma_alloc_from_contiguous(dev, count, order, flags);
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if (page && iommu_no_mapping(dev) &&
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page_to_phys(page) + size > dev->coherent_dma_mask) {
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dma_release_from_contiguous(dev, page, count);
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page = NULL;
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}
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}
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if (!page)
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page = alloc_pages(flags, order);
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if (!page)
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return NULL;
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memset(page_address(page), 0, size);
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*dma_handle = __intel_map_single(dev, page_to_phys(page), size,
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DMA_BIDIRECTIONAL,
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dev->coherent_dma_mask);
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if (*dma_handle)
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return page_address(page);
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if (!dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT))
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__free_pages(page, order);
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*dma_handle = __intel_map_single(dev, virt_to_phys(vaddr),
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PAGE_ALIGN(size), DMA_BIDIRECTIONAL,
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dev->coherent_dma_mask);
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if (!*dma_handle)
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goto out_free_pages;
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return vaddr;
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out_free_pages:
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dma_direct_free(dev, size, vaddr, *dma_handle, attrs);
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return NULL;
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}
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static void intel_free_coherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle, unsigned long attrs)
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{
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int order;
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struct page *page = virt_to_page(vaddr);
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size = PAGE_ALIGN(size);
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order = get_order(size);
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intel_unmap(dev, dma_handle, size);
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if (!dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT))
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__free_pages(page, order);
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if (!iommu_no_mapping(dev))
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intel_unmap(dev, dma_handle, PAGE_ALIGN(size));
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dma_direct_free(dev, size, vaddr, dma_handle, attrs);
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}
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static void intel_unmap_sg(struct device *dev, struct scatterlist *sglist,
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@ -3871,7 +3842,7 @@ const struct dma_map_ops intel_dma_ops = {
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.unmap_page = intel_unmap_page,
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.mapping_error = intel_mapping_error,
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#ifdef CONFIG_X86
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.dma_supported = x86_dma_supported,
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.dma_supported = dma_direct_supported,
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#endif
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};
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