From 3069f22ae0515c8edbd6f92b583935fddf9987d9 Mon Sep 17 00:00:00 2001 From: spuligil Date: Tue, 3 Mar 2020 12:00:52 -0800 Subject: [PATCH] fw-api: CL 9727569 - update fw common interface files HTT stats: UL OFDMA stats Change-Id: Ia7c2268a49d6a0709d84f9bdbe98ae2b720c0b9e CRs-Fixed: 2262693 --- fw/htt.h | 6 ++- fw/htt_stats.h | 140 +++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 145 insertions(+), 1 deletion(-) diff --git a/fw/htt.h b/fw/htt.h index 63d8f785bb9f..0389c15ffca1 100644 --- a/fw/htt.h +++ b/fw/htt.h @@ -200,9 +200,10 @@ * 3.76 Add HTT_H2T_MSG_TYPE_3_TUPLE_HASH_CFG msg. * 3.77 Add HTT_H2T_MSG_TYPE_RX_FULL_MONITOR_MODE msg. * 3.78 Add htt_ppdu_id def. + * 3.79 Add HTT_NUM_AC_WMM def. */ #define HTT_CURRENT_VERSION_MAJOR 3 -#define HTT_CURRENT_VERSION_MINOR 78 +#define HTT_CURRENT_VERSION_MINOR 79 #define HTT_NUM_TX_FRAG_DESC 1024 @@ -252,6 +253,9 @@ enum HTT_AC_WMM { HTT_AC_WMM_BK = 0x1, HTT_AC_WMM_VI = 0x2, HTT_AC_WMM_VO = 0x3, + + HTT_NUM_AC_WMM = 0x4, + /* extension Access Categories */ HTT_AC_EXT_NON_QOS = 0x4, HTT_AC_EXT_UCAST_MGMT = 0x5, diff --git a/fw/htt_stats.h b/fw/htt_stats.h index cd6ebae7df09..35ed6109d3a2 100644 --- a/fw/htt_stats.h +++ b/fw/htt_stats.h @@ -349,6 +349,14 @@ enum htt_dbg_ext_stats_type { */ HTT_DBG_EXT_STATS_TXBF_OFDMA = 32, + /* HTT_DBG_EXT_STA_11AX_UL_STATS + * PARAMS: + * - No Params + * RESP MSG: + * - htt_sta_11ax_ul_stats + */ + HTT_DBG_EXT_STA_11AX_UL_STATS = 33, + /* keep this last */ HTT_DBG_NUM_EXT_STATS = 256, }; @@ -490,6 +498,7 @@ typedef enum { HTT_STATS_TXBF_OFDMA_NDP_STATS_TAG = 114, /* htt_txbf_ofdma_ndp_stats_tlv */ HTT_STATS_TXBF_OFDMA_BRP_STATS_TAG = 115, /* htt_txbf_ofdma_brp_stats_tlv */ HTT_STATS_TXBF_OFDMA_STEER_STATS_TAG = 116, /* htt_txbf_ofdma_steer_stats_tlv */ + HTT_STATS_STA_UL_OFDMA_STATS_TAG = 117, /* htt_sta_ul_ofdma_stats_tlv */ HTT_STATS_MAX_TAG, } htt_tlv_tag_t; @@ -3760,6 +3769,8 @@ typedef struct { ((_var) |= ((_val) << HTT_STATS_CMN_MAC_ID_S)); \ } while (0) +#define HTT_RX_UL_MAX_UPLINK_RSSI_TRACK 5 + typedef struct { htt_tlv_hdr_t tlv_hdr; @@ -3784,6 +3795,31 @@ typedef struct { */ A_UINT32 rx_ulofdma_data_ru_size_ppdu[HTT_RX_PDEV_STATS_NUM_RU_SIZE_160MHZ_CNTRS]; /* ppdu level */ A_UINT32 rx_ulofdma_non_data_ru_size_ppdu[HTT_RX_PDEV_STATS_NUM_RU_SIZE_160MHZ_CNTRS]; /* ppdu level */ + + /* + * These arrays hold Target RSSI (rx power the AP wants), + * FD RSSI (rx power the AP sees) & Power headroom values of STAs + * which can be identified by AIDs, during trigger based RX. + * Array acts a circular buffer and holds values for last 5 STAs + * in the same order as RX. + */ + /* uplink_sta_aid: + * STA AID array for identifying which STA the + * Target-RSSI / FD-RSSI / pwr headroom stats are for + */ + A_UINT32 uplink_sta_aid[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK]; + /* uplink_sta_target_rssi: + * Trig Target RSSI for STA AID in same index - UNIT(dBm) + */ + A_INT32 uplink_sta_target_rssi[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK]; + /* uplink_sta_fd_rssi: + * Trig FD RSSI from STA AID in same index - UNIT(dBm) + */ + A_INT32 uplink_sta_fd_rssi[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK]; + /* uplink_sta_power_headroom: + * Trig power headroom for STA AID in same idx - UNIT(dB) + */ + A_UINT32 uplink_sta_power_headroom[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK]; } htt_rx_pdev_ul_trigger_stats_tlv; /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_UL_TRIG_STATS @@ -4847,4 +4883,108 @@ typedef struct { htt_tx_pdev_txbf_rate_stats_tlv txbf_rate_stats; } htt_pdev_txbf_rate_stats_t; +typedef enum { + HTT_ULTRIG_QBOOST_TRIGGER = 0, + HTT_ULTRIG_PSPOLL_TRIGGER, + HTT_ULTRIG_UAPSD_TRIGGER, + HTT_ULTRIG_11AX_TRIGGER, + HTT_ULTRIG_11AX_WILDCARD_TRIGGER, + HTT_ULTRIG_11AX_UNASSOC_WILDCARD_TRIGGER, + HTT_STA_UL_OFDMA_NUM_TRIG_TYPE, +} HTT_STA_UL_OFDMA_RX_TRIG_TYPE; + +typedef enum { + HTT_11AX_TRIGGER_BASIC_E = 0, + HTT_11AX_TRIGGER_BRPOLL_E = 1, + HTT_11AX_TRIGGER_MU_BAR_E = 2, + HTT_11AX_TRIGGER_MU_RTS_E = 3, + HTT_11AX_TRIGGER_BUFFER_SIZE_E = 4, + HTT_11AX_TRIGGER_GCR_MU_BAR_E = 5, + HTT_11AX_TRIGGER_BQRP_E = 6, + HTT_11AX_TRIGGER_NDP_FB_REPORT_POLL_E = 7, + HTT_11AX_TRIGGER_RESERVED_8_E = 8, + HTT_11AX_TRIGGER_RESERVED_9_E = 9, + HTT_11AX_TRIGGER_RESERVED_10_E = 10, + HTT_11AX_TRIGGER_RESERVED_11_E = 11, + HTT_11AX_TRIGGER_RESERVED_12_E = 12, + HTT_11AX_TRIGGER_RESERVED_13_E = 13, + HTT_11AX_TRIGGER_RESERVED_14_E = 14, + HTT_11AX_TRIGGER_RESERVED_15_E = 15, + HTT_STA_UL_OFDMA_NUM_11AX_TRIG_TYPE, +} HTT_STA_UL_OFDMA_11AX_TRIG_TYPE; + +/* UL RESP Queues 0 - HIPRI, 1 - LOPRI & 2 - BSR */ +#define HTT_STA_UL_OFDMA_NUM_UL_QUEUES 3 +/* Actual resp type sent by STA for trigger + * 0 - HE TB PPDU, 1 - NULL Delimiter */ +#define HTT_STA_UL_OFDMA_NUM_RESP_END_TYPE 2 +/* Counter for MCS 0-13 */ +#define HTT_STA_UL_OFDMA_NUM_MCS_COUNTERS 14 +/* Counters BW 20,40,80,160,320 */ +#define HTT_STA_UL_OFDMA_NUM_BW_COUNTERS 5 + +/* STATS_TYPE : HTT_DBG_EXT_STA_11AX_UL_STATS + * TLV_TAGS: + * - HTT_STATS_STA_UL_OFDMA_STATS_TAG + */ +typedef struct { + htt_tlv_hdr_t tlv_hdr; + + A_UINT32 pdev_id; + + /* Trigger Type reported by HWSCH on RX reception + * Each index populate enum HTT_STA_UL_OFDMA_RX_TRIG_TYPE */ + A_UINT32 rx_trigger_type[HTT_STA_UL_OFDMA_NUM_TRIG_TYPE]; + /* 11AX Trigger Type on RX reception + * Each index populate enum HTT_STA_UL_OFDMA_11AX_TRIG_TYPE */ + A_UINT32 ax_trigger_type[HTT_STA_UL_OFDMA_NUM_11AX_TRIG_TYPE]; + + /* Num data PPDUs/Delims responded to trigs. per HWQ for UL RESP */ + A_UINT32 num_data_ppdu_responded_per_hwq[HTT_STA_UL_OFDMA_NUM_UL_QUEUES]; + A_UINT32 num_null_delimiters_responded_per_hwq[HTT_STA_UL_OFDMA_NUM_UL_QUEUES]; + /* Overall UL STA RESP Status 0 - HE TB PPDU, 1 - NULL Delimiter + * Super set of num_data_ppdu_responded_per_hwq, num_null_delimiters_responded_per_hwq */ + A_UINT32 num_total_trig_responses[HTT_STA_UL_OFDMA_NUM_RESP_END_TYPE]; + + /* Time interval between current time ms and last successful trigger RX + * 0xFFFFFFFF denotes no trig received / timestamp roll back */ + A_UINT32 last_trig_rx_time_delta_ms; + + /* Rate Statistics for UL OFDMA + * UL TB PPDU TX MCS, NSS, GI, BW from STA HWQ */ + A_UINT32 ul_ofdma_tx_mcs[HTT_STA_UL_OFDMA_NUM_MCS_COUNTERS]; + A_UINT32 ul_ofdma_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS]; + A_UINT32 ul_ofdma_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_STA_UL_OFDMA_NUM_MCS_COUNTERS]; + A_UINT32 ul_ofdma_tx_ldpc; + A_UINT32 ul_ofdma_tx_bw[HTT_STA_UL_OFDMA_NUM_BW_COUNTERS]; + + /* Trig based PPDU TX/ RBO based PPDU TX Count */ + A_UINT32 trig_based_ppdu_tx; + A_UINT32 rbo_based_ppdu_tx; + /* Switch MU EDCA to SU EDCA Count */ + A_UINT32 mu_edca_to_su_edca_switch_count; + /* Num MU EDCA applied Count */ + A_UINT32 num_mu_edca_param_apply_count; + + /* Current MU EDCA Parameters for WMM ACs + * Mode - 0 - SU EDCA, 1- MU EDCA */ + A_UINT32 current_edca_hwq_mode[HTT_NUM_AC_WMM]; + /* Contention Window minimum. Range: 1 - 10 */ + A_UINT32 current_cw_min[HTT_NUM_AC_WMM]; + /* Contention Window maximum. Range: 1 - 10 */ + A_UINT32 current_cw_max[HTT_NUM_AC_WMM]; + /* AIFS value - 0 -255 */ + A_UINT32 current_aifs[HTT_NUM_AC_WMM]; + +} htt_sta_ul_ofdma_stats_tlv; + +/* NOTE: + * This structure is for documentation, and cannot be safely used directly. + * Instead, use the constituent TLV structures to fill/parse. + */ +typedef struct { + htt_sta_ul_ofdma_stats_tlv ul_ofdma_sta_stats; +} htt_sta_11ax_ul_stats_t; + + #endif /* __HTT_STATS_H__ */