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ASoC: TWL4030: Correct bypass event for voice sidetone
Event for voice sidetone was being interpreted as an analog HiFi bypass event because VSTPGA register offset is less than ARXR2_APGA_CTL offset. Reordering the register checks allows to handle voice digital bypass event properly. Signed-off-by: Misael Lopez Cruz <[email protected]> Acked-by: Peter Ujfalusi <[email protected]> Signed-off-by: Mark Brown <[email protected]>
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1 changed files with 13 additions and 7 deletions
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@ -712,7 +712,19 @@ static int bypass_event(struct snd_soc_dapm_widget *w,
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reg = twl4030_read_reg_cache(w->codec, m->reg);
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if (m->reg <= TWL4030_REG_ARXR2_APGA_CTL) {
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/*
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* bypass_state[0:3] - analog HiFi bypass
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* bypass_state[4] - analog voice bypass
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* bypass_state[5] - digital voice bypass
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* bypass_state[6:7] - digital HiFi bypass
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*/
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if (m->reg == TWL4030_REG_VSTPGA) {
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/* Voice digital bypass */
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if (reg)
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twl4030->bypass_state |= (1 << 5);
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else
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twl4030->bypass_state &= ~(1 << 5);
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} else if (m->reg <= TWL4030_REG_ARXR2_APGA_CTL) {
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/* Analog bypass */
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if (reg & (1 << m->shift))
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twl4030->bypass_state |=
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@ -726,12 +738,6 @@ static int bypass_event(struct snd_soc_dapm_widget *w,
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twl4030->bypass_state |= (1 << 4);
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else
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twl4030->bypass_state &= ~(1 << 4);
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} else if (m->reg == TWL4030_REG_VSTPGA) {
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/* Voice digital bypass */
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if (reg)
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twl4030->bypass_state |= (1 << 5);
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else
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twl4030->bypass_state &= ~(1 << 5);
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} else {
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/* Digital bypass */
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if (reg & (0x7 << m->shift))
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