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qcacmn: Fix few bugs in HIF DP Interrupt handling

Browse source 
Use disable_irq_nosync instead of disable_irq, as it is invoked
from handler for same IRQs which have to be disabled.
disable_irq waits for completion of IRQ thus causing a deadlock.
Initialize an unitialized variable in hif and fix the
DP interrupt names to match with the ones in dts file

CRs-Fixed: 1099955
Change-Id: I311eebb863fe3fb4d8c399e0817bc7d9af0b0e31
This commit is contained in:
Pamidipati, Vijay 2016-10-26 21:54:23 +05:30 • committed by qcabuildsw
commit 30dc8f2e1c
2 changed files with 41 additions and 40 deletions
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1
hif/src/hif_main.c
View file

@ -1227,6 +1227,7 @@ uint32_t hif_register_ext_group_int_handler(struct hif_opaque_softc *hif_ctx,
hif_ext_group->handler = handler;
hif_ext_group->configured = true;
hif_ext_group->grp_id = hif_state->hif_num_extgroup;
hif_ext_group->hif_state = hif_state;
hif_state->hif_num_extgroup++;
return QDF_STATUS_SUCCESS;

80
hif/src/snoc/if_ahb.c
View file

@ -44,9 +44,9 @@
static uint8_t ic_irqnum[HIF_IC_MAX_IRQ];
/* integrated chip irq names */
const char *ic_irqname[HIF_IC_MAX_IRQ] = {
"misc_pulse1",
"misc_latch",
"sw_exception",
"misc-pulse1",
"misc-latch",
"sw-exception",
"watchdog",
"ce0",
"ce1",
@ -62,42 +62,42 @@ const char *ic_irqname[HIF_IC_MAX_IRQ] = {
"ce11",
"ce12",
"ce13",
"host2wbm_desc_feed",
"host2reo_re_injection",
"host2reo_command",
"host2rxdma_monitor_ring3",
"host2rxdma_monitor_ring2",
"host2rxdma_monitor_ring1",
"reo2ost_exception",
"wbm2host_rx_release",
"reo2host_status",
"reo2host_destination_ring4",
"reo2host_destination_ring3",
"reo2host_destination_ring2",
"reo2host_destination_ring1",
"rxdma2host_monitor_destination_mac3",
"rxdma2host_monitor_destination_mac2",
"rxdma2host_monitor_destination_mac1",
"ppdu_end_interrupts_mac3",
"ppdu_end_interrupts_mac2",
"ppdu_end_interrupts_mac1",
"rxdma2host_monitor_status_ring_mac3",
"rxdma2host_monitor_status_ring_mac2",
"rxdma2host_monitor_status_ring_mac1",
"host2rxdma_host_buf_ring_mac3",
"host2rxdma_host_buf_ring_mac2",
"host2rxdma_host_buf_ring_mac1",
"rxdma2host_destination_ring_mac3",
"rxdma2host_destination_ring_mac2",
"rxdma2host_destination_ring_mac1",
"host2tcl_input_ring4",
"host2tcl_input_ring3",
"host2tcl_input_ring2",
"host2tcl_input_ring1",
"wbm2host_tx_completions_ring3",
"wbm2host_tx_completions_ring2",
"wbm2host_tx_completions_ring1",
"tcl2host_status_ring",
"host2wbm-desc-feed",
"host2reo-re-injection",
"host2reo-command",
"host2rxdma-monitor-ring3",
"host2rxdma-monitor-ring2",
"host2rxdma-monitor-ring1",
"reo2ost-exception",
"wbm2host-rx-release",
"reo2host-status",
"reo2host-destination-ring4",
"reo2host-destination-ring3",
"reo2host-destination-ring2",
"reo2host-destination-ring1",
"rxdma2host-monitor-destination-mac3",
"rxdma2host-monitor-destination-mac2",
"rxdma2host-monitor-destination-mac1",
"ppdu-end-interrupts-mac3",
"ppdu-end-interrupts-mac2",
"ppdu-end-interrupts-mac1",
"rxdma2host-monitor-status-ring-mac3",
"rxdma2host-monitor-status-ring-mac2",
"rxdma2host-monitor-status-ring-mac1",
"host2rxdma-host-buf-ring-mac3",
"host2rxdma-host-buf-ring-mac2",
"host2rxdma-host-buf-ring-mac1",
"rxdma2host-destination-ring-mac3",
"rxdma2host-destination-ring-mac2",
"rxdma2host-destination-ring-mac1",
"host2tcl-input-ring4",
"host2tcl-input-ring3",
"host2tcl-input-ring2",
"host2tcl-input-ring1",
"wbm2host-tx-completions-ring3",
"wbm2host-tx-completions-ring2",
"wbm2host-tx-completions-ring1",
"tcl2host-status-ring",
};
/**
@ -661,7 +661,7 @@ void hif_ahb_grp_irq_disable(struct hif_softc *scn, uint32_t grp_id)
hif_ext_group = &hif_state->hif_ext_group[grp_id];
for (i = 0; i < hif_ext_group->numirq; i++) {
disable_irq(ic_irqnum[hif_ext_group->irq[i]]);
disable_irq_nosync(ic_irqnum[hif_ext_group->irq[i]]);
}
}