A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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ARM: dts: msm: Add DPC property for SA8195

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Add "dynamic-power-coefficient" property to all cores.
The "capacity-dmips-mhz" and "dynamic-power-coefficient"
are used to build Energy Model which in turn used by EAS to
take placement decisions.

Change-Id: I56f0f7bd6a623dcfd2cbf2dca370681011aa876b
This commit is contained in:
Shreyas K K 2021-02-12 13:17:54 +05:30
commit 30eb99ee1a
1 changed files with 8 additions and 0 deletions
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8
qcom/sdmshrike.dtsi
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@ -50,6 +50,7 @@
reg = <0x0 0x0>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
cache-size = <0x8000>;
next-level-cache = <&L2_0>;
qcom,freq-domain = <&cpufreq_hw 0 4>;
@ -74,6 +75,7 @@
reg = <0x0 0x100>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
cache-size = <0x8000>;
next-level-cache = <&L2_1>;
qcom,freq-domain = <&cpufreq_hw 0 4>;
@ -92,6 +94,7 @@
reg = <0x0 0x200>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
cache-size = <0x8000>;
next-level-cache = <&L2_2>;
qcom,freq-domain = <&cpufreq_hw 0 4>;
@ -110,6 +113,7 @@
reg = <0x0 0x300>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
cache-size = <0x8000>;
next-level-cache = <&L2_3>;
qcom,freq-domain = <&cpufreq_hw 0 4>;
@ -128,6 +132,7 @@
reg = <0x0 0x400>;
enable-method = "psci";
capacity-dmips-mhz = <1740>;
dynamic-power-coefficient = <431>;
cache-size = <0x20000>;
next-level-cache = <&L2_4>;
qcom,freq-domain = <&cpufreq_hw 1 4>;
@ -146,6 +151,7 @@
reg = <0x0 0x500>;
enable-method = "psci";
capacity-dmips-mhz = <1740>;
dynamic-power-coefficient = <431>;
cache-size = <0x20000>;
next-level-cache = <&L2_5>;
qcom,freq-domain = <&cpufreq_hw 1 4>;
@ -164,6 +170,7 @@
reg = <0x0 0x600>;
enable-method = "psci";
capacity-dmips-mhz = <1740>;
dynamic-power-coefficient = <431>;
cache-size = <0x20000>;
next-level-cache = <&L2_6>;
qcom,freq-domain = <&cpufreq_hw 1 4>;
@ -182,6 +189,7 @@
reg = <0x0 0x700>;
enable-method = "psci";
capacity-dmips-mhz = <1740>;
dynamic-power-coefficient = <431>;
cache-size = <0x20000>;
next-level-cache = <&L2_7>;
qcom,freq-domain = <&cpufreq_hw 1 4>;