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Merge "ARM: dts: msm: Enable SD card support on Lahaina"

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qctecmdr 2020-03-02 04:36:29 -08:00 • committed by Gerrit - the friendly Code Review server
commit 312b1f8c3b
6 changed files with 88 additions and 59 deletions
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8
qcom/lahaina-cdp.dtsi
View file

@ -85,13 +85,13 @@
qcom,vdd-io-voltage-level = <1808000 2960000>;
qcom,vdd-io-current-level = <200 22000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &storage_cd>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &storage_cd>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_on>;
pinctrl-1 = <&sdc2_off>;
cd-gpios = <&tlmm 92 GPIO_ACTIVE_LOW>;
status = "disabled";
status = "ok"
};

8
qcom/lahaina-mtp.dtsi
View file

@ -87,13 +87,13 @@
qcom,vdd-io-voltage-level = <1808000 2960000>;
qcom,vdd-io-current-level = <200 22000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &storage_cd>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &storage_cd>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_on>;
pinctrl-1 = <&sdc2_off>;
cd-gpios = <&tlmm 92 GPIO_ACTIVE_LOW>;
status = "disabled";
status = "ok"
};

81
qcom/lahaina-pinctrl.dtsi
View file

@ -82,64 +82,55 @@
};
};
storage_cd: storage_cd {
mux {
pins = "gpio92";
function = "gpio";
};
config {
pins = "gpio92";
bias-pull-up; /* pull up */
drive-strength = <2>; /* 2 MA */
};
};
sdc2_clk_on: sdc2_clk_on {
config {
sdc2_on: sdc2_on {
clk {
pins = "sdc2_clk";
bias-disable; /* NO pull */
drive-strength = <16>; /* 16 MA */
bias-disable;
drive-strength = <16>;
};
cmd {
pins = "sdc2_cmd";
bias-pull-up;
drive-strength = <10>;
};
data {
pins = "sdc2_data";
bias-pull-up;
drive-strength = <10>;
};
sd-cd {
pins = "gpio92";
bias-pull-up;
drive-strength = <2>;
};
};
sdc2_clk_off: sdc2_clk_off {
config {
sdc2_off: sdc2_off {
clk {
pins = "sdc2_clk";
bias-disable; /* NO pull */
drive-strength = <2>; /* 2 MA */
bias-disable;
drive-strength = <2>;
};
};
sdc2_cmd_on: sdc2_cmd_on {
config {
cmd {
pins = "sdc2_cmd";
bias-pull-up; /* pull up */
drive-strength = <16>; /* 16 MA */
bias-pull-up;
drive-strength = <2>;
};
};
sdc2_cmd_off: sdc2_cmd_off {
config {
pins = "sdc2_cmd";
bias-pull-up; /* pull up */
drive-strength = <2>; /* 2 MA */
};
};
sdc2_data_on: sdc2_data_on {
config {
data {
pins = "sdc2_data";
bias-pull-up; /* pull up */
drive-strength = <16>; /* 16 MA */
bias-pull-up;
drive-strength = <2>;
};
};
sdc2_data_off: sdc2_data_off {
config {
pins = "sdc2_data";
bias-pull-up; /* pull up */
drive-strength = <2>; /* 2 MA */
sd-cd {
pins = "gpio92";
bias-disable;
drive-strength = <2>;
};
};

18
qcom/lahaina-qrd.dtsi
View file

@ -32,6 +32,24 @@
status = "ok"
};
&sdhc_2 {
vdd-supply = <&pm8350c_l9>;
qcom,vdd-voltage-level = <2950000 2960000>;
qcom,vdd-current-level = <200 800000>;
vdd-io-supply = <&pm8350c_l6>;
qcom,vdd-io-voltage-level = <1808000 2960000>;
qcom,vdd-io-current-level = <200 22000>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_on>;
pinctrl-1 = <&sdc2_off>;
cd-gpios = <&tlmm 92 GPIO_ACTIVE_LOW>;
status = "disabled";
};
&swr_dmic_01 {
status = "disabled";
};

6
qcom/lahaina-rumi.dtsi
View file

@ -58,9 +58,9 @@
qcom,vdd-io-voltage-level = <1808000 2960000>;
qcom,vdd-io-current-level = <200 22000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &storage_cd>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &storage_cd>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_on>;
pinctrl-1 = <&sdc2_off>;
cd-gpios = <&tlmm 92 GPIO_ACTIVE_LOW>;

34
qcom/lahaina.dtsi
View file

@ -1593,7 +1593,7 @@
sdhc_2: sdhci@8804000 {
compatible = "qcom,sdhci-msm-v5";
reg = <0x8804000 0x1000>;
reg = <0x08804000 0x1000>;
reg-names = "hc_mem";
interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
@ -1603,6 +1603,32 @@
qcom,bus-width = <4>;
qcom,large-address-bus;
interconnects = <&aggre2_noc MASTER_SDCC_2 &mc_virt SLAVE_EBI1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_SDCC_2>;
interconnect-names = "sdhc-ddr","cpu-sdhc";
qcom,msm-bus,name = "sdhc2";
qcom,msm-bus,num-cases = <8>;
qcom,msm-bus,num-paths = <2>;
qcom,msm-bus,vectors-KBps =
/* No Vote */
<0 0>, <0 0>,
/* 400 KB/s*/
<1046 1600>, <1600 1600>,
/* 20 MB/s */
<52286 80000>, <80000 80000>,
/* 25 MB/s */
<65360 100000>, <100000 100000>,
/* 50 MB/s */
<130718 200000>, <133320 133320>,
/* 100 MB/s */
<261438 200000>, <150000 150000>,
/* 200 MB/s */
<261438 400000>, <300000 300000>,
/* Max. bandwidth */
<1338562 4096000>, <1338562 4096000>;
qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
100750000 200000000 4294967295>;
qcom,restore-after-cx-collapse;
qcom,clk-rates = <400000 20000000 25000000
@ -1615,12 +1641,6 @@
<&clock_gcc GCC_SDCC2_APPS_CLK>;
clock-names = "iface", "core";
/* PM QoS */
qcom,pm-qos-irq-type = "affine_irq";
qcom,pm-qos-irq-latency = <44 44>;
qcom,pm-qos-cpu-groups = <0x3f 0xc0>;
qcom,pm-qos-legacy-latency-us = <44 44>, <44 44>;
/* DLL HSR settings. Refer go/hsr - <Target> DLL settings */
qcom,dll-hsr-list = <0x0007642C 0xA800 0x10
0x2C010800 0x80040868>;