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sm501: add support for the SM502 programmable PLL
SM502 has a programmable PLL which can provide the panel pixel clock instead of the 288MHz and 336MHz PLLs. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Ville Syrjala <syrjala@sci.fi> Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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3 changed files with 133 additions and 36 deletions
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@ -129,11 +129,14 @@
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#define SM501_DEVICEID_SM501 (0x05010000)
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#define SM501_DEVICEID_IDMASK (0xffff0000)
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#define SM501_DEVICEID_REVMASK (0x000000ff)
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#define SM501_PLLCLOCK_COUNT (0x000064)
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#define SM501_MISC_TIMING (0x000068)
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#define SM501_CURRENT_SDRAM_CLOCK (0x00006C)
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#define SM501_PROGRAMMABLE_PLL_CONTROL (0x000074)
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/* GPIO base */
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#define SM501_GPIO (0x010000)
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#define SM501_GPIO_DATA_LOW (0x00)
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@ -24,7 +24,8 @@ extern int sm501_unit_power(struct device *dev,
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extern unsigned long sm501_set_clock(struct device *dev,
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int clksrc, unsigned long freq);
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extern unsigned long sm501_find_clock(int clksrc, unsigned long req_freq);
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extern unsigned long sm501_find_clock(struct device *dev,
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int clksrc, unsigned long req_freq);
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/* sm501_misc_control
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*
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