mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-29 03:01:39 -04:00
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: bnx2x: Accessing un-mapped page ath9k: Fix TX control flag use for no ACK and RTS/CTS ath9k: Fix TX status reporting iwlwifi: fix STATUS_EXIT_PENDING is not set on pci_remove iwlwifi: call apm stop on exit iwlwifi: fix Tx cmd memory allocation failure handling iwlwifi: fix rx_chain computation iwlwifi: fix station mimo power save values iwlwifi: remove false rxon if rx chain changes iwlwifi: fix hidden ssid discovery in passive channels iwlwifi: W/A for the TSF correction in IBSS netxen: Remove workaround for chipset quirk pcnet-cs, axnet_cs: add new IDs, remove dup ID with less info ixgbe: initialize interrupt throttle rate net/usb/pegasus: avoid hundreds of diagnostics tipc: Don't use structure names which easily globally conflict.
This commit is contained in:
commit
316343e2cf
35 changed files with 248 additions and 213 deletions
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@ -151,6 +151,8 @@ struct sw_rx_page {
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#define PAGES_PER_SGE_SHIFT 0
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#define PAGES_PER_SGE (1 << PAGES_PER_SGE_SHIFT)
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#define BCM_RX_ETH_PAYLOAD_ALIGN 64
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/* SGE ring related macros */
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#define NUM_RX_SGE_PAGES 2
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#define RX_SGE_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_sge))
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@ -750,8 +752,7 @@ struct bnx2x {
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u32 rx_csum;
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u32 rx_offset;
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u32 rx_buf_use_size; /* useable size */
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u32 rx_buf_size; /* with alignment */
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u32 rx_buf_size;
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#define ETH_OVREHEAD (ETH_HLEN + 8) /* 8 for CRC + VLAN */
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#define ETH_MIN_PACKET_SIZE 60
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#define ETH_MAX_PACKET_SIZE 1500
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@ -59,8 +59,8 @@
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#include "bnx2x.h"
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#include "bnx2x_init.h"
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#define DRV_MODULE_VERSION "1.45.20"
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#define DRV_MODULE_RELDATE "2008/08/25"
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#define DRV_MODULE_VERSION "1.45.21"
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#define DRV_MODULE_RELDATE "2008/09/03"
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#define BNX2X_BC_VER 0x040200
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/* Time in jiffies before concluding the transmitter is hung */
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@ -1027,7 +1027,7 @@ static inline int bnx2x_alloc_rx_skb(struct bnx2x *bp,
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if (unlikely(skb == NULL))
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return -ENOMEM;
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mapping = pci_map_single(bp->pdev, skb->data, bp->rx_buf_use_size,
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mapping = pci_map_single(bp->pdev, skb->data, bp->rx_buf_size,
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PCI_DMA_FROMDEVICE);
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if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
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dev_kfree_skb(skb);
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@ -1169,7 +1169,7 @@ static void bnx2x_tpa_start(struct bnx2x_fastpath *fp, u16 queue,
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/* move empty skb from pool to prod and map it */
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prod_rx_buf->skb = fp->tpa_pool[queue].skb;
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mapping = pci_map_single(bp->pdev, fp->tpa_pool[queue].skb->data,
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bp->rx_buf_use_size, PCI_DMA_FROMDEVICE);
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bp->rx_buf_size, PCI_DMA_FROMDEVICE);
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pci_unmap_addr_set(prod_rx_buf, mapping, mapping);
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/* move partial skb from cons to pool (don't unmap yet) */
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@ -1276,7 +1276,7 @@ static void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp,
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pool entry status to BNX2X_TPA_STOP even if new skb allocation
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fails. */
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pci_unmap_single(bp->pdev, pci_unmap_addr(rx_buf, mapping),
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bp->rx_buf_use_size, PCI_DMA_FROMDEVICE);
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bp->rx_buf_size, PCI_DMA_FROMDEVICE);
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if (likely(new_skb)) {
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/* fix ip xsum and give it to the stack */
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@ -1520,7 +1520,7 @@ static int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget)
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} else if (bnx2x_alloc_rx_skb(bp, fp, bd_prod) == 0) {
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pci_unmap_single(bp->pdev,
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pci_unmap_addr(rx_buf, mapping),
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bp->rx_buf_use_size,
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bp->rx_buf_size,
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PCI_DMA_FROMDEVICE);
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skb_reserve(skb, pad);
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skb_put(skb, len);
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@ -4229,7 +4229,7 @@ static inline void bnx2x_free_tpa_pool(struct bnx2x *bp,
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if (fp->tpa_state[i] == BNX2X_TPA_START)
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pci_unmap_single(bp->pdev,
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pci_unmap_addr(rx_buf, mapping),
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bp->rx_buf_use_size,
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bp->rx_buf_size,
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PCI_DMA_FROMDEVICE);
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dev_kfree_skb(skb);
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@ -4245,15 +4245,14 @@ static void bnx2x_init_rx_rings(struct bnx2x *bp)
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u16 ring_prod, cqe_ring_prod;
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int i, j;
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bp->rx_buf_use_size = bp->dev->mtu;
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bp->rx_buf_use_size += bp->rx_offset + ETH_OVREHEAD;
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bp->rx_buf_size = bp->rx_buf_use_size + 64;
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bp->rx_buf_size = bp->dev->mtu;
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bp->rx_buf_size += bp->rx_offset + ETH_OVREHEAD +
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BCM_RX_ETH_PAYLOAD_ALIGN;
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if (bp->flags & TPA_ENABLE_FLAG) {
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DP(NETIF_MSG_IFUP,
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"rx_buf_use_size %d rx_buf_size %d effective_mtu %d\n",
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bp->rx_buf_use_size, bp->rx_buf_size,
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bp->dev->mtu + ETH_OVREHEAD);
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"rx_buf_size %d effective_mtu %d\n",
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bp->rx_buf_size, bp->dev->mtu + ETH_OVREHEAD);
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for_each_queue(bp, j) {
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struct bnx2x_fastpath *fp = &bp->fp[j];
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@ -4462,9 +4461,10 @@ static void bnx2x_init_context(struct bnx2x *bp)
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context->ustorm_st_context.common.status_block_id = sb_id;
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context->ustorm_st_context.common.flags =
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USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_MC_ALIGNMENT;
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context->ustorm_st_context.common.mc_alignment_size = 64;
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context->ustorm_st_context.common.mc_alignment_size =
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BCM_RX_ETH_PAYLOAD_ALIGN;
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context->ustorm_st_context.common.bd_buff_size =
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bp->rx_buf_use_size;
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bp->rx_buf_size;
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context->ustorm_st_context.common.bd_page_base_hi =
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U64_HI(fp->rx_desc_mapping);
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context->ustorm_st_context.common.bd_page_base_lo =
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@ -4717,7 +4717,7 @@ static void bnx2x_init_internal_func(struct bnx2x *bp)
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}
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/* Init CQ ring mapping and aggregation size */
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max_agg_size = min((u32)(bp->rx_buf_use_size +
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max_agg_size = min((u32)(bp->rx_buf_size +
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8*BCM_PAGE_SIZE*PAGES_PER_SGE),
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(u32)0xffff);
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for_each_queue(bp, i) {
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@ -5940,7 +5940,7 @@ static void bnx2x_free_rx_skbs(struct bnx2x *bp)
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pci_unmap_single(bp->pdev,
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pci_unmap_addr(rx_buf, mapping),
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bp->rx_buf_use_size,
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bp->rx_buf_size,
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PCI_DMA_FROMDEVICE);
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rx_buf->skb = NULL;
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@ -2303,6 +2303,12 @@ static int __devinit ixgbe_set_interrupt_capability(struct ixgbe_adapter
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int err = 0;
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int vector, v_budget;
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/*
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* Set the default interrupt throttle rate.
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*/
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adapter->rx_eitr = (1000000 / IXGBE_DEFAULT_ITR_RX_USECS);
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adapter->tx_eitr = (1000000 / IXGBE_DEFAULT_ITR_TX_USECS);
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/*
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* It's easy to be greedy for MSI-X vectors, but it really
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* doesn't do us much good if we have a lot more vectors
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@ -359,16 +359,6 @@ static void netxen_pcie_strap_init(struct netxen_adapter *adapter)
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int i, pos;
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struct pci_dev *pdev;
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pdev = pci_get_device(0x1166, 0x0140, NULL);
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if (pdev) {
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pci_dev_put(pdev);
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adapter->hw_read_wx(adapter,
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NETXEN_PCIE_REG(PCIE_TGT_SPLIT_CHICKEN), &chicken, 4);
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chicken |= 0x4000;
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adapter->hw_write_wx(adapter,
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NETXEN_PCIE_REG(PCIE_TGT_SPLIT_CHICKEN), &chicken, 4);
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}
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pdev = adapter->pdev;
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adapter->hw_read_wx(adapter,
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@ -784,6 +784,7 @@ static struct pcmcia_device_id axnet_ids[] = {
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PCMCIA_DEVICE_PROD_ID12("corega K.K.", "corega FEther PCC-TXD", 0x5261440f, 0x436768c5),
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PCMCIA_DEVICE_PROD_ID12("corega K.K.", "corega FEtherII PCC-TXD", 0x5261440f, 0x730df72e),
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PCMCIA_DEVICE_PROD_ID12("Dynalink", "L100C16", 0x55632fd5, 0x66bc2a90),
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PCMCIA_DEVICE_PROD_ID12("IO DATA", "ETXPCM", 0x547e66dc, 0x233adac2),
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PCMCIA_DEVICE_PROD_ID12("Linksys", "EtherFast 10/100 PC Card (PCMPC100 V3)", 0x0733cc81, 0x232019a8),
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PCMCIA_DEVICE_PROD_ID12("MELCO", "LPC3-TX", 0x481e0094, 0xf91af609),
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PCMCIA_DEVICE_PROD_ID12("PCMCIA", "100BASE", 0x281f1c5d, 0x7c2add04),
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@ -1626,6 +1626,7 @@ static struct pcmcia_device_id pcnet_ids[] = {
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PCMCIA_DEVICE_PROD_ID12("corega K.K.", "corega EtherII PCC-TD", 0x5261440f, 0xc49bd73d),
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PCMCIA_DEVICE_PROD_ID12("Corega K.K.", "corega EtherII PCC-TD", 0xd4fdcbd8, 0xc49bd73d),
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PCMCIA_DEVICE_PROD_ID12("corega K.K.", "corega Ether PCC-T", 0x5261440f, 0x6705fcaa),
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PCMCIA_DEVICE_PROD_ID12("corega K.K.", "corega Ether PCC-TD", 0x5261440f, 0x47d5ca83),
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PCMCIA_DEVICE_PROD_ID12("corega K.K.", "corega FastEther PCC-TX", 0x5261440f, 0x485e85d9),
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PCMCIA_DEVICE_PROD_ID12("Corega,K.K.", "Ethernet LAN Card", 0x110d26d9, 0x9fd2f0a2),
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PCMCIA_DEVICE_PROD_ID12("corega,K.K.", "Ethernet LAN Card", 0x9791a90e, 0x9fd2f0a2),
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@ -1737,7 +1738,6 @@ static struct pcmcia_device_id pcnet_ids[] = {
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PCMCIA_DEVICE_PROD_ID1("CyQ've 10 Base-T LAN CARD", 0x94faf360),
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PCMCIA_DEVICE_PROD_ID1("EP-210 PCMCIA LAN CARD.", 0x8850b4de),
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PCMCIA_DEVICE_PROD_ID1("ETHER-C16", 0x06a8514f),
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PCMCIA_DEVICE_PROD_ID1("IC-CARD", 0x60cb09a6),
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PCMCIA_DEVICE_PROD_ID1("NE2000 Compatible", 0x75b8ad5a),
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PCMCIA_DEVICE_PROD_ID2("EN-6200P2", 0xa996d078),
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/* too generic! */
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|
|
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@ -117,7 +117,7 @@ static void ctrl_callback(struct urb *urb)
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case -ENOENT:
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break;
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default:
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if (netif_msg_drv(pegasus))
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if (netif_msg_drv(pegasus) && printk_ratelimit())
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dev_dbg(&pegasus->intf->dev, "%s, status %d\n",
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__FUNCTION__, urb->status);
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}
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@ -166,7 +166,7 @@ static int get_registers(pegasus_t * pegasus, __u16 indx, __u16 size,
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set_current_state(TASK_RUNNING);
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if (ret == -ENODEV)
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netif_device_detach(pegasus->net);
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if (netif_msg_drv(pegasus))
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if (netif_msg_drv(pegasus) && printk_ratelimit())
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dev_err(&pegasus->intf->dev, "%s, status %d\n",
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__FUNCTION__, ret);
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goto out;
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|
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@ -275,7 +275,7 @@ static int set_register(pegasus_t * pegasus, __u16 indx, __u8 data)
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|||
if ((ret = usb_submit_urb(pegasus->ctrl_urb, GFP_ATOMIC))) {
|
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if (ret == -ENODEV)
|
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netif_device_detach(pegasus->net);
|
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if (netif_msg_drv(pegasus))
|
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if (netif_msg_drv(pegasus) && printk_ratelimit())
|
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dev_err(&pegasus->intf->dev, "%s, status %d\n",
|
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__FUNCTION__, ret);
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goto out;
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|
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@ -1209,8 +1209,7 @@ static void pegasus_set_multicast(struct net_device *net)
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pegasus->eth_regs[EthCtrl2] |= RX_PROMISCUOUS;
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if (netif_msg_link(pegasus))
|
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pr_info("%s: Promiscuous mode enabled.\n", net->name);
|
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} else if (net->mc_count ||
|
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(net->flags & IFF_ALLMULTI)) {
|
||||
} else if (net->mc_count || (net->flags & IFF_ALLMULTI)) {
|
||||
pegasus->eth_regs[EthCtrl0] |= RX_MULTICAST;
|
||||
pegasus->eth_regs[EthCtrl2] &= ~RX_PROMISCUOUS;
|
||||
if (netif_msg_link(pegasus))
|
||||
|
|
@ -1220,6 +1219,8 @@ static void pegasus_set_multicast(struct net_device *net)
|
|||
pegasus->eth_regs[EthCtrl2] &= ~RX_PROMISCUOUS;
|
||||
}
|
||||
|
||||
pegasus->ctrl_urb->status = 0;
|
||||
|
||||
pegasus->flags |= ETH_REGS_CHANGE;
|
||||
ctrl_callback(pegasus->ctrl_urb);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1067,8 +1067,16 @@ void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
|
|||
tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
|
||||
tx_status->flags &= ~ATH_TX_BAR;
|
||||
}
|
||||
if (tx_status->flags)
|
||||
tx_info->status.excessive_retries = 1;
|
||||
|
||||
if (tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY)) {
|
||||
if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) {
|
||||
/* Frame was not ACKed, but an ACK was expected */
|
||||
tx_info->status.excessive_retries = 1;
|
||||
}
|
||||
} else {
|
||||
/* Frame was ACKed */
|
||||
tx_info->flags |= IEEE80211_TX_STAT_ACK;
|
||||
}
|
||||
|
||||
tx_info->status.retry_count = tx_status->retries;
|
||||
|
||||
|
|
|
|||
|
|
@ -357,9 +357,9 @@ static int ath_tx_prepare(struct ath_softc *sc,
|
|||
txctl->flags = ATH9K_TXDESC_CLRDMASK; /* needed for crypto errors */
|
||||
|
||||
if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK)
|
||||
tx_info->flags |= ATH9K_TXDESC_NOACK;
|
||||
txctl->flags |= ATH9K_TXDESC_NOACK;
|
||||
if (tx_info->flags & IEEE80211_TX_CTL_USE_RTS_CTS)
|
||||
tx_info->flags |= ATH9K_TXDESC_RTSENA;
|
||||
txctl->flags |= ATH9K_TXDESC_RTSENA;
|
||||
|
||||
/*
|
||||
* Setup for rate calculations.
|
||||
|
|
|
|||
|
|
@ -1153,7 +1153,8 @@ static int rs_switch_to_mimo2(struct iwl_priv *priv,
|
|||
!sta->ht_info.ht_supported)
|
||||
return -1;
|
||||
|
||||
if (priv->current_ht_config.tx_mimo_ps_mode == IWL_MIMO_PS_STATIC)
|
||||
if (((sta->ht_info.cap & IEEE80211_HT_CAP_MIMO_PS) >> 2)
|
||||
== IWL_MIMO_PS_STATIC)
|
||||
return -1;
|
||||
|
||||
/* Need both Tx chains/antennas to support MIMO */
|
||||
|
|
|
|||
|
|
@ -181,14 +181,14 @@ static int iwl4965_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
|
|||
}
|
||||
|
||||
/**
|
||||
* iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
|
||||
* iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
|
||||
* @priv: staging_rxon is compared to active_rxon
|
||||
*
|
||||
* If the RXON structure is changing enough to require a new tune,
|
||||
* or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
|
||||
* a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
|
||||
*/
|
||||
static int iwl4965_full_rxon_required(struct iwl_priv *priv)
|
||||
static int iwl_full_rxon_required(struct iwl_priv *priv)
|
||||
{
|
||||
|
||||
/* These items are only settable from the full RXON command */
|
||||
|
|
@ -207,7 +207,6 @@ static int iwl4965_full_rxon_required(struct iwl_priv *priv)
|
|||
priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
|
||||
(priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
|
||||
priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
|
||||
(priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
|
||||
(priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
|
||||
return 1;
|
||||
|
||||
|
|
@ -263,7 +262,7 @@ static int iwl4965_commit_rxon(struct iwl_priv *priv)
|
|||
/* If we don't need to send a full RXON, we can use
|
||||
* iwl4965_rxon_assoc_cmd which is used to reconfigure filter
|
||||
* and other flags for the current radio configuration. */
|
||||
if (!iwl4965_full_rxon_required(priv)) {
|
||||
if (!iwl_full_rxon_required(priv)) {
|
||||
ret = iwl_send_rxon_assoc(priv);
|
||||
if (ret) {
|
||||
IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret);
|
||||
|
|
@ -587,8 +586,6 @@ static void iwl4965_ht_conf(struct iwl_priv *priv,
|
|||
iwl_conf->supported_chan_width = 0;
|
||||
}
|
||||
|
||||
iwl_conf->tx_mimo_ps_mode =
|
||||
(u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
|
||||
memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
|
||||
|
||||
iwl_conf->control_channel = ht_bss_conf->primary_channel;
|
||||
|
|
@ -2190,7 +2187,10 @@ static void __iwl4965_down(struct iwl_priv *priv)
|
|||
udelay(5);
|
||||
|
||||
/* FIXME: apm_ops.suspend(priv) */
|
||||
priv->cfg->ops->lib->apm_ops.reset(priv);
|
||||
if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
|
||||
priv->cfg->ops->lib->apm_ops.stop(priv);
|
||||
else
|
||||
priv->cfg->ops->lib->apm_ops.reset(priv);
|
||||
priv->cfg->ops->lib->free_shared_mem(priv);
|
||||
|
||||
exit:
|
||||
|
|
@ -3588,7 +3588,7 @@ static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *sk
|
|||
|
||||
priv->assoc_id = 0;
|
||||
timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
|
||||
priv->timestamp = le64_to_cpu(timestamp) + (priv->beacon_int * 1000);
|
||||
priv->timestamp = le64_to_cpu(timestamp);
|
||||
|
||||
IWL_DEBUG_MAC80211("leave\n");
|
||||
spin_unlock_irqrestore(&priv->lock, flags);
|
||||
|
|
@ -4372,15 +4372,18 @@ static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
|
|||
iwl_dbgfs_unregister(priv);
|
||||
sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
|
||||
|
||||
/* ieee80211_unregister_hw call wil cause iwl4965_mac_stop to
|
||||
* to be called and iwl4965_down since we are removing the device
|
||||
* we need to set STATUS_EXIT_PENDING bit.
|
||||
*/
|
||||
set_bit(STATUS_EXIT_PENDING, &priv->status);
|
||||
if (priv->mac80211_registered) {
|
||||
ieee80211_unregister_hw(priv->hw);
|
||||
priv->mac80211_registered = 0;
|
||||
} else {
|
||||
iwl4965_down(priv);
|
||||
}
|
||||
|
||||
set_bit(STATUS_EXIT_PENDING, &priv->status);
|
||||
|
||||
iwl4965_down(priv);
|
||||
|
||||
/* make sure we flush any pending irq or
|
||||
* tasklet for the driver
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -592,12 +592,11 @@ static void iwlcore_free_geos(struct iwl_priv *priv)
|
|||
clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
|
||||
}
|
||||
|
||||
static u8 is_single_rx_stream(struct iwl_priv *priv)
|
||||
static bool is_single_rx_stream(struct iwl_priv *priv)
|
||||
{
|
||||
return !priv->current_ht_config.is_ht ||
|
||||
((priv->current_ht_config.supp_mcs_set[1] == 0) &&
|
||||
(priv->current_ht_config.supp_mcs_set[2] == 0)) ||
|
||||
priv->ps_mode == IWL_MIMO_PS_STATIC;
|
||||
(priv->current_ht_config.supp_mcs_set[2] == 0));
|
||||
}
|
||||
|
||||
static u8 iwl_is_channel_extension(struct iwl_priv *priv,
|
||||
|
|
@ -704,33 +703,39 @@ EXPORT_SYMBOL(iwl_set_rxon_ht);
|
|||
* MIMO (dual stream) requires at least 2, but works better with 3.
|
||||
* This does not determine *which* chains to use, just how many.
|
||||
*/
|
||||
static int iwlcore_get_rx_chain_counter(struct iwl_priv *priv,
|
||||
u8 *idle_state, u8 *rx_state)
|
||||
static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
|
||||
{
|
||||
u8 is_single = is_single_rx_stream(priv);
|
||||
u8 is_cam = test_bit(STATUS_POWER_PMI, &priv->status) ? 0 : 1;
|
||||
bool is_single = is_single_rx_stream(priv);
|
||||
bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
|
||||
|
||||
/* # of Rx chains to use when expecting MIMO. */
|
||||
if (is_single || (!is_cam && (priv->ps_mode == IWL_MIMO_PS_STATIC)))
|
||||
*rx_state = 2;
|
||||
return 2;
|
||||
else
|
||||
*rx_state = 3;
|
||||
return 3;
|
||||
}
|
||||
|
||||
static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
|
||||
{
|
||||
int idle_cnt;
|
||||
bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
|
||||
/* # Rx chains when idling and maybe trying to save power */
|
||||
switch (priv->ps_mode) {
|
||||
case IWL_MIMO_PS_STATIC:
|
||||
case IWL_MIMO_PS_DYNAMIC:
|
||||
*idle_state = (is_cam) ? 2 : 1;
|
||||
idle_cnt = (is_cam) ? 2 : 1;
|
||||
break;
|
||||
case IWL_MIMO_PS_NONE:
|
||||
*idle_state = (is_cam) ? *rx_state : 1;
|
||||
idle_cnt = (is_cam) ? active_cnt : 1;
|
||||
break;
|
||||
case IWL_MIMO_PS_INVALID:
|
||||
default:
|
||||
*idle_state = 1;
|
||||
IWL_ERROR("invalide mimo ps mode %d\n", priv->ps_mode);
|
||||
WARN_ON(1);
|
||||
idle_cnt = -1;
|
||||
break;
|
||||
}
|
||||
|
||||
return 0;
|
||||
return idle_cnt;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -741,34 +746,44 @@ static int iwlcore_get_rx_chain_counter(struct iwl_priv *priv,
|
|||
*/
|
||||
void iwl_set_rxon_chain(struct iwl_priv *priv)
|
||||
{
|
||||
u8 is_single = is_single_rx_stream(priv);
|
||||
u8 idle_state, rx_state;
|
||||
|
||||
priv->staging_rxon.rx_chain = 0;
|
||||
rx_state = idle_state = 3;
|
||||
bool is_single = is_single_rx_stream(priv);
|
||||
bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
|
||||
u8 idle_rx_cnt, active_rx_cnt;
|
||||
u16 rx_chain;
|
||||
|
||||
/* Tell uCode which antennas are actually connected.
|
||||
* Before first association, we assume all antennas are connected.
|
||||
* Just after first association, iwl_chain_noise_calibration()
|
||||
* checks which antennas actually *are* connected. */
|
||||
priv->staging_rxon.rx_chain |=
|
||||
cpu_to_le16(priv->hw_params.valid_rx_ant <<
|
||||
RXON_RX_CHAIN_VALID_POS);
|
||||
rx_chain = priv->hw_params.valid_rx_ant << RXON_RX_CHAIN_VALID_POS;
|
||||
|
||||
/* How many receivers should we use? */
|
||||
iwlcore_get_rx_chain_counter(priv, &idle_state, &rx_state);
|
||||
priv->staging_rxon.rx_chain |=
|
||||
cpu_to_le16(rx_state << RXON_RX_CHAIN_MIMO_CNT_POS);
|
||||
priv->staging_rxon.rx_chain |=
|
||||
cpu_to_le16(idle_state << RXON_RX_CHAIN_CNT_POS);
|
||||
active_rx_cnt = iwl_get_active_rx_chain_count(priv);
|
||||
idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
|
||||
|
||||
if (!is_single && (rx_state >= 2) &&
|
||||
!test_bit(STATUS_POWER_PMI, &priv->status))
|
||||
/* correct rx chain count accoridng hw settings */
|
||||
if (priv->hw_params.rx_chains_num < active_rx_cnt)
|
||||
active_rx_cnt = priv->hw_params.rx_chains_num;
|
||||
|
||||
if (priv->hw_params.rx_chains_num < idle_rx_cnt)
|
||||
idle_rx_cnt = priv->hw_params.rx_chains_num;
|
||||
|
||||
rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
|
||||
rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
|
||||
|
||||
priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
|
||||
|
||||
if (!is_single && (active_rx_cnt >= 2) && is_cam)
|
||||
priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
|
||||
else
|
||||
priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
|
||||
|
||||
IWL_DEBUG_ASSOC("rx chain %X\n", priv->staging_rxon.rx_chain);
|
||||
IWL_DEBUG_ASSOC("rx_chain=0x%Xi active=%d idle=%d\n",
|
||||
priv->staging_rxon.rx_chain,
|
||||
active_rx_cnt, idle_rx_cnt);
|
||||
|
||||
WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
|
||||
active_rx_cnt < idle_rx_cnt);
|
||||
}
|
||||
EXPORT_SYMBOL(iwl_set_rxon_chain);
|
||||
|
||||
|
|
|
|||
|
|
@ -412,7 +412,6 @@ struct iwl_ht_info {
|
|||
/* self configuration data */
|
||||
u8 is_ht;
|
||||
u8 supported_chan_width;
|
||||
u16 tx_mimo_ps_mode;
|
||||
u8 is_green_field;
|
||||
u8 sgf; /* HT_SHORT_GI_* short guard interval */
|
||||
u8 max_amsdu_size;
|
||||
|
|
|
|||
|
|
@ -1173,7 +1173,10 @@ void iwl_rx_reply_rx(struct iwl_priv *priv,
|
|||
|
||||
rx_status.antenna = 0;
|
||||
rx_status.flag = 0;
|
||||
rx_status.flag |= RX_FLAG_TSFT;
|
||||
|
||||
/* TSF isn't reliable. In order to allow smooth user experience,
|
||||
* this W/A doesn't propagate it to the mac80211 */
|
||||
/*rx_status.flag |= RX_FLAG_TSFT;*/
|
||||
|
||||
if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
|
||||
IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
|
||||
|
|
|
|||
|
|
@ -421,7 +421,7 @@ static int iwl_get_channels_for_scan(struct iwl_priv *priv,
|
|||
else
|
||||
scan_ch->type = SCAN_CHANNEL_TYPE_ACTIVE;
|
||||
|
||||
if ((scan_ch->type & SCAN_CHANNEL_TYPE_ACTIVE) && n_probes)
|
||||
if (n_probes)
|
||||
scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
|
||||
|
||||
scan_ch->active_dwell = cpu_to_le16(active_dwell);
|
||||
|
|
|
|||
|
|
@ -402,12 +402,11 @@ static int iwl_hw_tx_queue_init(struct iwl_priv *priv,
|
|||
/**
|
||||
* iwl_tx_queue_init - Allocate and initialize one tx/cmd queue
|
||||
*/
|
||||
static int iwl_tx_queue_init(struct iwl_priv *priv,
|
||||
struct iwl_tx_queue *txq,
|
||||
static int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq,
|
||||
int slots_num, u32 txq_id)
|
||||
{
|
||||
int i, len;
|
||||
int rc = 0;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* Alloc buffer array for commands (Tx or other types of commands).
|
||||
|
|
@ -428,17 +427,14 @@ static int iwl_tx_queue_init(struct iwl_priv *priv,
|
|||
|
||||
txq->cmd[i] = kmalloc(len, GFP_KERNEL);
|
||||
if (!txq->cmd[i])
|
||||
return -ENOMEM;
|
||||
goto err;
|
||||
}
|
||||
|
||||
/* Alloc driver data array and TFD circular buffer */
|
||||
rc = iwl_tx_queue_alloc(priv, txq, txq_id);
|
||||
if (rc) {
|
||||
for (i = 0; i < slots_num; i++)
|
||||
kfree(txq->cmd[i]);
|
||||
ret = iwl_tx_queue_alloc(priv, txq, txq_id);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
return -ENOMEM;
|
||||
}
|
||||
txq->need_update = 0;
|
||||
|
||||
/* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
|
||||
|
|
@ -452,6 +448,17 @@ static int iwl_tx_queue_init(struct iwl_priv *priv,
|
|||
iwl_hw_tx_queue_init(priv, txq);
|
||||
|
||||
return 0;
|
||||
err:
|
||||
for (i = 0; i < slots_num; i++) {
|
||||
kfree(txq->cmd[i]);
|
||||
txq->cmd[i] = NULL;
|
||||
}
|
||||
|
||||
if (txq_id == IWL_CMD_QUEUE_NUM) {
|
||||
kfree(txq->cmd[slots_num]);
|
||||
txq->cmd[slots_num] = NULL;
|
||||
}
|
||||
return -ENOMEM;
|
||||
}
|
||||
/**
|
||||
* iwl_hw_txq_ctx_free - Free TXQ Context
|
||||
|
|
|
|||
Loading…
Reference in a new issue