From 31acd33e372a8fc15438f8dedc1e92ad363a48b5 Mon Sep 17 00:00:00 2001
From: Jagadeesh Kona <jkona@qti.qualcomm.com>
Date: Mon, 1 Feb 2021 11:39:57 +0530
Subject: [PATCH] ARM: dts: msm: Mark PMIC QUPs as critical clock devices for
 YUPIK

To prevent deadlocks between the clock and regulator frameworks,
the QUP clocks used by I2C-connected PMICs must be enabled all
the time and not registered with the clock framework. Skipping
the registration short-circuits the I2C device's clock calls such
that they return success before grabbing the clock locks. Achieve
this behavior by setting GCC's qcom,critical-devices property.

Change-Id: Ie5017022b2d2281d6754bb527ac40bbd050673fc
---
 qcom/yupik-pmic-overlay.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/qcom/yupik-pmic-overlay.dtsi b/qcom/yupik-pmic-overlay.dtsi
index ac30b1c1045a..4ba57dd658b0 100644
--- a/qcom/yupik-pmic-overlay.dtsi
+++ b/qcom/yupik-pmic-overlay.dtsi
@@ -241,6 +241,14 @@
 	};
 };
 
+/*
+ * Each QUP device that's a parent to PMIC must be listed as a critical device
+ * to GCC
+ */
+&gcc {
+	qcom,critical-devices = <&qupv3_se1_i2c>;
+};
+
 &qupv3_se1_i2c {
 	#address-cells = <1>;
 	#size-cells = <0>;