From 320c664b6000b47b67b43829acd77489144df2e0 Mon Sep 17 00:00:00 2001 From: Yuanfang Zhang Date: Tue, 30 Mar 2021 16:07:05 +0800 Subject: [PATCH] byte-cntr: Don't write csr register when byte-cntr is disabled It is possible that byte-cntr release happens after byte-cntr is disabled. Don't write csr register when byte-cntr is disabled to avoid the register access issue. Change-Id: Ic818107e1bcbe31e1a55cdc8c0f6ff89ff70564f Signed-off-by: Mao Jinlong Signed-off-by: Yuanfang Zhang --- drivers/hwtracing/coresight/coresight-byte-cntr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-byte-cntr.c b/drivers/hwtracing/coresight/coresight-byte-cntr.c index 18a44f24384d..907a71db6070 100644 --- a/drivers/hwtracing/coresight/coresight-byte-cntr.c +++ b/drivers/hwtracing/coresight/coresight-byte-cntr.c @@ -184,7 +184,8 @@ static int tmc_etr_byte_cntr_release(struct inode *in, struct file *fp) mutex_lock(&byte_cntr_data->byte_cntr_lock); byte_cntr_data->read_active = false; - coresight_csr_set_byte_cntr(byte_cntr_data->csr, 0); + if (byte_cntr_data->enable) + coresight_csr_set_byte_cntr(byte_cntr_data->csr, 0); mutex_unlock(&byte_cntr_data->byte_cntr_lock); return 0;