mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-29 19:21:31 -04:00
Merge tag 'v2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into for-linus
This commit is contained in:
commit
325d160554
545 changed files with 4801 additions and 2464 deletions
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@ -425,11 +425,6 @@ static irqreturn_t ariadne_interrupt(int irq, void *data)
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int csr0, boguscnt;
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int handled = 0;
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if (dev == NULL) {
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printk(KERN_WARNING "ariadne_interrupt(): irq for unknown device.\n");
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return IRQ_NONE;
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}
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lance->RAP = CSR0; /* PCnet-ISA Controller Status */
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if (!(lance->RDP & INTR)) /* Check if any interrupt has been */
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@ -22,7 +22,7 @@
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* (you will need to reboot afterwards) */
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/* #define BNX2X_STOP_ON_ERROR */
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#define DRV_MODULE_VERSION "1.62.00-5"
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#define DRV_MODULE_VERSION "1.62.00-6"
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#define DRV_MODULE_RELDATE "2011/01/30"
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#define BNX2X_BC_VER 0x040200
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@ -1211,6 +1211,7 @@ struct bnx2x {
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/* DCBX Negotation results */
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struct dcbx_features dcbx_local_feat;
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u32 dcbx_error;
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u32 pending_max;
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};
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/**
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@ -1613,19 +1614,23 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
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#define BNX2X_BTR 4
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#define MAX_SPQ_PENDING 8
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/* CMNG constants
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derived from lab experiments, and not from system spec calculations !!! */
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#define DEF_MIN_RATE 100
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/* resolution of the rate shaping timer - 100 usec */
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#define RS_PERIODIC_TIMEOUT_USEC 100
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/* resolution of fairness algorithm in usecs -
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coefficient for calculating the actual t fair */
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#define T_FAIR_COEF 10000000
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/* CMNG constants, as derived from system spec calculations */
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/* default MIN rate in case VNIC min rate is configured to zero - 100Mbps */
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#define DEF_MIN_RATE 100
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/* resolution of the rate shaping timer - 400 usec */
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#define RS_PERIODIC_TIMEOUT_USEC 400
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/* number of bytes in single QM arbitration cycle -
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coefficient for calculating the fairness timer */
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#define QM_ARB_BYTES 40000
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#define FAIR_MEM 2
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* coefficient for calculating the fairness timer */
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#define QM_ARB_BYTES 160000
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/* resolution of Min algorithm 1:100 */
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#define MIN_RES 100
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/* how many bytes above threshold for the minimal credit of Min algorithm*/
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#define MIN_ABOVE_THRESH 32768
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/* Fairness algorithm integration time coefficient -
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* for calculating the actual Tfair */
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#define T_FAIR_COEF ((MIN_ABOVE_THRESH + QM_ARB_BYTES) * 8 * MIN_RES)
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/* Memory of fairness algorithm . 2 cycles */
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#define FAIR_MEM 2
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#define ATTN_NIG_FOR_FUNC (1L << 8)
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@ -259,10 +259,44 @@ static void bnx2x_tpa_start(struct bnx2x_fastpath *fp, u16 queue,
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#endif
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}
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/* Timestamp option length allowed for TPA aggregation:
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*
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* nop nop kind length echo val
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*/
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#define TPA_TSTAMP_OPT_LEN 12
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/**
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* Calculate the approximate value of the MSS for this
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* aggregation using the first packet of it.
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*
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* @param bp
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* @param parsing_flags Parsing flags from the START CQE
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* @param len_on_bd Total length of the first packet for the
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* aggregation.
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*/
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static inline u16 bnx2x_set_lro_mss(struct bnx2x *bp, u16 parsing_flags,
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u16 len_on_bd)
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{
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/* TPA arrgregation won't have an IP options and TCP options
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* other than timestamp.
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*/
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u16 hdrs_len = ETH_HLEN + sizeof(struct iphdr) + sizeof(struct tcphdr);
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/* Check if there was a TCP timestamp, if there is it's will
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* always be 12 bytes length: nop nop kind length echo val.
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*
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* Otherwise FW would close the aggregation.
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*/
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if (parsing_flags & PARSING_FLAGS_TIME_STAMP_EXIST_FLAG)
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hdrs_len += TPA_TSTAMP_OPT_LEN;
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return len_on_bd - hdrs_len;
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}
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static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp,
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struct sk_buff *skb,
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struct eth_fast_path_rx_cqe *fp_cqe,
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u16 cqe_idx)
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u16 cqe_idx, u16 parsing_flags)
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{
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struct sw_rx_page *rx_pg, old_rx_pg;
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u16 len_on_bd = le16_to_cpu(fp_cqe->len_on_bd);
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@ -275,8 +309,8 @@ static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp,
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/* This is needed in order to enable forwarding support */
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if (frag_size)
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skb_shinfo(skb)->gso_size = min((u32)SGE_PAGE_SIZE,
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max(frag_size, (u32)len_on_bd));
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skb_shinfo(skb)->gso_size = bnx2x_set_lro_mss(bp, parsing_flags,
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len_on_bd);
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#ifdef BNX2X_STOP_ON_ERROR
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if (pages > min_t(u32, 8, MAX_SKB_FRAGS)*SGE_PAGE_SIZE*PAGES_PER_SGE) {
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@ -344,6 +378,8 @@ static void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp,
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if (likely(new_skb)) {
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/* fix ip xsum and give it to the stack */
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/* (no need to map the new skb) */
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u16 parsing_flags =
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le16_to_cpu(cqe->fast_path_cqe.pars_flags.flags);
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prefetch(skb);
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prefetch(((char *)(skb)) + L1_CACHE_BYTES);
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@ -373,9 +409,9 @@ static void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp,
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}
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if (!bnx2x_fill_frag_skb(bp, fp, skb,
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&cqe->fast_path_cqe, cqe_idx)) {
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if ((le16_to_cpu(cqe->fast_path_cqe.
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pars_flags.flags) & PARSING_FLAGS_VLAN))
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&cqe->fast_path_cqe, cqe_idx,
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parsing_flags)) {
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if (parsing_flags & PARSING_FLAGS_VLAN)
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__vlan_hwaccel_put_tag(skb,
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le16_to_cpu(cqe->fast_path_cqe.
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vlan_tag));
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@ -703,19 +739,20 @@ u16 bnx2x_get_mf_speed(struct bnx2x *bp)
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{
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u16 line_speed = bp->link_vars.line_speed;
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if (IS_MF(bp)) {
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u16 maxCfg = (bp->mf_config[BP_VN(bp)] &
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FUNC_MF_CFG_MAX_BW_MASK) >>
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FUNC_MF_CFG_MAX_BW_SHIFT;
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/* Calculate the current MAX line speed limit for the DCC
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* capable devices
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u16 maxCfg = bnx2x_extract_max_cfg(bp,
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bp->mf_config[BP_VN(bp)]);
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/* Calculate the current MAX line speed limit for the MF
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* devices
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*/
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if (IS_MF_SD(bp)) {
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if (IS_MF_SI(bp))
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line_speed = (line_speed * maxCfg) / 100;
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else { /* SD mode */
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u16 vn_max_rate = maxCfg * 100;
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if (vn_max_rate < line_speed)
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line_speed = vn_max_rate;
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} else /* IS_MF_SI(bp)) */
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line_speed = (line_speed * maxCfg) / 100;
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}
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}
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return line_speed;
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@ -959,6 +996,23 @@ void bnx2x_free_skbs(struct bnx2x *bp)
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bnx2x_free_rx_skbs(bp);
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}
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void bnx2x_update_max_mf_config(struct bnx2x *bp, u32 value)
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{
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/* load old values */
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u32 mf_cfg = bp->mf_config[BP_VN(bp)];
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if (value != bnx2x_extract_max_cfg(bp, mf_cfg)) {
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/* leave all but MAX value */
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mf_cfg &= ~FUNC_MF_CFG_MAX_BW_MASK;
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/* set new MAX value */
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mf_cfg |= (value << FUNC_MF_CFG_MAX_BW_SHIFT)
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& FUNC_MF_CFG_MAX_BW_MASK;
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bnx2x_fw_command(bp, DRV_MSG_CODE_SET_MF_BW, mf_cfg);
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}
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}
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static void bnx2x_free_msix_irqs(struct bnx2x *bp)
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{
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int i, offset = 1;
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@ -1427,6 +1481,11 @@ int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
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bnx2x_set_eth_mac(bp, 1);
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if (bp->pending_max) {
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bnx2x_update_max_mf_config(bp, bp->pending_max);
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bp->pending_max = 0;
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}
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if (bp->port.pmf)
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bnx2x_initial_phy_init(bp, load_mode);
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@ -341,6 +341,15 @@ void bnx2x_dcbx_init(struct bnx2x *bp);
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*/
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int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state);
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/**
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* Updates MAX part of MF configuration in HW
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* (if required)
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*
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* @param bp
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* @param value
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*/
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void bnx2x_update_max_mf_config(struct bnx2x *bp, u32 value);
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/* dev_close main block */
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int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode);
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@ -1044,4 +1053,24 @@ static inline void storm_memset_cmng(struct bnx2x *bp,
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void bnx2x_acquire_phy_lock(struct bnx2x *bp);
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void bnx2x_release_phy_lock(struct bnx2x *bp);
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/**
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* Extracts MAX BW part from MF configuration.
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*
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* @param bp
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* @param mf_cfg
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*
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* @return u16
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*/
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static inline u16 bnx2x_extract_max_cfg(struct bnx2x *bp, u32 mf_cfg)
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{
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u16 max_cfg = (mf_cfg & FUNC_MF_CFG_MAX_BW_MASK) >>
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FUNC_MF_CFG_MAX_BW_SHIFT;
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if (!max_cfg) {
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BNX2X_ERR("Illegal configuration detected for Max BW - "
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"using 100 instead\n");
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max_cfg = 100;
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}
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return max_cfg;
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}
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#endif /* BNX2X_CMN_H */
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|
|
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|
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@ -238,7 +238,7 @@ static int bnx2x_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
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speed |= (cmd->speed_hi << 16);
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if (IS_MF_SI(bp)) {
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u32 param = 0;
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u32 part;
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u32 line_speed = bp->link_vars.line_speed;
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|
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/* use 10G if no link detected */
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|
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@ -251,23 +251,22 @@ static int bnx2x_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
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REQ_BC_VER_4_SET_MF_BW);
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return -EINVAL;
|
||||
}
|
||||
if (line_speed < speed) {
|
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BNX2X_DEV_INFO("New speed should be less or equal "
|
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"to actual line speed\n");
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|
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part = (speed * 100) / line_speed;
|
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|
||||
if (line_speed < speed || !part) {
|
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BNX2X_DEV_INFO("Speed setting should be in a range "
|
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"from 1%% to 100%% "
|
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"of actual line speed\n");
|
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return -EINVAL;
|
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}
|
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/* load old values */
|
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param = bp->mf_config[BP_VN(bp)];
|
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|
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/* leave only MIN value */
|
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param &= FUNC_MF_CFG_MIN_BW_MASK;
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if (bp->state != BNX2X_STATE_OPEN)
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/* store value for following "load" */
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bp->pending_max = part;
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else
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bnx2x_update_max_mf_config(bp, part);
|
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|
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/* set new MAX value */
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param |= (((speed * 100) / line_speed)
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<< FUNC_MF_CFG_MAX_BW_SHIFT)
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& FUNC_MF_CFG_MAX_BW_MASK;
|
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|
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bnx2x_fw_command(bp, DRV_MSG_CODE_SET_MF_BW, param);
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return 0;
|
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}
|
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|
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|
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@ -1781,9 +1780,7 @@ static int bnx2x_test_nvram(struct bnx2x *bp)
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{ 0x100, 0x350 }, /* manuf_info */
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{ 0x450, 0xf0 }, /* feature_info */
|
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{ 0x640, 0x64 }, /* upgrade_key_info */
|
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{ 0x6a4, 0x64 },
|
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{ 0x708, 0x70 }, /* manuf_key_info */
|
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{ 0x778, 0x70 },
|
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{ 0, 0 }
|
||||
};
|
||||
__be32 buf[0x350 / 4];
|
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|
|
@ -1933,11 +1930,11 @@ static void bnx2x_self_test(struct net_device *dev,
|
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buf[4] = 1;
|
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etest->flags |= ETH_TEST_FL_FAILED;
|
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}
|
||||
if (bp->port.pmf)
|
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if (bnx2x_link_test(bp, is_serdes) != 0) {
|
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buf[5] = 1;
|
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etest->flags |= ETH_TEST_FL_FAILED;
|
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}
|
||||
|
||||
if (bnx2x_link_test(bp, is_serdes) != 0) {
|
||||
buf[5] = 1;
|
||||
etest->flags |= ETH_TEST_FL_FAILED;
|
||||
}
|
||||
|
||||
#ifdef BNX2X_EXTRA_DEBUG
|
||||
bnx2x_panic_dump(bp);
|
||||
|
|
|
|||
|
|
@ -241,7 +241,7 @@ static const struct {
|
|||
/* Block IGU, MISC, PXP and PXP2 parity errors as long as we don't
|
||||
* want to handle "system kill" flow at the moment.
|
||||
*/
|
||||
BLOCK_PRTY_INFO(PXP, 0x3ffffff, 0x3ffffff, 0x3ffffff, 0x3ffffff),
|
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BLOCK_PRTY_INFO(PXP, 0x7ffffff, 0x3ffffff, 0x3ffffff, 0x7ffffff),
|
||||
BLOCK_PRTY_INFO_0(PXP2, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff),
|
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BLOCK_PRTY_INFO_1(PXP2, 0x7ff, 0x7f, 0x7f, 0x7ff),
|
||||
BLOCK_PRTY_INFO(HC, 0x7, 0x7, 0x7, 0),
|
||||
|
|
|
|||
|
|
@ -1974,13 +1974,22 @@ static void bnx2x_init_vn_minmax(struct bnx2x *bp, int vn)
|
|||
vn_max_rate = 0;
|
||||
|
||||
} else {
|
||||
u32 maxCfg = bnx2x_extract_max_cfg(bp, vn_cfg);
|
||||
|
||||
vn_min_rate = ((vn_cfg & FUNC_MF_CFG_MIN_BW_MASK) >>
|
||||
FUNC_MF_CFG_MIN_BW_SHIFT) * 100;
|
||||
/* If min rate is zero - set it to 1 */
|
||||
/* If fairness is enabled (not all min rates are zeroes) and
|
||||
if current min rate is zero - set it to 1.
|
||||
This is a requirement of the algorithm. */
|
||||
if (bp->vn_weight_sum && (vn_min_rate == 0))
|
||||
vn_min_rate = DEF_MIN_RATE;
|
||||
vn_max_rate = ((vn_cfg & FUNC_MF_CFG_MAX_BW_MASK) >>
|
||||
FUNC_MF_CFG_MAX_BW_SHIFT) * 100;
|
||||
|
||||
if (IS_MF_SI(bp))
|
||||
/* maxCfg in percents of linkspeed */
|
||||
vn_max_rate = (bp->link_vars.line_speed * maxCfg) / 100;
|
||||
else
|
||||
/* maxCfg is absolute in 100Mb units */
|
||||
vn_max_rate = maxCfg * 100;
|
||||
}
|
||||
|
||||
DP(NETIF_MSG_IFUP,
|
||||
|
|
@ -2006,7 +2015,8 @@ static void bnx2x_init_vn_minmax(struct bnx2x *bp, int vn)
|
|||
m_fair_vn.vn_credit_delta =
|
||||
max_t(u32, (vn_min_rate * (T_FAIR_COEF /
|
||||
(8 * bp->vn_weight_sum))),
|
||||
(bp->cmng.fair_vars.fair_threshold * 2));
|
||||
(bp->cmng.fair_vars.fair_threshold +
|
||||
MIN_ABOVE_THRESH));
|
||||
DP(NETIF_MSG_IFUP, "m_fair_vn.vn_credit_delta %d\n",
|
||||
m_fair_vn.vn_credit_delta);
|
||||
}
|
||||
|
|
@ -2082,8 +2092,9 @@ static void bnx2x_cmng_fns_init(struct bnx2x *bp, u8 read_cfg, u8 cmng_type)
|
|||
bnx2x_calc_vn_weight_sum(bp);
|
||||
|
||||
/* calculate and set min-max rate for each vn */
|
||||
for (vn = VN_0; vn < E1HVN_MAX; vn++)
|
||||
bnx2x_init_vn_minmax(bp, vn);
|
||||
if (bp->port.pmf)
|
||||
for (vn = VN_0; vn < E1HVN_MAX; vn++)
|
||||
bnx2x_init_vn_minmax(bp, vn);
|
||||
|
||||
/* always enable rate shaping and fairness */
|
||||
bp->cmng.flags.cmng_enables |=
|
||||
|
|
@ -2152,13 +2163,6 @@ static void bnx2x_link_attn(struct bnx2x *bp)
|
|||
bnx2x_stats_handle(bp, STATS_EVENT_LINK_UP);
|
||||
}
|
||||
|
||||
/* indicate link status only if link status actually changed */
|
||||
if (prev_link_status != bp->link_vars.link_status)
|
||||
bnx2x_link_report(bp);
|
||||
|
||||
if (IS_MF(bp))
|
||||
bnx2x_link_sync_notify(bp);
|
||||
|
||||
if (bp->link_vars.link_up && bp->link_vars.line_speed) {
|
||||
int cmng_fns = bnx2x_get_cmng_fns_mode(bp);
|
||||
|
||||
|
|
@ -2170,6 +2174,13 @@ static void bnx2x_link_attn(struct bnx2x *bp)
|
|||
DP(NETIF_MSG_IFUP,
|
||||
"single function mode without fairness\n");
|
||||
}
|
||||
|
||||
if (IS_MF(bp))
|
||||
bnx2x_link_sync_notify(bp);
|
||||
|
||||
/* indicate link status only if link status actually changed */
|
||||
if (prev_link_status != bp->link_vars.link_status)
|
||||
bnx2x_link_report(bp);
|
||||
}
|
||||
|
||||
void bnx2x__link_status_update(struct bnx2x *bp)
|
||||
|
|
|
|||
|
|
@ -1239,14 +1239,14 @@ void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
|
|||
if (unlikely(bp->panic))
|
||||
return;
|
||||
|
||||
bnx2x_stats_stm[bp->stats_state][event].action(bp);
|
||||
|
||||
/* Protect a state change flow */
|
||||
spin_lock_bh(&bp->stats_lock);
|
||||
state = bp->stats_state;
|
||||
bp->stats_state = bnx2x_stats_stm[state][event].next_state;
|
||||
spin_unlock_bh(&bp->stats_lock);
|
||||
|
||||
bnx2x_stats_stm[state][event].action(bp);
|
||||
|
||||
if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
|
||||
DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
|
||||
state, event, bp->stats_state);
|
||||
|
|
|
|||
|
|
@ -281,23 +281,23 @@ static inline int __check_agg_selection_timer(struct port *port)
|
|||
}
|
||||
|
||||
/**
|
||||
* __get_rx_machine_lock - lock the port's RX machine
|
||||
* __get_state_machine_lock - lock the port's state machines
|
||||
* @port: the port we're looking at
|
||||
*
|
||||
*/
|
||||
static inline void __get_rx_machine_lock(struct port *port)
|
||||
static inline void __get_state_machine_lock(struct port *port)
|
||||
{
|
||||
spin_lock_bh(&(SLAVE_AD_INFO(port->slave).rx_machine_lock));
|
||||
spin_lock_bh(&(SLAVE_AD_INFO(port->slave).state_machine_lock));
|
||||
}
|
||||
|
||||
/**
|
||||
* __release_rx_machine_lock - unlock the port's RX machine
|
||||
* __release_state_machine_lock - unlock the port's state machines
|
||||
* @port: the port we're looking at
|
||||
*
|
||||
*/
|
||||
static inline void __release_rx_machine_lock(struct port *port)
|
||||
static inline void __release_state_machine_lock(struct port *port)
|
||||
{
|
||||
spin_unlock_bh(&(SLAVE_AD_INFO(port->slave).rx_machine_lock));
|
||||
spin_unlock_bh(&(SLAVE_AD_INFO(port->slave).state_machine_lock));
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -388,14 +388,14 @@ static u8 __get_duplex(struct port *port)
|
|||
}
|
||||
|
||||
/**
|
||||
* __initialize_port_locks - initialize a port's RX machine spinlock
|
||||
* __initialize_port_locks - initialize a port's STATE machine spinlock
|
||||
* @port: the port we're looking at
|
||||
*
|
||||
*/
|
||||
static inline void __initialize_port_locks(struct port *port)
|
||||
{
|
||||
// make sure it isn't called twice
|
||||
spin_lock_init(&(SLAVE_AD_INFO(port->slave).rx_machine_lock));
|
||||
spin_lock_init(&(SLAVE_AD_INFO(port->slave).state_machine_lock));
|
||||
}
|
||||
|
||||
//conversions
|
||||
|
|
@ -1025,9 +1025,6 @@ static void ad_rx_machine(struct lacpdu *lacpdu, struct port *port)
|
|||
{
|
||||
rx_states_t last_state;
|
||||
|
||||
// Lock to prevent 2 instances of this function to run simultaneously(rx interrupt and periodic machine callback)
|
||||
__get_rx_machine_lock(port);
|
||||
|
||||
// keep current State Machine state to compare later if it was changed
|
||||
last_state = port->sm_rx_state;
|
||||
|
||||
|
|
@ -1133,7 +1130,6 @@ static void ad_rx_machine(struct lacpdu *lacpdu, struct port *port)
|
|||
pr_err("%s: An illegal loopback occurred on adapter (%s).\n"
|
||||
"Check the configuration to verify that all adapters are connected to 802.3ad compliant switch ports\n",
|
||||
port->slave->dev->master->name, port->slave->dev->name);
|
||||
__release_rx_machine_lock(port);
|
||||
return;
|
||||
}
|
||||
__update_selected(lacpdu, port);
|
||||
|
|
@ -1153,7 +1149,6 @@ static void ad_rx_machine(struct lacpdu *lacpdu, struct port *port)
|
|||
break;
|
||||
}
|
||||
}
|
||||
__release_rx_machine_lock(port);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -2155,6 +2150,12 @@ void bond_3ad_state_machine_handler(struct work_struct *work)
|
|||
goto re_arm;
|
||||
}
|
||||
|
||||
/* Lock around state machines to protect data accessed
|
||||
* by all (e.g., port->sm_vars). ad_rx_machine may run
|
||||
* concurrently due to incoming LACPDU.
|
||||
*/
|
||||
__get_state_machine_lock(port);
|
||||
|
||||
ad_rx_machine(NULL, port);
|
||||
ad_periodic_machine(port);
|
||||
ad_port_selection_logic(port);
|
||||
|
|
@ -2164,6 +2165,8 @@ void bond_3ad_state_machine_handler(struct work_struct *work)
|
|||
// turn off the BEGIN bit, since we already handled it
|
||||
if (port->sm_vars & AD_PORT_BEGIN)
|
||||
port->sm_vars &= ~AD_PORT_BEGIN;
|
||||
|
||||
__release_state_machine_lock(port);
|
||||
}
|
||||
|
||||
re_arm:
|
||||
|
|
@ -2200,7 +2203,10 @@ static void bond_3ad_rx_indication(struct lacpdu *lacpdu, struct slave *slave, u
|
|||
case AD_TYPE_LACPDU:
|
||||
pr_debug("Received LACPDU on port %d\n",
|
||||
port->actor_port_number);
|
||||
/* Protect against concurrent state machines */
|
||||
__get_state_machine_lock(port);
|
||||
ad_rx_machine(lacpdu, port);
|
||||
__release_state_machine_lock(port);
|
||||
break;
|
||||
|
||||
case AD_TYPE_MARKER:
|
||||
|
|
|
|||
|
|
@ -264,7 +264,8 @@ struct ad_bond_info {
|
|||
struct ad_slave_info {
|
||||
struct aggregator aggregator; // 802.3ad aggregator structure
|
||||
struct port port; // 802.3ad port structure
|
||||
spinlock_t rx_machine_lock; // To avoid race condition between callback and receive interrupt
|
||||
spinlock_t state_machine_lock; /* mutex state machines vs.
|
||||
incoming LACPDU */
|
||||
u16 id;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -633,6 +633,7 @@ static const struct net_device_ops softing_netdev_ops = {
|
|||
};
|
||||
|
||||
static const struct can_bittiming_const softing_btr_const = {
|
||||
.name = "softing",
|
||||
.tseg1_min = 1,
|
||||
.tseg1_max = 16,
|
||||
.tseg2_min = 1,
|
||||
|
|
|
|||
|
|
@ -2760,6 +2760,8 @@ static u32 cnic_service_bnx2_queues(struct cnic_dev *dev)
|
|||
u32 status_idx = (u16) *cp->kcq1.status_idx_ptr;
|
||||
int kcqe_cnt;
|
||||
|
||||
/* status block index must be read before reading other fields */
|
||||
rmb();
|
||||
cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
|
||||
|
||||
while ((kcqe_cnt = cnic_get_kcqes(dev, &cp->kcq1))) {
|
||||
|
|
@ -2770,6 +2772,8 @@ static u32 cnic_service_bnx2_queues(struct cnic_dev *dev)
|
|||
barrier();
|
||||
if (status_idx != *cp->kcq1.status_idx_ptr) {
|
||||
status_idx = (u16) *cp->kcq1.status_idx_ptr;
|
||||
/* status block index must be read first */
|
||||
rmb();
|
||||
cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
|
||||
} else
|
||||
break;
|
||||
|
|
@ -2888,6 +2892,8 @@ static u32 cnic_service_bnx2x_kcq(struct cnic_dev *dev, struct kcq_info *info)
|
|||
u32 last_status = *info->status_idx_ptr;
|
||||
int kcqe_cnt;
|
||||
|
||||
/* status block index must be read before reading the KCQ */
|
||||
rmb();
|
||||
while ((kcqe_cnt = cnic_get_kcqes(dev, info))) {
|
||||
|
||||
service_kcqes(dev, kcqe_cnt);
|
||||
|
|
@ -2898,6 +2904,8 @@ static u32 cnic_service_bnx2x_kcq(struct cnic_dev *dev, struct kcq_info *info)
|
|||
break;
|
||||
|
||||
last_status = *info->status_idx_ptr;
|
||||
/* status block index must be read before reading the KCQ */
|
||||
rmb();
|
||||
}
|
||||
return last_status;
|
||||
}
|
||||
|
|
@ -2906,26 +2914,35 @@ static void cnic_service_bnx2x_bh(unsigned long data)
|
|||
{
|
||||
struct cnic_dev *dev = (struct cnic_dev *) data;
|
||||
struct cnic_local *cp = dev->cnic_priv;
|
||||
u32 status_idx;
|
||||
u32 status_idx, new_status_idx;
|
||||
|
||||
if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
|
||||
return;
|
||||
|
||||
status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq1);
|
||||
while (1) {
|
||||
status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq1);
|
||||
|
||||
CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx + MAX_KCQ_IDX);
|
||||
CNIC_WR16(dev, cp->kcq1.io_addr,
|
||||
cp->kcq1.sw_prod_idx + MAX_KCQ_IDX);
|
||||
|
||||
if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
|
||||
status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq2);
|
||||
if (!BNX2X_CHIP_IS_E2(cp->chip_id)) {
|
||||
cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, USTORM_ID,
|
||||
status_idx, IGU_INT_ENABLE, 1);
|
||||
break;
|
||||
}
|
||||
|
||||
new_status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq2);
|
||||
|
||||
if (new_status_idx != status_idx)
|
||||
continue;
|
||||
|
||||
CNIC_WR16(dev, cp->kcq2.io_addr, cp->kcq2.sw_prod_idx +
|
||||
MAX_KCQ_IDX);
|
||||
|
||||
cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF,
|
||||
status_idx, IGU_INT_ENABLE, 1);
|
||||
} else {
|
||||
cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, USTORM_ID,
|
||||
status_idx, IGU_INT_ENABLE, 1);
|
||||
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1008,7 +1008,7 @@ static void emac_rx_handler(void *token, int len, int status)
|
|||
int ret;
|
||||
|
||||
/* free and bail if we are shutting down */
|
||||
if (unlikely(!netif_running(ndev))) {
|
||||
if (unlikely(!netif_running(ndev) || !netif_carrier_ok(ndev))) {
|
||||
dev_kfree_skb_any(skb);
|
||||
return;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -802,10 +802,7 @@ dm9000_init_dm9000(struct net_device *dev)
|
|||
/* Checksum mode */
|
||||
dm9000_set_rx_csum_unlocked(dev, db->rx_csum);
|
||||
|
||||
/* GPIO0 on pre-activate PHY */
|
||||
iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
|
||||
iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
|
||||
iow(db, DM9000_GPR, 0); /* Enable PHY */
|
||||
|
||||
ncr = (db->flags & DM9000_PLATF_EXT_PHY) ? NCR_EXT_PHY : 0;
|
||||
|
||||
|
|
@ -852,8 +849,8 @@ static void dm9000_timeout(struct net_device *dev)
|
|||
unsigned long flags;
|
||||
|
||||
/* Save previous register address */
|
||||
reg_save = readb(db->io_addr);
|
||||
spin_lock_irqsave(&db->lock, flags);
|
||||
reg_save = readb(db->io_addr);
|
||||
|
||||
netif_stop_queue(dev);
|
||||
dm9000_reset(db);
|
||||
|
|
@ -1194,6 +1191,10 @@ dm9000_open(struct net_device *dev)
|
|||
if (request_irq(dev->irq, dm9000_interrupt, irqflags, dev->name, dev))
|
||||
return -EAGAIN;
|
||||
|
||||
/* GPIO0 on pre-activate PHY, Reg 1F is not set by reset */
|
||||
iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
|
||||
mdelay(1); /* delay needs by DM9000B */
|
||||
|
||||
/* Initialize DM9000 board */
|
||||
dm9000_reset(db);
|
||||
dm9000_init_dm9000(dev);
|
||||
|
|
|
|||
|
|
@ -337,8 +337,6 @@ static int dnet_mii_init(struct dnet *bp)
|
|||
for (i = 0; i < PHY_MAX_ADDR; i++)
|
||||
bp->mii_bus->irq[i] = PHY_POLL;
|
||||
|
||||
platform_set_drvdata(bp->dev, bp->mii_bus);
|
||||
|
||||
if (mdiobus_register(bp->mii_bus)) {
|
||||
err = -ENXIO;
|
||||
goto err_out_free_mdio_irq;
|
||||
|
|
@ -863,6 +861,7 @@ static int __devinit dnet_probe(struct platform_device *pdev)
|
|||
bp = netdev_priv(dev);
|
||||
bp->dev = dev;
|
||||
|
||||
platform_set_drvdata(pdev, dev);
|
||||
SET_NETDEV_DEV(dev, &pdev->dev);
|
||||
|
||||
spin_lock_init(&bp->lock);
|
||||
|
|
|
|||
|
|
@ -42,7 +42,8 @@
|
|||
#define GBE_CONFIG_RAM_BASE \
|
||||
((unsigned int)(CONFIG_RAM_BASE + GBE_CONFIG_OFFSET))
|
||||
|
||||
#define GBE_CONFIG_BASE_VIRT phys_to_virt(GBE_CONFIG_RAM_BASE)
|
||||
#define GBE_CONFIG_BASE_VIRT \
|
||||
((void __iomem *)phys_to_virt(GBE_CONFIG_RAM_BASE))
|
||||
|
||||
#define GBE_CONFIG_FLASH_WRITE(base, offset, count, data) \
|
||||
(iowrite16_rep(base + offset, data, count))
|
||||
|
|
|
|||
|
|
@ -5967,7 +5967,8 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
|
|||
/* APME bit in EEPROM is mapped to WUC.APME */
|
||||
eeprom_data = er32(WUC);
|
||||
eeprom_apme_mask = E1000_WUC_APME;
|
||||
if (eeprom_data & E1000_WUC_PHY_WAKE)
|
||||
if ((hw->mac.type > e1000_ich10lan) &&
|
||||
(eeprom_data & E1000_WUC_PHY_WAKE))
|
||||
adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
|
||||
} else if (adapter->flags & FLAG_APME_IN_CTRL3) {
|
||||
if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
|
||||
|
|
|
|||
|
|
@ -74,7 +74,8 @@ static struct platform_device_id fec_devtype[] = {
|
|||
}, {
|
||||
.name = "imx28-fec",
|
||||
.driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_SWAP_FRAME,
|
||||
}
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
static unsigned char macaddr[ETH_ALEN];
|
||||
|
|
|
|||
|
|
@ -220,7 +220,7 @@ static u32 e1000_hash_mc_addr_vf(struct e1000_hw *hw, u8 *mc_addr)
|
|||
* The parameter rar_count will usually be hw->mac.rar_entry_count
|
||||
* unless there are workarounds that change this.
|
||||
**/
|
||||
void e1000_update_mc_addr_list_vf(struct e1000_hw *hw,
|
||||
static void e1000_update_mc_addr_list_vf(struct e1000_hw *hw,
|
||||
u8 *mc_addr_list, u32 mc_addr_count,
|
||||
u32 rar_used_count, u32 rar_count)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -260,7 +260,7 @@ static int macb_mii_init(struct macb *bp)
|
|||
for (i = 0; i < PHY_MAX_ADDR; i++)
|
||||
bp->mii_bus->irq[i] = PHY_POLL;
|
||||
|
||||
platform_set_drvdata(bp->dev, bp->mii_bus);
|
||||
dev_set_drvdata(&bp->dev->dev, bp->mii_bus);
|
||||
|
||||
if (mdiobus_register(bp->mii_bus))
|
||||
goto err_out_free_mdio_irq;
|
||||
|
|
|
|||
|
|
@ -528,8 +528,9 @@ static ssize_t macvtap_get_user(struct macvtap_queue *q,
|
|||
vnet_hdr_len = q->vnet_hdr_sz;
|
||||
|
||||
err = -EINVAL;
|
||||
if ((len -= vnet_hdr_len) < 0)
|
||||
if (len < vnet_hdr_len)
|
||||
goto err;
|
||||
len -= vnet_hdr_len;
|
||||
|
||||
err = memcpy_fromiovecend((void *)&vnet_hdr, iv, 0,
|
||||
sizeof(vnet_hdr));
|
||||
|
|
|
|||
|
|
@ -691,6 +691,7 @@ static struct pcmcia_device_id fmvj18x_ids[] = {
|
|||
PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0105, 0x0e0a),
|
||||
PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0032, 0x0e01),
|
||||
PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0032, 0x0a05),
|
||||
PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0032, 0x0b05),
|
||||
PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0032, 0x1101),
|
||||
PCMCIA_DEVICE_NULL,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -49,8 +49,8 @@
|
|||
#include <asm/processor.h>
|
||||
|
||||
#define DRV_NAME "r6040"
|
||||
#define DRV_VERSION "0.26"
|
||||
#define DRV_RELDATE "30May2010"
|
||||
#define DRV_VERSION "0.27"
|
||||
#define DRV_RELDATE "23Feb2011"
|
||||
|
||||
/* PHY CHIP Address */
|
||||
#define PHY1_ADDR 1 /* For MAC1 */
|
||||
|
|
@ -69,6 +69,8 @@
|
|||
|
||||
/* MAC registers */
|
||||
#define MCR0 0x00 /* Control register 0 */
|
||||
#define MCR0_PROMISC 0x0020 /* Promiscuous mode */
|
||||
#define MCR0_HASH_EN 0x0100 /* Enable multicast hash table function */
|
||||
#define MCR1 0x04 /* Control register 1 */
|
||||
#define MAC_RST 0x0001 /* Reset the MAC */
|
||||
#define MBCR 0x08 /* Bus control */
|
||||
|
|
@ -851,77 +853,92 @@ static void r6040_multicast_list(struct net_device *dev)
|
|||
{
|
||||
struct r6040_private *lp = netdev_priv(dev);
|
||||
void __iomem *ioaddr = lp->base;
|
||||
u16 *adrp;
|
||||
u16 reg;
|
||||
unsigned long flags;
|
||||
struct netdev_hw_addr *ha;
|
||||
int i;
|
||||
u16 *adrp;
|
||||
u16 hash_table[4] = { 0 };
|
||||
|
||||
/* MAC Address */
|
||||
spin_lock_irqsave(&lp->lock, flags);
|
||||
|
||||
/* Keep our MAC Address */
|
||||
adrp = (u16 *)dev->dev_addr;
|
||||
iowrite16(adrp[0], ioaddr + MID_0L);
|
||||
iowrite16(adrp[1], ioaddr + MID_0M);
|
||||
iowrite16(adrp[2], ioaddr + MID_0H);
|
||||
|
||||
/* Promiscous Mode */
|
||||
spin_lock_irqsave(&lp->lock, flags);
|
||||
|
||||
/* Clear AMCP & PROM bits */
|
||||
reg = ioread16(ioaddr) & ~0x0120;
|
||||
if (dev->flags & IFF_PROMISC) {
|
||||
reg |= 0x0020;
|
||||
lp->mcr0 |= 0x0020;
|
||||
}
|
||||
/* Too many multicast addresses
|
||||
* accept all traffic */
|
||||
else if ((netdev_mc_count(dev) > MCAST_MAX) ||
|
||||
(dev->flags & IFF_ALLMULTI))
|
||||
reg |= 0x0020;
|
||||
lp->mcr0 = ioread16(ioaddr + MCR0) & ~(MCR0_PROMISC | MCR0_HASH_EN);
|
||||
|
||||
iowrite16(reg, ioaddr);
|
||||
spin_unlock_irqrestore(&lp->lock, flags);
|
||||
/* Promiscuous mode */
|
||||
if (dev->flags & IFF_PROMISC)
|
||||
lp->mcr0 |= MCR0_PROMISC;
|
||||
|
||||
/* Build the hash table */
|
||||
if (netdev_mc_count(dev) > MCAST_MAX) {
|
||||
u16 hash_table[4];
|
||||
u32 crc;
|
||||
/* Enable multicast hash table function to
|
||||
* receive all multicast packets. */
|
||||
else if (dev->flags & IFF_ALLMULTI) {
|
||||
lp->mcr0 |= MCR0_HASH_EN;
|
||||
|
||||
for (i = 0; i < MCAST_MAX ; i++) {
|
||||
iowrite16(0, ioaddr + MID_1L + 8 * i);
|
||||
iowrite16(0, ioaddr + MID_1M + 8 * i);
|
||||
iowrite16(0, ioaddr + MID_1H + 8 * i);
|
||||
}
|
||||
|
||||
for (i = 0; i < 4; i++)
|
||||
hash_table[i] = 0;
|
||||
|
||||
hash_table[i] = 0xffff;
|
||||
}
|
||||
/* Use internal multicast address registers if the number of
|
||||
* multicast addresses is not greater than MCAST_MAX. */
|
||||
else if (netdev_mc_count(dev) <= MCAST_MAX) {
|
||||
i = 0;
|
||||
netdev_for_each_mc_addr(ha, dev) {
|
||||
char *addrs = ha->addr;
|
||||
|
||||
if (!(*addrs & 1))
|
||||
continue;
|
||||
|
||||
crc = ether_crc_le(6, addrs);
|
||||
crc >>= 26;
|
||||
hash_table[crc >> 4] |= 1 << (15 - (crc & 0xf));
|
||||
u16 *adrp = (u16 *) ha->addr;
|
||||
iowrite16(adrp[0], ioaddr + MID_1L + 8 * i);
|
||||
iowrite16(adrp[1], ioaddr + MID_1M + 8 * i);
|
||||
iowrite16(adrp[2], ioaddr + MID_1H + 8 * i);
|
||||
i++;
|
||||
}
|
||||
/* Fill the MAC hash tables with their values */
|
||||
while (i < MCAST_MAX) {
|
||||
iowrite16(0, ioaddr + MID_1L + 8 * i);
|
||||
iowrite16(0, ioaddr + MID_1M + 8 * i);
|
||||
iowrite16(0, ioaddr + MID_1H + 8 * i);
|
||||
i++;
|
||||
}
|
||||
}
|
||||
/* Otherwise, Enable multicast hash table function. */
|
||||
else {
|
||||
u32 crc;
|
||||
|
||||
lp->mcr0 |= MCR0_HASH_EN;
|
||||
|
||||
for (i = 0; i < MCAST_MAX ; i++) {
|
||||
iowrite16(0, ioaddr + MID_1L + 8 * i);
|
||||
iowrite16(0, ioaddr + MID_1M + 8 * i);
|
||||
iowrite16(0, ioaddr + MID_1H + 8 * i);
|
||||
}
|
||||
|
||||
/* Build multicast hash table */
|
||||
netdev_for_each_mc_addr(ha, dev) {
|
||||
u8 *addrs = ha->addr;
|
||||
|
||||
crc = ether_crc(ETH_ALEN, addrs);
|
||||
crc >>= 26;
|
||||
hash_table[crc >> 4] |= 1 << (crc & 0xf);
|
||||
}
|
||||
}
|
||||
|
||||
iowrite16(lp->mcr0, ioaddr + MCR0);
|
||||
|
||||
/* Fill the MAC hash tables with their values */
|
||||
if (lp->mcr0 && MCR0_HASH_EN) {
|
||||
iowrite16(hash_table[0], ioaddr + MAR0);
|
||||
iowrite16(hash_table[1], ioaddr + MAR1);
|
||||
iowrite16(hash_table[2], ioaddr + MAR2);
|
||||
iowrite16(hash_table[3], ioaddr + MAR3);
|
||||
}
|
||||
/* Multicast Address 1~4 case */
|
||||
i = 0;
|
||||
netdev_for_each_mc_addr(ha, dev) {
|
||||
if (i >= MCAST_MAX)
|
||||
break;
|
||||
adrp = (u16 *) ha->addr;
|
||||
iowrite16(adrp[0], ioaddr + MID_1L + 8 * i);
|
||||
iowrite16(adrp[1], ioaddr + MID_1M + 8 * i);
|
||||
iowrite16(adrp[2], ioaddr + MID_1H + 8 * i);
|
||||
i++;
|
||||
}
|
||||
while (i < MCAST_MAX) {
|
||||
iowrite16(0xffff, ioaddr + MID_1L + 8 * i);
|
||||
iowrite16(0xffff, ioaddr + MID_1M + 8 * i);
|
||||
iowrite16(0xffff, ioaddr + MID_1H + 8 * i);
|
||||
i++;
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&lp->lock, flags);
|
||||
}
|
||||
|
||||
static void netdev_get_drvinfo(struct net_device *dev,
|
||||
|
|
|
|||
|
|
@ -25,6 +25,7 @@
|
|||
#include <linux/dma-mapping.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <linux/firmware.h>
|
||||
#include <linux/pci-aspm.h>
|
||||
|
||||
#include <asm/system.h>
|
||||
#include <asm/io.h>
|
||||
|
|
@ -617,8 +618,9 @@ static void ocp_write(struct rtl8169_private *tp, u8 mask, u16 reg, u32 data)
|
|||
}
|
||||
}
|
||||
|
||||
static void rtl8168_oob_notify(void __iomem *ioaddr, u8 cmd)
|
||||
static void rtl8168_oob_notify(struct rtl8169_private *tp, u8 cmd)
|
||||
{
|
||||
void __iomem *ioaddr = tp->mmio_addr;
|
||||
int i;
|
||||
|
||||
RTL_W8(ERIDR, cmd);
|
||||
|
|
@ -630,7 +632,7 @@ static void rtl8168_oob_notify(void __iomem *ioaddr, u8 cmd)
|
|||
break;
|
||||
}
|
||||
|
||||
ocp_write(ioaddr, 0x1, 0x30, 0x00000001);
|
||||
ocp_write(tp, 0x1, 0x30, 0x00000001);
|
||||
}
|
||||
|
||||
#define OOB_CMD_RESET 0x00
|
||||
|
|
@ -2868,8 +2870,11 @@ static void r8168_pll_power_down(struct rtl8169_private *tp)
|
|||
{
|
||||
void __iomem *ioaddr = tp->mmio_addr;
|
||||
|
||||
if (tp->mac_version == RTL_GIGA_MAC_VER_27)
|
||||
if (((tp->mac_version == RTL_GIGA_MAC_VER_27) ||
|
||||
(tp->mac_version == RTL_GIGA_MAC_VER_28)) &&
|
||||
(ocp_read(tp, 0x0f, 0x0010) & 0x00008000)) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (((tp->mac_version == RTL_GIGA_MAC_VER_23) ||
|
||||
(tp->mac_version == RTL_GIGA_MAC_VER_24)) &&
|
||||
|
|
@ -2891,6 +2896,8 @@ static void r8168_pll_power_down(struct rtl8169_private *tp)
|
|||
switch (tp->mac_version) {
|
||||
case RTL_GIGA_MAC_VER_25:
|
||||
case RTL_GIGA_MAC_VER_26:
|
||||
case RTL_GIGA_MAC_VER_27:
|
||||
case RTL_GIGA_MAC_VER_28:
|
||||
RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80);
|
||||
break;
|
||||
}
|
||||
|
|
@ -2900,12 +2907,17 @@ static void r8168_pll_power_up(struct rtl8169_private *tp)
|
|||
{
|
||||
void __iomem *ioaddr = tp->mmio_addr;
|
||||
|
||||
if (tp->mac_version == RTL_GIGA_MAC_VER_27)
|
||||
if (((tp->mac_version == RTL_GIGA_MAC_VER_27) ||
|
||||
(tp->mac_version == RTL_GIGA_MAC_VER_28)) &&
|
||||
(ocp_read(tp, 0x0f, 0x0010) & 0x00008000)) {
|
||||
return;
|
||||
}
|
||||
|
||||
switch (tp->mac_version) {
|
||||
case RTL_GIGA_MAC_VER_25:
|
||||
case RTL_GIGA_MAC_VER_26:
|
||||
case RTL_GIGA_MAC_VER_27:
|
||||
case RTL_GIGA_MAC_VER_28:
|
||||
RTL_W8(PMCH, RTL_R8(PMCH) | 0x80);
|
||||
break;
|
||||
}
|
||||
|
|
@ -3009,6 +3021,11 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||
mii->reg_num_mask = 0x1f;
|
||||
mii->supports_gmii = !!(cfg->features & RTL_FEATURE_GMII);
|
||||
|
||||
/* disable ASPM completely as that cause random device stop working
|
||||
* problems as well as full system hangs for some PCIe devices users */
|
||||
pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
|
||||
PCIE_LINK_STATE_CLKPM);
|
||||
|
||||
/* enable device (incl. PCI PM wakeup and hotplug setup) */
|
||||
rc = pci_enable_device(pdev);
|
||||
if (rc < 0) {
|
||||
|
|
@ -3042,7 +3059,7 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||
goto err_out_mwi_2;
|
||||
}
|
||||
|
||||
tp->cp_cmd = PCIMulRW | RxChkSum;
|
||||
tp->cp_cmd = RxChkSum;
|
||||
|
||||
if ((sizeof(dma_addr_t) > 4) &&
|
||||
!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) && use_dac) {
|
||||
|
|
@ -3318,7 +3335,8 @@ static void rtl8169_hw_reset(struct rtl8169_private *tp)
|
|||
/* Disable interrupts */
|
||||
rtl8169_irq_mask_and_ack(ioaddr);
|
||||
|
||||
if (tp->mac_version == RTL_GIGA_MAC_VER_28) {
|
||||
if (tp->mac_version == RTL_GIGA_MAC_VER_27 ||
|
||||
tp->mac_version == RTL_GIGA_MAC_VER_28) {
|
||||
while (RTL_R8(TxPoll) & NPQ)
|
||||
udelay(20);
|
||||
|
||||
|
|
@ -3847,8 +3865,7 @@ static void rtl_hw_start_8168(struct net_device *dev)
|
|||
Cxpl_dbg_sel | \
|
||||
ASF | \
|
||||
PktCntrDisable | \
|
||||
PCIDAC | \
|
||||
PCIMulRW)
|
||||
Mac_dbgo_sel)
|
||||
|
||||
static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev)
|
||||
{
|
||||
|
|
@ -3878,8 +3895,6 @@ static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev)
|
|||
if ((cfg1 & LEDS0) && (cfg1 & LEDS1))
|
||||
RTL_W8(Config1, cfg1 & ~LEDS0);
|
||||
|
||||
RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK);
|
||||
|
||||
rtl_ephy_init(ioaddr, e_info_8102e_1, ARRAY_SIZE(e_info_8102e_1));
|
||||
}
|
||||
|
||||
|
|
@ -3891,8 +3906,6 @@ static void rtl_hw_start_8102e_2(void __iomem *ioaddr, struct pci_dev *pdev)
|
|||
|
||||
RTL_W8(Config1, MEMMAP | IOMAP | VPD | PMEnable);
|
||||
RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
|
||||
|
||||
RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK);
|
||||
}
|
||||
|
||||
static void rtl_hw_start_8102e_3(void __iomem *ioaddr, struct pci_dev *pdev)
|
||||
|
|
@ -3918,6 +3931,8 @@ static void rtl_hw_start_8101(struct net_device *dev)
|
|||
}
|
||||
}
|
||||
|
||||
RTL_W8(Cfg9346, Cfg9346_Unlock);
|
||||
|
||||
switch (tp->mac_version) {
|
||||
case RTL_GIGA_MAC_VER_07:
|
||||
rtl_hw_start_8102e_1(ioaddr, pdev);
|
||||
|
|
@ -3932,14 +3947,13 @@ static void rtl_hw_start_8101(struct net_device *dev)
|
|||
break;
|
||||
}
|
||||
|
||||
RTL_W8(Cfg9346, Cfg9346_Unlock);
|
||||
RTL_W8(Cfg9346, Cfg9346_Lock);
|
||||
|
||||
RTL_W8(MaxTxPacketSize, TxPacketMax);
|
||||
|
||||
rtl_set_rx_max_size(ioaddr, rx_buf_sz);
|
||||
|
||||
tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW;
|
||||
|
||||
tp->cp_cmd &= ~R810X_CPCMD_QUIRK_MASK;
|
||||
RTL_W16(CPlusCmd, tp->cp_cmd);
|
||||
|
||||
RTL_W16(IntrMitigate, 0x0000);
|
||||
|
|
@ -3949,14 +3963,10 @@ static void rtl_hw_start_8101(struct net_device *dev)
|
|||
RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
|
||||
rtl_set_rx_tx_config_registers(tp);
|
||||
|
||||
RTL_W8(Cfg9346, Cfg9346_Lock);
|
||||
|
||||
RTL_R8(IntrMask);
|
||||
|
||||
rtl_set_rx_mode(dev);
|
||||
|
||||
RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
|
||||
|
||||
RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000);
|
||||
|
||||
RTL_W16(IntrMask, tp->intr_event);
|
||||
|
|
|
|||
|
|
@ -569,9 +569,14 @@ static void efx_ethtool_self_test(struct net_device *net_dev,
|
|||
struct ethtool_test *test, u64 *data)
|
||||
{
|
||||
struct efx_nic *efx = netdev_priv(net_dev);
|
||||
struct efx_self_tests efx_tests;
|
||||
struct efx_self_tests *efx_tests;
|
||||
int already_up;
|
||||
int rc;
|
||||
int rc = -ENOMEM;
|
||||
|
||||
efx_tests = kzalloc(sizeof(*efx_tests), GFP_KERNEL);
|
||||
if (!efx_tests)
|
||||
goto fail;
|
||||
|
||||
|
||||
ASSERT_RTNL();
|
||||
if (efx->state != STATE_RUNNING) {
|
||||
|
|
@ -589,13 +594,11 @@ static void efx_ethtool_self_test(struct net_device *net_dev,
|
|||
if (rc) {
|
||||
netif_err(efx, drv, efx->net_dev,
|
||||
"failed opening device.\n");
|
||||
goto fail2;
|
||||
goto fail1;
|
||||
}
|
||||
}
|
||||
|
||||
memset(&efx_tests, 0, sizeof(efx_tests));
|
||||
|
||||
rc = efx_selftest(efx, &efx_tests, test->flags);
|
||||
rc = efx_selftest(efx, efx_tests, test->flags);
|
||||
|
||||
if (!already_up)
|
||||
dev_close(efx->net_dev);
|
||||
|
|
@ -604,10 +607,11 @@ static void efx_ethtool_self_test(struct net_device *net_dev,
|
|||
rc == 0 ? "passed" : "failed",
|
||||
(test->flags & ETH_TEST_FL_OFFLINE) ? "off" : "on");
|
||||
|
||||
fail2:
|
||||
fail1:
|
||||
fail1:
|
||||
/* Fill ethtool results structures */
|
||||
efx_ethtool_fill_self_tests(efx, &efx_tests, NULL, data);
|
||||
efx_ethtool_fill_self_tests(efx, efx_tests, NULL, data);
|
||||
kfree(efx_tests);
|
||||
fail:
|
||||
if (rc)
|
||||
test->flags |= ETH_TEST_FL_FAILED;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -3856,9 +3856,6 @@ static struct net_device *skge_devinit(struct skge_hw *hw, int port,
|
|||
memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port*8, ETH_ALEN);
|
||||
memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
|
||||
|
||||
/* device is off until link detection */
|
||||
netif_carrier_off(dev);
|
||||
|
||||
return dev;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1178,6 +1178,11 @@ static int smsc911x_open(struct net_device *dev)
|
|||
smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
|
||||
smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
|
||||
|
||||
/* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
|
||||
spin_lock_irq(&pdata->mac_lock);
|
||||
smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
|
||||
spin_unlock_irq(&pdata->mac_lock);
|
||||
|
||||
/* Make sure EEPROM has finished loading before setting GPIO_CFG */
|
||||
timeout = 50;
|
||||
while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
|
||||
|
|
|
|||
|
|
@ -650,6 +650,10 @@ static const struct usb_device_id products[] = {
|
|||
USB_DEVICE(0x0fe6, 0x8101), /* DM9601 USB to Fast Ethernet Adapter */
|
||||
.driver_info = (unsigned long)&dm9601_info,
|
||||
},
|
||||
{
|
||||
USB_DEVICE(0x0fe6, 0x9700), /* DM9601 USB to Fast Ethernet Adapter */
|
||||
.driver_info = (unsigned long)&dm9601_info,
|
||||
},
|
||||
{
|
||||
USB_DEVICE(0x0a46, 0x9000), /* DM9000E */
|
||||
.driver_info = (unsigned long)&dm9601_info,
|
||||
|
|
|
|||
|
|
@ -282,6 +282,34 @@ int ath5k_hw_phy_disable(struct ath5k_hw *ah)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Wait for synth to settle
|
||||
*/
|
||||
static void ath5k_hw_wait_for_synth(struct ath5k_hw *ah,
|
||||
struct ieee80211_channel *channel)
|
||||
{
|
||||
/*
|
||||
* On 5211+ read activation -> rx delay
|
||||
* and use it (100ns steps).
|
||||
*/
|
||||
if (ah->ah_version != AR5K_AR5210) {
|
||||
u32 delay;
|
||||
delay = ath5k_hw_reg_read(ah, AR5K_PHY_RX_DELAY) &
|
||||
AR5K_PHY_RX_DELAY_M;
|
||||
delay = (channel->hw_value & CHANNEL_CCK) ?
|
||||
((delay << 2) / 22) : (delay / 10);
|
||||
if (ah->ah_bwmode == AR5K_BWMODE_10MHZ)
|
||||
delay = delay << 1;
|
||||
if (ah->ah_bwmode == AR5K_BWMODE_5MHZ)
|
||||
delay = delay << 2;
|
||||
/* XXX: /2 on turbo ? Let's be safe
|
||||
* for now */
|
||||
udelay(100 + delay);
|
||||
} else {
|
||||
mdelay(1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**********************\
|
||||
* RF Gain optimization *
|
||||
|
|
@ -1253,6 +1281,7 @@ static int ath5k_hw_channel(struct ath5k_hw *ah,
|
|||
case AR5K_RF5111:
|
||||
ret = ath5k_hw_rf5111_channel(ah, channel);
|
||||
break;
|
||||
case AR5K_RF2317:
|
||||
case AR5K_RF2425:
|
||||
ret = ath5k_hw_rf2425_channel(ah, channel);
|
||||
break;
|
||||
|
|
@ -3237,6 +3266,13 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel,
|
|||
/* Failed */
|
||||
if (i >= 100)
|
||||
return -EIO;
|
||||
|
||||
/* Set channel and wait for synth */
|
||||
ret = ath5k_hw_channel(ah, channel);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ath5k_hw_wait_for_synth(ah, channel);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -3251,13 +3287,53 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel,
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* Write OFDM timings on 5212*/
|
||||
if (ah->ah_version == AR5K_AR5212 &&
|
||||
channel->hw_value & CHANNEL_OFDM) {
|
||||
|
||||
ret = ath5k_hw_write_ofdm_timings(ah, channel);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* Spur info is available only from EEPROM versions
|
||||
* greater than 5.3, but the EEPROM routines will use
|
||||
* static values for older versions */
|
||||
if (ah->ah_mac_srev >= AR5K_SREV_AR5424)
|
||||
ath5k_hw_set_spur_mitigation_filter(ah,
|
||||
channel);
|
||||
}
|
||||
|
||||
/* If we used fast channel switching
|
||||
* we are done, release RF bus and
|
||||
* fire up NF calibration.
|
||||
*
|
||||
* Note: Only NF calibration due to
|
||||
* channel change, not AGC calibration
|
||||
* since AGC is still running !
|
||||
*/
|
||||
if (fast) {
|
||||
/*
|
||||
* Release RF Bus grant
|
||||
*/
|
||||
AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_RFBUS_REQ,
|
||||
AR5K_PHY_RFBUS_REQ_REQUEST);
|
||||
|
||||
/*
|
||||
* Start NF calibration
|
||||
*/
|
||||
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,
|
||||
AR5K_PHY_AGCCTL_NF);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* For 5210 we do all initialization using
|
||||
* initvals, so we don't have to modify
|
||||
* any settings (5210 also only supports
|
||||
* a/aturbo modes)
|
||||
*/
|
||||
if ((ah->ah_version != AR5K_AR5210) && !fast) {
|
||||
if (ah->ah_version != AR5K_AR5210) {
|
||||
|
||||
/*
|
||||
* Write initial RF gain settings
|
||||
|
|
@ -3276,22 +3352,6 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel,
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* Write OFDM timings on 5212*/
|
||||
if (ah->ah_version == AR5K_AR5212 &&
|
||||
channel->hw_value & CHANNEL_OFDM) {
|
||||
|
||||
ret = ath5k_hw_write_ofdm_timings(ah, channel);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* Spur info is available only from EEPROM versions
|
||||
* greater than 5.3, but the EEPROM routines will use
|
||||
* static values for older versions */
|
||||
if (ah->ah_mac_srev >= AR5K_SREV_AR5424)
|
||||
ath5k_hw_set_spur_mitigation_filter(ah,
|
||||
channel);
|
||||
}
|
||||
|
||||
/*Enable/disable 802.11b mode on 5111
|
||||
(enable 2111 frequency converter + CCK)*/
|
||||
if (ah->ah_radio == AR5K_RF5111) {
|
||||
|
|
@ -3322,47 +3382,20 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel,
|
|||
*/
|
||||
ath5k_hw_reg_write(ah, AR5K_PHY_ACT_ENABLE, AR5K_PHY_ACT);
|
||||
|
||||
/*
|
||||
* On 5211+ read activation -> rx delay
|
||||
* and use it.
|
||||
*/
|
||||
if (ah->ah_version != AR5K_AR5210) {
|
||||
u32 delay;
|
||||
delay = ath5k_hw_reg_read(ah, AR5K_PHY_RX_DELAY) &
|
||||
AR5K_PHY_RX_DELAY_M;
|
||||
delay = (channel->hw_value & CHANNEL_CCK) ?
|
||||
((delay << 2) / 22) : (delay / 10);
|
||||
if (ah->ah_bwmode == AR5K_BWMODE_10MHZ)
|
||||
delay = delay << 1;
|
||||
if (ah->ah_bwmode == AR5K_BWMODE_5MHZ)
|
||||
delay = delay << 2;
|
||||
/* XXX: /2 on turbo ? Let's be safe
|
||||
* for now */
|
||||
udelay(100 + delay);
|
||||
} else {
|
||||
mdelay(1);
|
||||
}
|
||||
ath5k_hw_wait_for_synth(ah, channel);
|
||||
|
||||
if (fast)
|
||||
/*
|
||||
* Release RF Bus grant
|
||||
*/
|
||||
AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_RFBUS_REQ,
|
||||
AR5K_PHY_RFBUS_REQ_REQUEST);
|
||||
else {
|
||||
/*
|
||||
* Perform ADC test to see if baseband is ready
|
||||
* Set tx hold and check adc test register
|
||||
*/
|
||||
phy_tst1 = ath5k_hw_reg_read(ah, AR5K_PHY_TST1);
|
||||
ath5k_hw_reg_write(ah, AR5K_PHY_TST1_TXHOLD, AR5K_PHY_TST1);
|
||||
for (i = 0; i <= 20; i++) {
|
||||
if (!(ath5k_hw_reg_read(ah, AR5K_PHY_ADC_TEST) & 0x10))
|
||||
break;
|
||||
udelay(200);
|
||||
}
|
||||
ath5k_hw_reg_write(ah, phy_tst1, AR5K_PHY_TST1);
|
||||
/*
|
||||
* Perform ADC test to see if baseband is ready
|
||||
* Set tx hold and check adc test register
|
||||
*/
|
||||
phy_tst1 = ath5k_hw_reg_read(ah, AR5K_PHY_TST1);
|
||||
ath5k_hw_reg_write(ah, AR5K_PHY_TST1_TXHOLD, AR5K_PHY_TST1);
|
||||
for (i = 0; i <= 20; i++) {
|
||||
if (!(ath5k_hw_reg_read(ah, AR5K_PHY_ADC_TEST) & 0x10))
|
||||
break;
|
||||
udelay(200);
|
||||
}
|
||||
ath5k_hw_reg_write(ah, phy_tst1, AR5K_PHY_TST1);
|
||||
|
||||
/*
|
||||
* Start automatic gain control calibration
|
||||
|
|
|
|||
|
|
@ -21,7 +21,6 @@
|
|||
#include <linux/device.h>
|
||||
#include <linux/leds.h>
|
||||
#include <linux/completion.h>
|
||||
#include <linux/pm_qos_params.h>
|
||||
|
||||
#include "debug.h"
|
||||
#include "common.h"
|
||||
|
|
@ -57,8 +56,6 @@ struct ath_node;
|
|||
|
||||
#define A_MAX(a, b) ((a) > (b) ? (a) : (b))
|
||||
|
||||
#define ATH9K_PM_QOS_DEFAULT_VALUE 55
|
||||
|
||||
#define TSF_TO_TU(_h,_l) \
|
||||
((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
|
||||
|
||||
|
|
@ -633,8 +630,6 @@ struct ath_softc {
|
|||
struct ath_descdma txsdma;
|
||||
|
||||
struct ath_ant_comb ant_comb;
|
||||
|
||||
struct pm_qos_request_list pm_qos_req;
|
||||
};
|
||||
|
||||
struct ath_wiphy {
|
||||
|
|
@ -666,7 +661,6 @@ static inline void ath_read_cachesize(struct ath_common *common, int *csz)
|
|||
extern struct ieee80211_ops ath9k_ops;
|
||||
extern int ath9k_modparam_nohwcrypt;
|
||||
extern int led_blink;
|
||||
extern int ath9k_pm_qos_value;
|
||||
extern bool is_ath9k_unloaded;
|
||||
|
||||
irqreturn_t ath_isr(int irq, void *dev);
|
||||
|
|
|
|||
|
|
@ -219,8 +219,9 @@ static int __hif_usb_tx(struct hif_device_usb *hif_dev)
|
|||
struct tx_buf *tx_buf = NULL;
|
||||
struct sk_buff *nskb = NULL;
|
||||
int ret = 0, i;
|
||||
u16 *hdr, tx_skb_cnt = 0;
|
||||
u16 tx_skb_cnt = 0;
|
||||
u8 *buf;
|
||||
__le16 *hdr;
|
||||
|
||||
if (hif_dev->tx.tx_skb_cnt == 0)
|
||||
return 0;
|
||||
|
|
@ -245,9 +246,9 @@ static int __hif_usb_tx(struct hif_device_usb *hif_dev)
|
|||
|
||||
buf = tx_buf->buf;
|
||||
buf += tx_buf->offset;
|
||||
hdr = (u16 *)buf;
|
||||
*hdr++ = nskb->len;
|
||||
*hdr++ = ATH_USB_TX_STREAM_MODE_TAG;
|
||||
hdr = (__le16 *)buf;
|
||||
*hdr++ = cpu_to_le16(nskb->len);
|
||||
*hdr++ = cpu_to_le16(ATH_USB_TX_STREAM_MODE_TAG);
|
||||
buf += 4;
|
||||
memcpy(buf, nskb->data, nskb->len);
|
||||
tx_buf->len = nskb->len + 4;
|
||||
|
|
|
|||
|
|
@ -41,10 +41,6 @@ static int ath9k_btcoex_enable;
|
|||
module_param_named(btcoex_enable, ath9k_btcoex_enable, int, 0444);
|
||||
MODULE_PARM_DESC(btcoex_enable, "Enable wifi-BT coexistence");
|
||||
|
||||
int ath9k_pm_qos_value = ATH9K_PM_QOS_DEFAULT_VALUE;
|
||||
module_param_named(pmqos, ath9k_pm_qos_value, int, S_IRUSR | S_IRGRP | S_IROTH);
|
||||
MODULE_PARM_DESC(pmqos, "User specified PM-QOS value");
|
||||
|
||||
bool is_ath9k_unloaded;
|
||||
/* We use the hw_value as an index into our private channel structure */
|
||||
|
||||
|
|
@ -762,9 +758,6 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
|
|||
ath_init_leds(sc);
|
||||
ath_start_rfkill_poll(sc);
|
||||
|
||||
pm_qos_add_request(&sc->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
|
||||
PM_QOS_DEFAULT_VALUE);
|
||||
|
||||
return 0;
|
||||
|
||||
error_world:
|
||||
|
|
@ -831,7 +824,6 @@ void ath9k_deinit_device(struct ath_softc *sc)
|
|||
}
|
||||
|
||||
ieee80211_unregister_hw(hw);
|
||||
pm_qos_remove_request(&sc->pm_qos_req);
|
||||
ath_rx_cleanup(sc);
|
||||
ath_tx_cleanup(sc);
|
||||
ath9k_deinit_softc(sc);
|
||||
|
|
|
|||
|
|
@ -885,7 +885,7 @@ void ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints)
|
|||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
|
||||
if (!(ints & ATH9K_INT_GLOBAL))
|
||||
ath9k_hw_enable_interrupts(ah);
|
||||
ath9k_hw_disable_interrupts(ah);
|
||||
|
||||
ath_dbg(common, ATH_DBG_INTERRUPT, "0x%x => 0x%x\n", omask, ints);
|
||||
|
||||
|
|
@ -963,7 +963,8 @@ void ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints)
|
|||
REG_CLR_BIT(ah, AR_IMR_S5, AR_IMR_S5_TIM_TIMER);
|
||||
}
|
||||
|
||||
ath9k_hw_enable_interrupts(ah);
|
||||
if (ints & ATH9K_INT_GLOBAL)
|
||||
ath9k_hw_enable_interrupts(ah);
|
||||
|
||||
return;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1173,12 +1173,6 @@ static int ath9k_start(struct ieee80211_hw *hw)
|
|||
ath9k_btcoex_timer_resume(sc);
|
||||
}
|
||||
|
||||
/* User has the option to provide pm-qos value as a module
|
||||
* parameter rather than using the default value of
|
||||
* 'ATH9K_PM_QOS_DEFAULT_VALUE'.
|
||||
*/
|
||||
pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
|
||||
|
||||
if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
|
||||
common->bus_ops->extn_synch_en(common);
|
||||
|
||||
|
|
@ -1345,8 +1339,6 @@ static void ath9k_stop(struct ieee80211_hw *hw)
|
|||
|
||||
sc->sc_flags |= SC_OP_INVALID;
|
||||
|
||||
pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
|
||||
|
||||
mutex_unlock(&sc->mutex);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
|
||||
|
|
|
|||
|
|
@ -118,6 +118,8 @@ static struct usb_device_id carl9170_usb_ids[] = {
|
|||
{ USB_DEVICE(0x057c, 0x8402) },
|
||||
/* Qwest/Actiontec 802AIN Wireless N USB Network Adapter */
|
||||
{ USB_DEVICE(0x1668, 0x1200) },
|
||||
/* Airlive X.USB a/b/g/n */
|
||||
{ USB_DEVICE(0x1b75, 0x9170) },
|
||||
|
||||
/* terminate */
|
||||
{}
|
||||
|
|
|
|||
|
|
@ -51,7 +51,7 @@
|
|||
#include "iwl-agn-debugfs.h"
|
||||
|
||||
/* Highest firmware API version supported */
|
||||
#define IWL5000_UCODE_API_MAX 2
|
||||
#define IWL5000_UCODE_API_MAX 5
|
||||
#define IWL5150_UCODE_API_MAX 2
|
||||
|
||||
/* Lowest firmware API version supported */
|
||||
|
|
|
|||
|
|
@ -199,6 +199,7 @@ static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index,
|
|||
while (i != idx) {
|
||||
u16 len;
|
||||
struct sk_buff *skb;
|
||||
dma_addr_t dma_addr;
|
||||
desc = &ring[i];
|
||||
len = le16_to_cpu(desc->len);
|
||||
skb = rx_buf[i];
|
||||
|
|
@ -216,17 +217,20 @@ static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index,
|
|||
|
||||
len = priv->common.rx_mtu;
|
||||
}
|
||||
dma_addr = le32_to_cpu(desc->host_addr);
|
||||
pci_dma_sync_single_for_cpu(priv->pdev, dma_addr,
|
||||
priv->common.rx_mtu + 32, PCI_DMA_FROMDEVICE);
|
||||
skb_put(skb, len);
|
||||
|
||||
if (p54_rx(dev, skb)) {
|
||||
pci_unmap_single(priv->pdev,
|
||||
le32_to_cpu(desc->host_addr),
|
||||
priv->common.rx_mtu + 32,
|
||||
PCI_DMA_FROMDEVICE);
|
||||
pci_unmap_single(priv->pdev, dma_addr,
|
||||
priv->common.rx_mtu + 32, PCI_DMA_FROMDEVICE);
|
||||
rx_buf[i] = NULL;
|
||||
desc->host_addr = 0;
|
||||
desc->host_addr = cpu_to_le32(0);
|
||||
} else {
|
||||
skb_trim(skb, 0);
|
||||
pci_dma_sync_single_for_device(priv->pdev, dma_addr,
|
||||
priv->common.rx_mtu + 32, PCI_DMA_FROMDEVICE);
|
||||
desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -98,6 +98,7 @@ static struct usb_device_id p54u_table[] __devinitdata = {
|
|||
{USB_DEVICE(0x1413, 0x5400)}, /* Telsey 802.11g USB2.0 Adapter */
|
||||
{USB_DEVICE(0x1435, 0x0427)}, /* Inventel UR054G */
|
||||
{USB_DEVICE(0x1668, 0x1050)}, /* Actiontec 802UIG-1 */
|
||||
{USB_DEVICE(0x1740, 0x1000)}, /* Senao NUB-350 */
|
||||
{USB_DEVICE(0x2001, 0x3704)}, /* DLink DWL-G122 rev A2 */
|
||||
{USB_DEVICE(0x2001, 0x3705)}, /* D-Link DWL-G120 rev C1 */
|
||||
{USB_DEVICE(0x413c, 0x5513)}, /* Dell WLA3310 USB Wireless Adapter */
|
||||
|
|
|
|||
|
|
@ -2597,6 +2597,9 @@ static int rndis_set_power_mgmt(struct wiphy *wiphy, struct net_device *dev,
|
|||
__le32 mode;
|
||||
int ret;
|
||||
|
||||
if (priv->device_type != RNDIS_BCM4320B)
|
||||
return -ENOTSUPP;
|
||||
|
||||
netdev_dbg(usbdev->net, "%s(): %s, %d\n", __func__,
|
||||
enabled ? "enabled" : "disabled",
|
||||
timeout);
|
||||
|
|
|
|||
|
|
@ -652,6 +652,12 @@ static void rt2800pci_fill_rxdone(struct queue_entry *entry,
|
|||
*/
|
||||
rxdesc->flags |= RX_FLAG_IV_STRIPPED;
|
||||
|
||||
/*
|
||||
* The hardware has already checked the Michael Mic and has
|
||||
* stripped it from the frame. Signal this to mac80211.
|
||||
*/
|
||||
rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
|
||||
|
||||
if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
|
||||
rxdesc->flags |= RX_FLAG_DECRYPTED;
|
||||
else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
|
||||
|
|
@ -1065,6 +1071,8 @@ static DEFINE_PCI_DEVICE_TABLE(rt2800pci_device_table) = {
|
|||
{ PCI_DEVICE(0x1814, 0x3390), PCI_DEVICE_DATA(&rt2800pci_ops) },
|
||||
#endif
|
||||
#ifdef CONFIG_RT2800PCI_RT35XX
|
||||
{ PCI_DEVICE(0x1432, 0x7711), PCI_DEVICE_DATA(&rt2800pci_ops) },
|
||||
{ PCI_DEVICE(0x1432, 0x7722), PCI_DEVICE_DATA(&rt2800pci_ops) },
|
||||
{ PCI_DEVICE(0x1814, 0x3060), PCI_DEVICE_DATA(&rt2800pci_ops) },
|
||||
{ PCI_DEVICE(0x1814, 0x3062), PCI_DEVICE_DATA(&rt2800pci_ops) },
|
||||
{ PCI_DEVICE(0x1814, 0x3562), PCI_DEVICE_DATA(&rt2800pci_ops) },
|
||||
|
|
|
|||
|
|
@ -486,6 +486,12 @@ static void rt2800usb_fill_rxdone(struct queue_entry *entry,
|
|||
*/
|
||||
rxdesc->flags |= RX_FLAG_IV_STRIPPED;
|
||||
|
||||
/*
|
||||
* The hardware has already checked the Michael Mic and has
|
||||
* stripped it from the frame. Signal this to mac80211.
|
||||
*/
|
||||
rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
|
||||
|
||||
if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
|
||||
rxdesc->flags |= RX_FLAG_DECRYPTED;
|
||||
else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
|
||||
|
|
|
|||
Loading…
Reference in a new issue