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Tundra: Before read ois data,make sure data_ready register is 0x0001

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details:
Fix the camera records video, and the video is incoherent.

Change-Id: I54449c94b63f550ba2d08e29caebaf747d144578
Signed-off-by: huqian4 <huqian4@motorola.com>
Reviewed-on: https://gerrit.mot.com/2291490
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver
Tested-by: Jira Key
Reviewed-by: <zhaoxy41@motorola.com>
Reviewed-by: Wang Liu <liuwang2@lenovo.com>
Reviewed-by: <yinhy6@motorola.com>
Reviewed-by: Long Cheng <chengl1@motorola.com>
Reviewed-by: Zhichao Chen <chenzc2@motorola.com>
Submit-Approved: Jira Key
This commit is contained in:
huqian4 2022-06-07 17:02:15 +08:00 • committed by zhaoji1
commit 3369bfb2b2
2 changed files with 27 additions and 0 deletions
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24
drivers/cam_sensor_module/cam_ois/cam_ois_dev.c
View file

@ -404,6 +404,8 @@ static irqreturn_t cam_ois_vsync_irq_thread(int irq, void *data)
uint8_t *read_buff;
uint32_t k, read_len;
uint32_t mode_val = 0xFFFF, enable_val = 0xFFFF;
uint32_t data_ready = 0xFFFF;
int i = 0;
if (!o_ctrl) {
CAM_ERR(CAM_OIS, "Invalid Args");
@ -468,6 +470,28 @@ static irqreturn_t cam_ois_vsync_irq_thread(int irq, void *data)
memset(o_ctrl->ois_data, 0, o_ctrl->ois_data_size);
read_buff = o_ctrl->ois_data;
for (i = 0; i < READ_COUNT; i++) {
rc = camera_io_dev_read(
&o_ctrl->io_master_info,
DATA_READY_ADDR,
&data_ready,
CAMERA_SENSOR_I2C_TYPE_WORD,
CAMERA_SENSOR_I2C_TYPE_WORD);
if (rc < 0) {
CAM_ERR(CAM_OIS, "failed to read OIS 0x70da reg rc: %d", rc);
goto release_mutex;
}
if (data_ready == DATA_READY) {
CAM_DBG(CAM_OIS, "data_ready == 0x0001 i = %d", i);
break;
} else if (data_ready != DATA_READY && i < READ_COUNT - 1) {
CAM_ERR(CAM_OIS, "data_ready != 0x0001 i = %d", i);
udelay(1000);
} else {
CAM_ERR(CAM_OIS, "data_ready check fail i = %d", i);
goto release_mutex;
}
}
do {
if (packet_cnt > 0 && packet_cnt < MAX_PACKET)
read_buff += PACKET_BYTE;

3
drivers/cam_sensor_module/cam_ois/cam_ois_dev.h
View file

@ -28,6 +28,9 @@
#define MODE_ADDR 0x7014
#define ENABLE_ADDR 0x7015
#define PACKET_ADDR 0x70B0
#define DATA_READY_ADDR 0x70DA
#define DATA_READY 0x0001
#define READ_COUNT 3
#define PACKET_BYTE 62
#define MAX_PACKET 5
#define MAX_SAMPLE 30