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locking/barriers: Introduce smp_acquire__after_ctrl_dep()

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Introduce smp_acquire__after_ctrl_dep(), this construct is not
uncommon, but the lack of this barrier is.

Use it to better express smp_rmb() uses in WRITE_ONCE(), the IPC
semaphore code and the qspinlock code.

Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
Cc: Andrew Morton <[email protected]>
Cc: Linus Torvalds <[email protected]>
Cc: Paul E. McKenney <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: [email protected]
Signed-off-by: Ingo Molnar <[email protected]>
This commit is contained in:
Peter Zijlstra 2016-05-24 13:17:12 +02:00 • committed by Ingo Molnar
commit 33ac279677
3 changed files with 15 additions and 18 deletions
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14
ipc/sem.c
View file

@ -259,16 +259,6 @@ static void sem_rcu_free(struct rcu_head *head)
ipc_rcu_free(head);
}
/*
* spin_unlock_wait() and !spin_is_locked() are not memory barriers, they
* are only control barriers.
* The code must pair with spin_unlock(&sem->lock) or
* spin_unlock(&sem_perm.lock), thus just the control barrier is insufficient.
*
* smp_rmb() is sufficient, as writes cannot pass the control barrier.
*/
#define ipc_smp_acquire__after_spin_is_unlocked() smp_rmb()
/*
* Wait until all currently ongoing simple ops have completed.
* Caller must own sem_perm.lock.
@ -292,7 +282,7 @@ static void sem_wait_array(struct sem_array *sma)
sem = sma->sem_base + i;
spin_unlock_wait(&sem->lock);
}
ipc_smp_acquire__after_spin_is_unlocked();
smp_acquire__after_ctrl_dep();
}
/*
@ -350,7 +340,7 @@ static inline int sem_lock(struct sem_array *sma, struct sembuf *sops,
* complex_count++;
* spin_unlock(sem_perm.lock);
*/
ipc_smp_acquire__after_spin_is_unlocked();
smp_acquire__after_ctrl_dep();
/*
* Now repeat the test of complex_count: