From ee17ea5be706b522ca48047d69955d03c0273990 Mon Sep 17 00:00:00 2001 From: Veera Vegivada Date: Fri, 6 Nov 2020 09:23:45 +0530 Subject: [PATCH 1/9] arm64: dts: qcom: sm8150: Add cpufreq HW device node Add cpufreq HW device node to scale 4-Silver/3-Gold/1-Gold+ cores on SM8150 SoCs. Change-Id: I37fe076fbcc66b04183939ef555381f02825f387 Signed-off-by: Sibi Sankar Link: https://lore.kernel.org/r/20191219120633.20723-1-sibis@codeaurora.org Signed-off-by: Bjorn Andersson Git-commit: fea8930bd55e6d88e43ce44cd058aee3b85de274 Git-repo: https://kernel.googlesource.com/pub/scm/linux/kernel/git/next/linux-next [vvegivad@codeaurora.org: minor modifications needed to handle as per cpufreq-hw driver] Signed-off-by: Veera Vegivada --- qcom/sm8150.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/qcom/sm8150.dtsi b/qcom/sm8150.dtsi index dc15e677873c..28a139213f08 100644 --- a/qcom/sm8150.dtsi +++ b/qcom/sm8150.dtsi @@ -42,6 +42,7 @@ cpu-idle-states = <&SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; next-level-cache = <&L2_0>; + qcom,freq-domain = <&cpufreq_hw 0 4>; L2_0: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; @@ -76,6 +77,7 @@ cpu-idle-states = <&SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; next-level-cache = <&L2_1>; + qcom,freq-domain = <&cpufreq_hw 0 4>; L2_1: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; @@ -105,6 +107,7 @@ cpu-idle-states = <&SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; next-level-cache = <&L2_2>; + qcom,freq-domain = <&cpufreq_hw 0 4>; L2_2: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; @@ -134,6 +137,7 @@ cpu-idle-states = <&SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; next-level-cache = <&L2_3>; + qcom,freq-domain = <&cpufreq_hw 0 4>; L2_3: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; @@ -163,6 +167,7 @@ cpu-idle-states = <&GOLD_RAIL_OFF>; capacity-dmips-mhz = <1740>; next-level-cache = <&L2_4>; + qcom,freq-domain = <&cpufreq_hw 1 4>; L2_4: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; @@ -201,6 +206,7 @@ cpu-idle-states = <&GOLD_RAIL_OFF>; capacity-dmips-mhz = <1740>; next-level-cache = <&L2_5>; + qcom,freq-domain = <&cpufreq_hw 1 4>; L2_5: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; @@ -239,6 +245,7 @@ cpu-idle-states = <&GOLD_RAIL_OFF>; capacity-dmips-mhz = <1740>; next-level-cache = <&L2_6>; + qcom,freq-domain = <&cpufreq_hw 1 4>; L2_6: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; @@ -277,6 +284,7 @@ cpu-idle-states = <&GOLD_RAIL_OFF>; capacity-dmips-mhz = <1740>; next-level-cache = <&L2_7>; + qcom,freq-domain = <&cpufreq_hw 2 4>; L2_7: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; @@ -849,6 +857,20 @@ #clock-cells = <1>; }; + cpufreq_hw: cpufreq@18323000 { + compatible = "qcom,cpufreq-hw"; + reg = <0x18323000 0x1400>, <0x18325800 0x1400>, + <0x18327800 0x1400>; + reg-names = "freq-domain0", "freq-domain1", + "freq-domain2"; + + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; + clock-names = "xo", "alternate"; + + + #freq-domain-cells = <2>; + }; + osm_l3: interconnect@0x18321000 { reg = <0x18321000 0x1400>; compatible = "qcom,sm8150-osm-l3"; From 12dee74ffc5cdd52dca24a2f0d162e54b82e1699 Mon Sep 17 00:00:00 2001 From: Vivek Kumar Date: Thu, 19 Nov 2020 14:02:56 +0530 Subject: [PATCH 2/9] ARM: dts: msm: Add the SMMU devices for SM8150 Add the set of devices that describe the APPS and graphics SMMU register spaces and various properties for SM8150. Change-Id: I149b53bbb2c36410df69a954dc246ccbc9350534 --- qcom/msm-arm-smmu-sm8150-v2.dtsi | 318 +++++++++++++++++++++++++++++ qcom/msm-arm-smmu-sm8150.dtsi | 332 +++++++++++++++++++++++++++++++ qcom/sm8150-v2.dtsi | 6 + qcom/sm8150.dtsi | 1 + 4 files changed, 657 insertions(+) create mode 100644 qcom/msm-arm-smmu-sm8150-v2.dtsi create mode 100644 qcom/msm-arm-smmu-sm8150.dtsi diff --git a/qcom/msm-arm-smmu-sm8150-v2.dtsi b/qcom/msm-arm-smmu-sm8150-v2.dtsi new file mode 100644 index 000000000000..b694e0b014e8 --- /dev/null +++ b/qcom/msm-arm-smmu-sm8150-v2.dtsi @@ -0,0 +1,318 @@ +#include + +&soc { + kgsl_smmu: kgsl-smmu@0x02ca0000 { + compatible = "qcom,qsmmu-v500"; + reg = <0x02ca0000 0x10000>, + <0x2cc2000 0x20>; + reg-names = "base", "tcu-base"; + #iommu-cells = <2>; + qcom,dynamic; + qcom,skip-init; + qcom,use-3-lvl-tables; + qcom,disable-atos; + #global-interrupts = <1>; + qcom,regulator-names = "vdd"; + vdd-supply = <&gpu_cx_gdsc>; + + clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>, + <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>, + <&gpucc GPU_CC_AHB_CLK>; + clock-names = "gcc_gpu_memnoc_gfx_clk", + "gcc_gpu_snoc_dvm_gfx_clk", + "gpu_cc_ahb_clk"; + #size-cells = <1>; + #address-cells = <1>; + ranges; + interrupts = , + , + , + , + , + , + , + , + ; + + gfx_0_tbu: gfx_0_tbu@0x2cc5000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x2cc5000 0x1000>, + <0x2cc2200 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x0 0x400>; + }; + + gfx_1_tbu: gfx_1_tbu@0x2cc9000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x2cc9000 0x1000>, + <0x2cc2208 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x400 0x400>; + }; + }; + + apps_smmu: apps-smmu@0x15000000 { + compatible = "qcom,qsmmu-v500"; + reg = <0x15000000 0x100000>, + <0x15182000 0x20>; + reg-names = "base", "tcu-base"; + #iommu-cells = <2>; + qcom,skip-init; + qcom,use-3-lvl-tables; + qcom,disable-atos; + #global-interrupts = <1>; + #size-cells = <1>; + #address-cells = <1>; + ranges; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + + interconnects = <&system_noc MASTER_GEM_NOC_SNOC + &config_noc SLAVE_IMEM_CFG>; + qcom,active-only; + + anoc_1_tbu: anoc_1_tbu@0x15185000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x15185000 0x1000>, + <0x15182200 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x0 0x400>; + qcom,regulator-names = "vdd"; + vdd-supply = <&hlos1_vote_aggre_noc_mmu_tbu1_gdsc>; + qcom,active-only; + interconnects = <&system_noc MASTER_GEM_NOC_SNOC + &config_noc SLAVE_IMEM_CFG>; + }; + + anoc_2_tbu: anoc_2_tbu@0x15189000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x15189000 0x1000>, + <0x15182208 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x400 0x400>; + qcom,regulator-names = "vdd"; + vdd-supply = <&hlos1_vote_aggre_noc_mmu_tbu2_gdsc>; + qcom,active-only; + interconnects = <&system_noc MASTER_GEM_NOC_SNOC + &config_noc SLAVE_IMEM_CFG>; + }; + + mnoc_hf_0_tbu: mnoc_hf_0_tbu@0x1518d000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x1518d000 0x1000>, + <0x15182210 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x800 0x400>; + qcom,regulator-names = "vdd"; + vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc>; + qcom,active-only; + interconnects = <&mmss_noc MASTER_MDP0 + &mmss_noc SLAVE_MNOC_HF_MEM_NOC>; + }; + + mnoc_hf_1_tbu: mnoc_hf_1_tbu@0x15191000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x15191000 0x1000>, + <0x15182218 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0xc00 0x400>; + qcom,regulator-names = "vdd"; + vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc>; + qcom,active-only; + interconnects = <&mmss_noc MASTER_MDP0 + &mmss_noc SLAVE_MNOC_HF_MEM_NOC>; + }; + + compute_dsp_1_tbu: compute_dsp_1_tbu@0x15195000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x15195000 0x1000>, + <0x15182220 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x1000 0x400>; + /* No GDSC */ + qcom,active-only; + interconnects = <&compute_noc MASTER_NPU + &compute_noc SLAVE_CDSP_MEM_NOC>; + }; + + compute_dsp_0_tbu: compute_dsp_0_tbu@0x15199000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x15199000 0x1000>, + <0x15182228 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x1400 0x400>; + /* No GDSC */ + qcom,active-only; + interconnects = <&compute_noc MASTER_NPU + &compute_noc SLAVE_CDSP_MEM_NOC>; + }; + + adsp_tbu: adsp_tbu@0x1519d000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x1519d000 0x1000>, + <0x15182230 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x1800 0x400>; + qcom,regulator-names = "vdd"; + vdd-supply = <&hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc>; + qcom,active-only; + interconnects = <&system_noc MASTER_GEM_NOC_SNOC + &config_noc SLAVE_IMEM_CFG>; + }; + + anoc_1_pcie_tbu: anoc_1_pcie_tbu@0x151a1000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x151a1000 0x1000>, + <0x15182238 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x1c00 0x400>; + qcom,opt-out-tbu-halting; + qcom,regulator-names = "vdd"; + vdd-supply = <&hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc>; + clock-names = "gcc_aggre_noc_pcie_tbu_clk"; + clocks = <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; + qcom,active-only; + interconnects = <&system_noc MASTER_GEM_NOC_SNOC + &config_noc SLAVE_IMEM_CFG>; + }; + + mnoc_sf_0_tbu: mnoc_sf_0_tbu@0x151a5000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x151a5000 0x1000>, + <0x15182240 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x2000 0x400>; + qcom,regulator-names = "vdd"; + vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_sf_gdsc>; + qcom,active-only; + interconnects = <&mmss_noc MASTER_CAMNOC_SF + &mmss_noc SLAVE_MNOC_SF_MEM_NOC>; + }; + }; + + kgsl_iommu_test_device { + compatible = "iommu-debug-test"; + iommus = <&kgsl_smmu 0x7 0>; + qcom,iommu-dma = "disabled"; + }; + + kgsl_iommu_coherent_test_device { + compatible = "iommu-debug-test"; + iommus = <&kgsl_smmu 0x9 0>; + qcom,iommu-dma = "disabled"; + dma-coherent; + }; + + apps_iommu_test_device { + compatible = "iommu-debug-test"; + iommus = <&apps_smmu 0x21 0>; + qcom,iommu-dma = "disabled"; + }; + + apps_iommu_coherent_test_device { + compatible = "iommu-debug-test"; + iommus = <&apps_smmu 0x23 0>; + qcom,iommu-dma = "disabled"; + dma-coherent; + }; +}; + +&kgsl_smmu { + qcom,actlr = + /* All CBs of GFX: +15 deep PF */ + <0x0 0x407 0x303>; +}; + +&apps_smmu { + qcom,actlr = + /* HF0 and HF1 TBUs: +3 deep PF */ + <0x800 0x7ff 0x103>, + + /* SF TBU: +3 deep PF */ + <0x2000 0x3ff 0x103>, + + /* NPU SIDs: +15 deep PF */ + <0x1480 0x3 0x303>, + <0x1484 0x1 0x303>, + <0x1080 0x3 0x303>, + <0x1084 0x1 0x303>; +}; diff --git a/qcom/msm-arm-smmu-sm8150.dtsi b/qcom/msm-arm-smmu-sm8150.dtsi new file mode 100644 index 000000000000..f279e5a55d46 --- /dev/null +++ b/qcom/msm-arm-smmu-sm8150.dtsi @@ -0,0 +1,332 @@ +#include + +&soc { + kgsl_smmu: kgsl-smmu@0x02CA0000 { + compatible = "qcom,qsmmu-v500"; + reg = <0x02CA0000 0x10000>, + <0x2CC2000 0x20>; + reg-names = "base", "tcu-base"; + #iommu-cells = <2>; + qcom,dynamic; + qcom,skip-init; + qcom,use-3-lvl-tables; + qcom,disable-atos; + qcom,min-iova-align; + #global-interrupts = <1>; + qcom,regulator-names = "vdd"; + vdd-supply = <&gpu_cx_gdsc>; + + clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>, + <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>, + <&gpucc GPU_CC_AHB_CLK>; + clock-names = "gcc_gpu_memnoc_gfx_clk", + "gcc_gpu_snoc_dvm_gfx_clk", + "gpu_cc_ahb_clk"; + #size-cells = <1>; + #address-cells = <1>; + ranges; + interrupts = , + , + , + , + , + , + , + , + ; + + gfx_0_tbu: gfx_0_tbu@0x2CC5000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x2CC5000 0x1000>, + <0x2CC2200 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x0 0x400>; + }; + + gfx_1_tbu: gfx_1_tbu@0x2CC9000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x2CC9000 0x1000>, + <0x2CC2208 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x400 0x400>; + }; + }; + + apps_smmu: apps-smmu@0x15000000 { + compatible = "qcom,qsmmu-v500"; + reg = <0x15000000 0x100000>, + <0x15182000 0x20>; + reg-names = "base", "tcu-base"; + #iommu-cells = <2>; + qcom,skip-init; + qcom,use-3-lvl-tables; + qcom,disable-atos; + qcom,min-iova-align; + #global-interrupts = <1>; + #size-cells = <1>; + #address-cells = <1>; + ranges; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + + interconnects = <&system_noc MASTER_GEM_NOC_SNOC + &config_noc SLAVE_IMEM_CFG>; + qcom,active-only; + + anoc_1_tbu: anoc_1_tbu@0x15185000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x15185000 0x1000>, + <0x15182200 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x0 0x400>; + qcom,regulator-names = "vdd"; + vdd-supply = <&hlos1_vote_aggre_noc_mmu_tbu1_gdsc>; + qcom,active-only; + interconnects = <&system_noc MASTER_GEM_NOC_SNOC + &config_noc SLAVE_IMEM_CFG>; + }; + + anoc_2_tbu: anoc_2_tbu@0x15189000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x15189000 0x1000>, + <0x15182208 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x400 0x400>; + qcom,regulator-names = "vdd"; + vdd-supply = <&hlos1_vote_aggre_noc_mmu_tbu2_gdsc>; + qcom,active-only; + interconnects = <&system_noc MASTER_GEM_NOC_SNOC + &config_noc SLAVE_IMEM_CFG>; + + }; + + mnoc_hf_0_tbu: mnoc_hf_0_tbu@0x1518D000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x1518D000 0x1000>, + <0x15182210 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x800 0x400>; + qcom,regulator-names = "vdd"; + vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc>; + qcom,active-only; + interconnects = <&mmss_noc MASTER_MDP0 + &mmss_noc SLAVE_MNOC_HF_MEM_NOC>; + }; + + mnoc_hf_1_tbu: mnoc_hf_1_tbu@0x15191000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x15191000 0x1000>, + <0x15182218 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0xc00 0x400>; + qcom,regulator-names = "vdd"; + vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc>; + qcom,active-only; + interconnects = <&mmss_noc MASTER_MDP0 + &mmss_noc SLAVE_MNOC_HF_MEM_NOC>; + }; + + mnoc_sf_0_tbu: mnoc_sf_0_tbu@0x15195000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x15195000 0x1000>, + <0x15182220 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x1000 0x400>; + qcom,regulator-names = "vdd"; + vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_sf_gdsc>; + qcom,active-only; + interconnects = <&mmss_noc MASTER_CAMNOC_SF + &mmss_noc SLAVE_MNOC_SF_MEM_NOC>; + }; + + compute_dsp_0_tbu: compute_dsp_0_tbu@0x15199000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x15199000 0x1000>, + <0x15182228 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x1400 0x400>; + /* No GDSC */ + interconnects = <&compute_noc MASTER_NPU + &compute_noc SLAVE_CDSP_MEM_NOC>; + }; + + adsp_tbu: adsp_tbu@0x1519D000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x1519D000 0x1000>, + <0x15182230 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x1800 0x400>; + qcom,regulator-names = "vdd"; + vdd-supply = <&hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc>; + qcom,active-only; + interconnects = <&system_noc MASTER_GEM_NOC_SNOC + &config_noc SLAVE_IMEM_CFG>; + }; + + anoc_1_pcie_tbu: anoc_1_pcie_tbu@0x151A1000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x151A1000 0x1000>, + <0x15182238 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x1c00 0x400>; + qcom,opt-out-tbu-halting; + qcom,regulator-names = "vdd"; + vdd-supply = <&hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc>; + clock-names = "gcc_aggre_noc_pcie_tbu_clk"; + clocks = <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; + qcom,active-only; + interconnects = <&system_noc MASTER_GEM_NOC_SNOC + &config_noc SLAVE_IMEM_CFG>; + }; + + compute_dsp_1_tbu: compute_dsp_1_tbu@0x151A5000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x151A5000 0x1000>, + <0x15182240 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x2000 0x400>; + /* No GDSC */ + qcom,active-only; + interconnects = <&compute_noc MASTER_NPU + &compute_noc SLAVE_CDSP_MEM_NOC>; + }; + }; + + kgsl_iommu_test_device { + compatible = "iommu-debug-test"; + iommus = <&kgsl_smmu 0x7 0>; + qcom,iommu-dma = "disabled"; + }; + + kgsl_iommu_coherent_test_device { + compatible = "iommu-debug-test"; + iommus = <&kgsl_smmu 0x9 0>; + qcom,iommu-dma = "disabled"; + dma-coherent; + }; + + apps_iommu_test_device { + compatible = "iommu-debug-test"; + iommus = <&apps_smmu 0x21 0>; + qcom,iommu-dma = "disabled"; + }; + + apps_iommu_coherent_test_device { + compatible = "iommu-debug-test"; + iommus = <&apps_smmu 0x23 0>; + qcom,iommu-dma = "disabled"; + dma-coherent; + }; +}; + +&kgsl_smmu { + qcom,actlr = + /* All CBs of GFX: +15 deep PF */ + <0x0 0x407 0x303>; +}; + +&apps_smmu { + qcom,actlr = + /* SIDs 0x1460 - 0x1463 of NPU: +3 deep PF */ + <0x1460 0x3 0x103>, + + /* SIDs 0x1464 - 0x1465 of NPU: +3 deep PF */ + <0x1464 0x1 0x103>, + + /* SIDs 0x2060 - 0x2063 of NPU: +3 deep PF */ + <0x2060 0x3 0x103>, + + /* SIDs 0x2064 - 0x2065 of NPU: +3 deep PF */ + <0x2064 0x1 0x103>, + + /* Display SIDs: +3 deep PF */ + <0x0800 0x0420 0x103>, + <0x0801 0x0420 0x103>, + <0x1040 0x0001 0x103>, + + /* Video SIDs: +3 deep PF */ + <0x1300 0x0060 0x103>, + <0x1301 0x0004 0x103>, + <0x1303 0x0020 0x103>, + <0x1304 0x0060 0x103>, + <0x1342 0x0000 0x103>; +}; diff --git a/qcom/sm8150-v2.dtsi b/qcom/sm8150-v2.dtsi index a7ec31ec4fa3..a6f26d35f304 100644 --- a/qcom/sm8150-v2.dtsi +++ b/qcom/sm8150-v2.dtsi @@ -6,6 +6,10 @@ qcom,msm-id = <339 0x20000>; }; +/* Remove smmu nodes specific to SM8150 */ +/delete-node/ &apps_smmu; +/delete-node/ &kgsl_smmu; + &gcc { compatible = "qcom,sm8150-gcc-v2", "syscon"; }; @@ -29,3 +33,5 @@ &scc { compatible = "qcom,sm8150-scc-v2", "syscon"; }; + +#include "msm-arm-smmu-sm8150-v2.dtsi" diff --git a/qcom/sm8150.dtsi b/qcom/sm8150.dtsi index 28a139213f08..961e4e0fb6e2 100644 --- a/qcom/sm8150.dtsi +++ b/qcom/sm8150.dtsi @@ -1505,6 +1505,7 @@ #include "sm8150-slpi-pinctrl.dtsi" #include "sm8150-smp2p.dtsi" #include "sm8150-gdsc.dtsi" +#include "msm-arm-smmu-sm8150.dtsi" &emac_gdsc { status = "ok"; From 2dc593d1e4e806a0fb8ff1e362a323f773cbeef0 Mon Sep 17 00:00:00 2001 From: Veera Vegivada Date: Sat, 18 Jul 2020 15:42:14 +0530 Subject: [PATCH 3/9] dt-bindings: interconnect: add interconnect bindings Add interconnect device bindings. These devices can be used to describe any RPMH and NoC based interconnect devices for scshrike. Change-Id: I0db869169f33aa73a9fe4be376136b98215f17c9 --- bindings/interconnect/qcom,scshrike.txt | 31 +++++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 bindings/interconnect/qcom,scshrike.txt diff --git a/bindings/interconnect/qcom,scshrike.txt b/bindings/interconnect/qcom,scshrike.txt new file mode 100644 index 000000000000..8ab12b107d8c --- /dev/null +++ b/bindings/interconnect/qcom,scshrike.txt @@ -0,0 +1,31 @@ +Qualcomm Technologies, Inc. SCSHRIKE Network-On-Chip interconnect driver binding +------------------------------------------------------------------------------ + +SCSHRIKE interconnect providers support system bandwidth requirements through +RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is +able to communicate with the BCM through the Resource State Coordinator (RSC) +associated with each execution environment. Provider nodes must point to at +least one RPMh device child node pertaining to their RSC and each provider +can map to multiple RPMh resources. + +Required properties : +- compatible : shall contain only one of the following: + "qcom,scshrike-aggre1_noc"; + "qcom,scshrike-aggre2_noc"; + "qcom,scshrike-camnoc_virt"; + "qcom,scshrike-compute_noc"; + "qcom,scshrike-config_noc"; + "qcom,scshrike-dc_noc"; + "qcom,scshrike-gem_noc"; + "qcom,scshrike-ipa_virt"; + "qcom,scshrike-mc_virt"; + "qcom,scshrike-mmss_noc"; + "qcom,scshrike-system_noc"; +- #interconnect-cells : should contain 1 + +Examples: + +aggre1_noc: interconnect@16e0000 { + "qcom,scshrike-aggre1_noc"; + interconnect-cells = <1>; +}; From 00c55b977495c726850ed33439ce930eac875081 Mon Sep 17 00:00:00 2001 From: Veera Vegivada Date: Thu, 23 Jul 2020 08:46:12 +0530 Subject: [PATCH 4/9] dt-bindings: clocks: Add clock controller bindings for SCSHRIKE Add clock controller bindings to support SCSHRIKE. Change-Id: I1a650b8b13ce86c54c4e9685673b4a70d94b0242 --- bindings/clock/qcom,camcc.txt | 2 ++ bindings/clock/qcom,debugcc.txt | 1 + bindings/clock/qcom,dispcc.txt | 2 ++ bindings/clock/qcom,gcc.txt | 2 ++ bindings/clock/qcom,gpucc.txt | 1 + bindings/clock/qcom,scc.txt | 2 ++ 6 files changed, 10 insertions(+) diff --git a/bindings/clock/qcom,camcc.txt b/bindings/clock/qcom,camcc.txt index cc72c85575d0..9eaa2b3d7618 100644 --- a/bindings/clock/qcom,camcc.txt +++ b/bindings/clock/qcom,camcc.txt @@ -12,6 +12,8 @@ Required properties : "qcom,sa8155-camcc" "qcom,sa8155-camcc-v2" "qcom,yupik-camcc" + "qcom,scshrike-camcc" + "qcom,scshrike-camcc-v2" - reg : shall contain base register location and length. - reg-names: names of registers listed in the same order as in diff --git a/bindings/clock/qcom,debugcc.txt b/bindings/clock/qcom,debugcc.txt index b6356b499bcb..4cc0522d7bdd 100644 --- a/bindings/clock/qcom,debugcc.txt +++ b/bindings/clock/qcom,debugcc.txt @@ -11,6 +11,7 @@ Required properties : "qcom,sm8150-debugcc" "qcom,yupik-debugcc" "qcom,sdxnightjar-debugcc" + "qcom,scshrike-debugcc" - qcom,gcc: phandle to the GCC device node. - qcom,videocc: phandle to the Video CC device node. diff --git a/bindings/clock/qcom,dispcc.txt b/bindings/clock/qcom,dispcc.txt index 8341e8b8c742..ebd301af54b7 100644 --- a/bindings/clock/qcom,dispcc.txt +++ b/bindings/clock/qcom,dispcc.txt @@ -12,6 +12,8 @@ Required properties : "qcom,sm8150-dispcc" "qcom,sm8150-dispcc-v2" "qcom,yupik-dispcc" + "qcom,scshrike-dispcc" + "qcom,scshrike-dispcc-v2" - reg : shall contain base register location and length. - #clock-cells : from common clock binding, shall contain 1. diff --git a/bindings/clock/qcom,gcc.txt b/bindings/clock/qcom,gcc.txt index 5c131248c402..e06b80ade895 100644 --- a/bindings/clock/qcom,gcc.txt +++ b/bindings/clock/qcom,gcc.txt @@ -33,6 +33,8 @@ Required properties : "qcom,sdxlemur-gcc" "qcom,yupik-gcc" "qcom,sdxnightjar-gcc" + "qcom,scshrike-gcc" + "qcom,scshrike-gcc-v2" - reg : shall contain base register location and length - vdd_cx-supply: The vdd_cx logic rail supply. diff --git a/bindings/clock/qcom,gpucc.txt b/bindings/clock/qcom,gpucc.txt index efd611826979..46fe5bd2eb84 100644 --- a/bindings/clock/qcom,gpucc.txt +++ b/bindings/clock/qcom,gpucc.txt @@ -9,6 +9,7 @@ Required properties : "qcom,sm8150-gpucc" "qcom,sa8155-gpucc" "qcom,yupik-gpucc" + "qcom,scshrike-gpucc" - reg: shall contain base register offset and size. - reg-names: names of registers listed in the same order as in the reg property. diff --git a/bindings/clock/qcom,scc.txt b/bindings/clock/qcom,scc.txt index fce28e82ddb9..9794d7bf66ac 100644 --- a/bindings/clock/qcom,scc.txt +++ b/bindings/clock/qcom,scc.txt @@ -6,6 +6,8 @@ Required properties: "qcom,sm8150-scc-v2" "qcom,sa8155-scc" "qcom,sa8155-scc-v2" + "qcom,sa8195-scc" + "qcom,sa8195-scc-v2" - reg: shall contain base register location and length. - vdd_scc_cx-supply: the logic rail supply. From 96101caa9db8860ca1dca774caf2c63ca78f9e3a Mon Sep 17 00:00:00 2001 From: Veera Vegivada Date: Tue, 1 Dec 2020 12:01:36 +0530 Subject: [PATCH 5/9] ARM: dts: msm: Add RSC and cmd_db support for SDMSHRIKE Add apps_rsc, disp_rsc and cmd_db support. Change-Id: I301d33796caba4fe8ffd322389abef556dc8479f --- qcom/sdmshrike.dtsi | 33 ++++++++++++++++++++++++++------- 1 file changed, 26 insertions(+), 7 deletions(-) diff --git a/qcom/sdmshrike.dtsi b/qcom/sdmshrike.dtsi index c1079ca2028a..c97dd9653df4 100644 --- a/qcom/sdmshrike.dtsi +++ b/qcom/sdmshrike.dtsi @@ -314,6 +314,12 @@ reg = <0x0 0x85ffd000 0x0 0x3000>; }; + aop_cmd_db: memory@85f20000 { + compatible = "qcom,cmd-db"; + reg = <0x0 0x85f20000 0x0 0x20000>; + no-map; + }; + smem_region: smem@86000000 { no-map; reg = <0x0 0x86000000 0x0 0x200000>; @@ -620,19 +626,32 @@ label = "apps_rsc"; compatible = "qcom,rpmh-rsc"; reg = <0x18200000 0x10000>, - <0x18210000 0x10000>, - <0x18220000 0x10000>; + <0x18210000 0x10000>, + <0x18220000 0x10000>; reg-names = "drv-0", "drv-1", "drv-2"; interrupts = , - , - ; + , + ; qcom,tcs-offset = <0xd00>; qcom,drv-id = <2>; qcom,tcs-config = , - , - , - ; + , + , + ; + }; + disp_rsc: rsc@af20000 { + label = "disp_rsc"; + compatible = "qcom,rpmh-rsc"; + reg = <0xaf20000 0x10000>; + reg-names = "drv-0"; + interrupts = ; + qcom,tcs-offset = <0x1c00>; + qcom,drv-id = <0>; + qcom,tcs-config = , + , + , + ; }; qupv3_id_1: geniqup@ac0000 { From 2cbc4b940ec70c5664f243c9dc9f5101153d50c6 Mon Sep 17 00:00:00 2001 From: Veera Vegivada Date: Tue, 1 Dec 2020 11:41:36 +0530 Subject: [PATCH 6/9] ARM: dts: msm: Add regulators for SDMSHRIKE Add rpmh and refgen regulators for sdmshrike. Change-Id: I9d303e66fc02da8888fc6565ff590dcf2b4b77c7 --- qcom/sa8195-pmic.dtsi | 62 +++ qcom/sa8195-regulator.dtsi | 882 ++++++++++++++++++++++++++++++++++++ qcom/sa8195p-regulator.dtsi | 768 +++++++++++++++++++++++++++++++ qcom/sa8195p.dtsi | 1 + qcom/sdmshrike.dtsi | 1 + 5 files changed, 1714 insertions(+) create mode 100644 qcom/sa8195-pmic.dtsi create mode 100644 qcom/sa8195-regulator.dtsi create mode 100644 qcom/sa8195p-regulator.dtsi diff --git a/qcom/sa8195-pmic.dtsi b/qcom/sa8195-pmic.dtsi new file mode 100644 index 000000000000..db67174ef773 --- /dev/null +++ b/qcom/sa8195-pmic.dtsi @@ -0,0 +1,62 @@ +/* Remove regulator nodes specific to sdmshrike */ +&apps_rsc { + /* Logical rails */ + /delete-node/ rpmh-regulator-cxlvl; + /delete-node/ rpmh-regulator-mxlvl; + /delete-node/ rpmh-regulator-gfxlvl; + /delete-node/ rpmh-regulator-lmxlvl; + /delete-node/ rpmh-regulator-lcxlvl; + /delete-node/ rpmh-regulator-mmcxlvl; + /delete-node/ rpmh-regulator-msslvl; + /delete-node/ rpmh-regulator-ebilvl; + + /* PM8150_1 regulators */ + /delete-node/ rpmh-regulator-smpa5; + /delete-node/ rpmh-regulator-ldoa3; + /delete-node/ rpmh-regulator-ldoa5; + /delete-node/ rpmh-regulator-ldoa6; + /delete-node/ rpmh-regulator-ldoa7; + /delete-node/ rpmh-regulator-ldoa9; + /delete-node/ rpmh-regulator-ldoa11; + /delete-node/ rpmh-regulator-ldoa12; + /delete-node/ rpmh-regulator-ldoa13; + /delete-node/ rpmh-regulator-ldoa15; + /delete-node/ rpmh-regulator-ldoa16; + /delete-node/ rpmh-regulator-ldoa18; + /delete-node/ rpmh-regulator-smpe4; + /delete-node/ rpmh-regulator-smpe5; + /delete-node/ rpmh-regulator-ldoe1; + /delete-node/ rpmh-regulator-ldoe2; + /delete-node/ rpmh-regulator-ldoe5; + /delete-node/ rpmh-regulator-ldoe7; + /delete-node/ rpmh-regulator-ldoe10; + /delete-node/ rpmh-regulator-ldoe13; + /delete-node/ rpmh-regulator-ldoe14; + /delete-node/ rpmh-regulator-ldoe15; + /delete-node/ rpmh-regulator-ldoe16; + /delete-node/ rpmh-regulator-ldoe17; + /delete-node/ rpmh-regulator-smpc6; + /delete-node/ rpmh-regulator-smpc7; + /delete-node/ rpmh-regulator-smpc8; + /delete-node/ rpmh-regulator-ldoc1; + /delete-node/ rpmh-regulator-ldoc2; + /delete-node/ rpmh-regulator-ldoc3; + /delete-node/ rpmh-regulator-ldoc4; + /delete-node/ rpmh-regulator-ldoc6; + /delete-node/ rpmh-regulator-ldoc7; + /delete-node/ rpmh-regulator-ldoc8; + /delete-node/ rpmh-regulator-ldoc9; + /delete-node/ rpmh-regulator-ldoc10; + /delete-node/ rpmh-regulator-ldoc11; + /delete-node/ rpmh-regulator-bobc1; +}; + +&soc { + /* Stub regulators */ + /delete-node/ regulator-pm8150_1-s4; + + /* refgen-regulator@88e7000 */ + /delete-node/ refgen; +}; + +#include "sa8195p-regulator.dtsi" diff --git a/qcom/sa8195-regulator.dtsi b/qcom/sa8195-regulator.dtsi new file mode 100644 index 000000000000..4317499b6ade --- /dev/null +++ b/qcom/sa8195-regulator.dtsi @@ -0,0 +1,882 @@ +#include + +&apps_rsc { + /* PM8150_1 regulators */ + rpmh-regulator-smpa5 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "smpa5"; + S5A: pm8150_1_s5: regulator-pm8150_1-s5 { + regulator-name = "pm8150_1_s5"; + qcom,set = ; + regulator-min-microvolt = <1824000>; + regulator-max-microvolt = <2040000>; + qcom,init-voltage = <1824000>; + }; + }; + + /* PM8150_1 S10 + S9 + S8 + S7 + S6 = VDD_GFX */ + rpmh-regulator-gfxlvl { + compatible = "qcom,rpmh-arc-regulator"; + qcom,resource-name = "gfx.lvl"; + VDD_GFX_LEVEL: + S10A_LEVEL: pm8150_1_s10_level: regulator-pm8150_1-s10-level { + regulator-name = "pm8150_1_s10_level"; + qcom,set = ; + regulator-min-microvolt + = ; + regulator-max-microvolt + = ; + qcom,init-voltage-level + = ; + }; + }; + + rpmh-regulator-ldoa3 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa3"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 10000>; + L3A: pm8150_1_l3: regulator-pm8150_1-l3 { + regulator-name = "pm8150_1_l3"; + qcom,set = ; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + qcom,init-voltage = <800000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoa5 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa5"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L5A: pm8150_1_l5: regulator-pm8150_1-l5 { + regulator-name = "pm8150_1_l5"; + qcom,set = ; + regulator-min-microvolt = <480000>; + regulator-max-microvolt = <932000>; + qcom,init-voltage = <480000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoa6 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa6"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 10000>; + L6A: pm8150_1_l6: regulator-pm8150_1-l6 { + regulator-name = "pm8150_1_l6"; + qcom,set = ; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + qcom,init-voltage = <1200000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoa7 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa7"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L7A: pm8150_1_l7: regulator-pm8150_1-l7 { + regulator-name = "pm8150_1_l7"; + qcom,set = ; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,init-voltage = <1800000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoa9 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa9"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L9A: pm8150_1_l9: regulator-pm8150_1-l9 { + regulator-name = "pm8150_1_l9"; + qcom,set = ; + regulator-min-microvolt = <1304000>; + regulator-max-microvolt = <1304000>; + qcom,init-voltage = <1304000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoa11 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa11"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 10000>; + L11A: pm8150_1_l11: regulator-pm8150_1-l11 { + regulator-name = "pm8150_1_l11"; + qcom,set = ; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + qcom,init-voltage = <1200000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoa12 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa12"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L12A: pm8150_1_l12: regulator-pm8150_1-l12 { + regulator-name = "pm8150_1_l12"; + qcom,set = ; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,init-voltage = <1800000>; + qcom,init-mode = ; + }; + + L12A_AO: pm8150_1_l12_ao: regulator-pm8150_1-l12-ao { + regulator-name = "pm8150_1_l12_ao"; + qcom,set = ; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,init-voltage = <1800000>; + qcom,init-mode = ; + }; + + regulator-pm8150_1-l12-so { + regulator-name = "pm8150_1_l12_so"; + qcom,set = ; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,init-voltage = <1800000>; + qcom,init-mode = ; + qcom,init-enable = <0>; + }; + }; + + rpmh-regulator-ldoa13 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa13"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L13A: pm8150_1_l13: regulator-pm8150_1-l13 { + regulator-name = "pm8150_1_l13"; + qcom,set = ; + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2704000>; + qcom,init-voltage = <2704000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoa15 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa15"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L15A: pm8150_1_l15: regulator-pm8150_1-l15 { + regulator-name = "pm8150_1_l15"; + qcom,set = ; + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <1704000>; + qcom,init-voltage = <1704000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoa16 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa16"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L16A: pm8150_1_l16: regulator-pm8150_1-l16 { + regulator-name = "pm8150_1_l16"; + qcom,set = ; + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2960000>; + qcom,init-voltage = <2704000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoa18 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa18"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L18A: pm8150_1_l18: regulator-pm8150_1-l18 { + regulator-name = "pm8150_1_l18"; + qcom,set = ; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + qcom,init-voltage = <880000>; + qcom,init-mode = ; + }; + }; + + /* PM8150_2 regulators */ + /* PM8150_2 S3 + S2 + S1 = VDD_CX supply */ + rpmh-regulator-cxlvl { + compatible = "qcom,rpmh-arc-regulator"; + qcom,resource-name = "cx.lvl"; + pm8150_2_s3_level-parent-supply = <&VDD_MX_LEVEL>; + pm8150_2_s3_level_ao-parent-supply = <&VDD_MX_LEVEL_AO>; + + VDD_CX_LEVEL: S3E_LEVEL: + pm8150_2_s3_level: regulator-pm8150_2-s3-level { + regulator-name = "pm8150_2_s3_level"; + qcom,set = ; + regulator-min-microvolt + = ; + regulator-max-microvolt + = ; + qcom,init-voltage-level + = ; + qcom,min-dropout-voltage-level = <(-1)>; + }; + + VDD_CX_LEVEL_AO: S3E_LEVEL_AO: + pm8150_2_s3_level_ao: regulator-pm8150_2-s3-level-ao { + regulator-name = "pm8150_2_s3_level_ao"; + qcom,set = ; + regulator-min-microvolt + = ; + regulator-max-microvolt + = ; + qcom,init-voltage-level + = ; + qcom,min-dropout-voltage-level = <(-1)>; + }; + }; + + rpmh-regulator-smpe4 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "smpe4"; + S4E: pm8150_2_s4: regulator-pm8150_2-s4 { + regulator-name = "pm8150_2_s4"; + qcom,set = ; + regulator-min-microvolt = <752000>; + regulator-max-microvolt = <1128000>; + qcom,init-voltage = <752000>; + }; + }; + + rpmh-regulator-smpe5 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "smpe5"; + S5E: pm8150_2_s5: regulator-pm8150_2-s5 { + regulator-name = "pm8150_2_s5"; + qcom,set = ; + regulator-min-microvolt = <1824000>; + regulator-max-microvolt = <2040000>; + qcom,init-voltage = <1824000>; + }; + }; + + rpmh-regulator-ldoe1 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoe1"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L1E: pm8150_2_l1: regulator-pm8150_2-l1 { + regulator-name = "pm8150_2_l1"; + qcom,set = ; + regulator-min-microvolt = <752000>; + regulator-max-microvolt = <752000>; + qcom,init-voltage = <752000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoe2 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoe2"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L2E: pm8150_2_l2: regulator-pm8150_2-l2 { + regulator-name = "pm8150_2_l2"; + qcom,set = ; + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <2928000>; + qcom,init-voltage = <1704000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-lmxlvl { + compatible = "qcom,rpmh-arc-regulator"; + qcom,resource-name = "lmx.lvl"; + L4E_LEVEL: pm8150_2_l4_level: regulator-pm8150_2-l4-level { + regulator-name = "pm8150_2_l4_level"; + qcom,set = ; + regulator-min-microvolt = + ; + regulator-max-microvolt = + ; + qcom,init-voltage-level = + ; + }; + }; + + rpmh-regulator-ldoe5 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoe5"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L5E: pm8150_2_l5: regulator-pm8150_2-l5 { + regulator-name = "pm8150_2_l5"; + qcom,set = ; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + qcom,init-voltage = <880000>; + qcom,init-mode = ; + }; + + L5E_AO: pm8150_2_l5_ao: regulator-pm8150_2-l5-ao { + regulator-name = "pm8150_2_l5_ao"; + qcom,set = ; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + qcom,init-voltage = <880000>; + qcom,init-mode = ; + }; + + regulator-pm8150_2-l5-so { + regulator-name = "pm8150_2_l5_so"; + qcom,set = ; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + qcom,init-voltage = <880000>; + qcom,init-mode = ; + qcom,init-enable = <0>; + }; + + }; + + rpmh-regulator-ldoe7 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoe7"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L7E: pm8150_2_l7: regulator-pm8150_2-l7 { + regulator-name = "pm8150_2_l7"; + qcom,set = ; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,init-voltage = <1800000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-lcxlvl { + compatible = "qcom,rpmh-arc-regulator"; + qcom,resource-name = "lcx.lvl"; + L8E_LEVEL: pm8150_2_l8_level: regulator-pm8150_2-l8-level { + regulator-name = "pm8150_2_l8_level"; + qcom,set = ; + regulator-min-microvolt + = ; + regulator-max-microvolt + = ; + qcom,init-voltage-level + = ; + }; + }; + + rpmh-regulator-ldoe10 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoe10"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 10000>; + L10E: pm8150_2_l10: regulator-pm8150_2-l10 { + regulator-name = "pm8150_2_l10"; + qcom,set = ; + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <2960000>; + qcom,init-voltage = <2504000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoe13 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoe13"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L13E: pm8150_2_l13: regulator-pm8150_2-l13 { + regulator-name = "pm8150_2_l13"; + qcom,set = ; + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <2928000>; + qcom,init-voltage = <1704000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoe14 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoe14"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L14E: pm8150_2_l14: regulator-pm8150_2-l14 { + regulator-name = "pm8150_2_l14"; + qcom,set = ; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,init-voltage = <1800000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoe15 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoe15"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 10000>; + L15E: pm8150_2_l15: regulator-pm8150_2-l15 { + regulator-name = "pm8150_2_l15"; + qcom,set = ; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,init-voltage = <1800000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoe16 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoe16"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 10000>; + L16E: pm8150_2_l16: regulator-pm8150_2-l16 { + regulator-name = "pm8150_2_l16"; + qcom,set = ; + regulator-min-microvolt = <3072000>; + regulator-max-microvolt = <3072000>; + qcom,init-voltage = <3072000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoe17 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoe17"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 10000>; + L17E: pm8150_2_l17: regulator-pm8150_2-l17 { + regulator-name = "pm8150_2_l17"; + qcom,set = ; + regulator-min-microvolt = <2960000>; + regulator-max-microvolt = <2960000>; + qcom,init-voltage = <2960000>; + qcom,init-mode = ; + }; + }; + + /* PM8150C regulators */ + + /* PM8150C S1 = VDD_MMCX supply */ + rpmh-regulator-mmcxlvl { + compatible = "qcom,rpmh-arc-regulator"; + qcom,resource-name = "mmcx.lvl"; + + VDD_MMCX_LEVEL: + S1C_LEVEL: pm8150c_s1_level: regulator-pm8150c-s1-level { + regulator-name = "pm8150c_s1_level"; + qcom,set = ; + regulator-min-microvolt + = ; + regulator-max-microvolt + = ; + qcom,init-voltage-level + = ; + }; + + VDD_MMCX_LEVEL_AO: S1C_LEVEL_AO: + pm8150c_s1_level_ao: regulator-pm8150c-s1-level-ao { + regulator-name = "pm8150c_s1_level_ao"; + qcom,set = ; + regulator-min-microvolt + = ; + regulator-max-microvolt + = ; + qcom,init-voltage-level + = ; + }; + }; + + /* PM8150C S2 = VDD_MODEM supply */ + rpmh-regulator-msslvl { + compatible = "qcom,rpmh-arc-regulator"; + qcom,resource-name = "mss.lvl"; + S2C_LEVEL: pm8150c_s2_level: regulator-pm8150c-s2-level { + regulator-name = "pm8150c_s2_level"; + qcom,set = ; + regulator-min-microvolt + = ; + regulator-max-microvolt + = ; + qcom,init-voltage-level + = ; + }; + }; + + /* PM8150C S3 + S4 = VDD_MX supply */ + rpmh-regulator-mxlvl { + compatible = "qcom,rpmh-arc-regulator"; + qcom,resource-name = "mx.lvl"; + + VDD_MX_LEVEL: S3C_LEVEL: + pm8150c_s3_level: regulator-pm8150c-s3-level { + regulator-name = "pm8150c_s3_level"; + qcom,set = ; + regulator-min-microvolt + = ; + regulator-max-microvolt + = ; + qcom,init-voltage-level + = ; + }; + + VDD_MX_LEVEL_AO: S3C_LEVEL_AO: + pm8150c_s3_level_ao: regulator-pm8150c-s3-level-ao { + regulator-name = "pm8150c_s3_level_ao"; + qcom,set = ; + regulator-min-microvolt + = ; + regulator-max-microvolt + = ; + qcom,init-voltage-level + = ; + }; + }; + + /* PM8150C S5 = VDDA_EBI supply */ + rpmh-regulator-ebilvl { + compatible = "qcom,rpmh-arc-regulator"; + qcom,resource-name = "ebi.lvl"; + S5C_LEVEL: pm8150c_s5_level: regulator-pm8150c-s5-level { + regulator-name = "pm8150c_s5_level"; + qcom,set = ; + regulator-min-microvolt + = ; + regulator-max-microvolt + = ; + qcom,init-voltage-level + = ; + }; + }; + + rpmh-regulator-smpc6 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "smpc6"; + S6C: pm8150c_s6: regulator-pm8150c-s6 { + regulator-name = "pm8150c-s6"; + qcom,set = ; + regulator-min-microvolt = <1260000>; + regulator-max-microvolt = <1396000>; + qcom,init-voltage = <1260000>; + }; + }; + + rpmh-regulator-smpc7 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "smpc7"; + S7C: pm8150c_s7: regulator-pm8150c-s7 { + regulator-name = "pm8150c-s7"; + qcom,set = ; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1128000>; + qcom,init-voltage = <800000>; + }; + }; + + rpmh-regulator-smpc8 { + compatible = "qcom,rpmh-xob-regulator"; + qcom,resource-name = "smpc8"; + S8C: pm8150c_s8: regulator-pm8150c-s8 { + regulator-name = "pm8150c_s8"; + qcom,set = ; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + }; + + rpmh-regulator-ldoc1 { + compatible = "qcom,rpmh-xob-regulator"; + qcom,resource-name = "ldoc1"; + L1C: pm8150c_l1: regulator-pm8150c-l1 { + regulator-name = "pm8150c_l1"; + qcom,set = ; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + }; + + rpmh-regulator-ldoc2 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoc2"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 30000>; + L2C: pm8150c_l2: regulator-pm8150c-l2 { + regulator-name = "pm8150c_l2"; + qcom,set = ; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + qcom,init-voltage = <1200000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoc3 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoc3"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L3C: pm8150c_l3: regulator-pm8150c-l3 { + regulator-name = "pm8150c_l3"; + qcom,set = ; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + qcom,init-voltage = <1200000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoc4 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoc4"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L4C: pm8150c_l4: regulator-pm8150c-l4 { + regulator-name = "pm8150c_l4"; + qcom,set = ; + regulator-min-microvolt = <2856000>; + regulator-max-microvolt = <3008000>; + qcom,init-voltage = <2856000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoc6 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoc6"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L6C: pm8150c_l6: regulator-pm8150c-l6 { + regulator-name = "pm8150c_l6"; + qcom,set = ; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2960000>; + qcom,init-voltage = <1800000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoc7 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoc7"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L7C: pm8150c_l7: regulator-pm8150c-l7 { + regulator-name = "pm8150c_l7"; + qcom,set = ; + regulator-min-microvolt = <2856000>; + regulator-max-microvolt = <3104000>; + qcom,init-voltage = <2856000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoc8 { + compatible = "qcom,rpmh-xob-regulator"; + qcom,resource-name = "ldoc8"; + L8C: pm8150c_l8: regulator-pm8150c-l8 { + regulator-name = "pm8150c_l8"; + qcom,set = ; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + }; + + rpmh-regulator-ldoc9 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoc9"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 10000>; + L9C: pm8150c_l9: regulator-pm8150c-l9 { + regulator-name = "pm8150c_l9"; + qcom,set = ; + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <2960000>; + qcom,init-voltage = <2504000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoc10 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoc10"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L10C: pm8150c_l10: regulator-pm8150c-l10 { + regulator-name = "pm8150c_l10"; + qcom,set = ; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3312000>; + qcom,init-voltage = <3000000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoc11 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoc11"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L11C: pm8150c_l11: regulator-pm8150c-l11 { + regulator-name = "pm8150c_l11"; + qcom,set = ; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3312000>; + qcom,init-voltage = <3000000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-bobc1 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "bobc1"; + qcom,regulator-type = "pmic5-bob"; + qcom,send-defaults; + + BOB: pm8150c_bob: regulator-pm8150c-bob { + regulator-name = "pm8150c_bob"; + qcom,set = ; + regulator-min-microvolt = <3296000>; + regulator-max-microvolt = <3960000>; + qcom,init-voltage = <3296000>; + qcom,init-mode = ; + }; + + BOB_AO: pm8150c_bob_ao: regulator-pm8150c-bob-ao { + regulator-name = "pm8150c_bob_ao"; + qcom,set = ; + regulator-min-microvolt = <3296000>; + regulator-max-microvolt = <3960000>; + qcom,init-voltage = <3296000>; + qcom,init-mode = ; + }; + }; +}; + +&soc { + /* Stub regulators */ + + /* + * RPMh does not provide support for PM8150_1 S4. Therefore, + * use a stub regulator for S4. + */ + S4A: pm8150_1_s4: regulator-pm8150_1-s4 { + compatible = "qcom,stub-regulator"; + regulator-name = "pm8150_1_s4"; + qcom,hpm-min-load = <100000>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + refgen: refgen-regulator@88e7000 { + compatible = "qcom,refgen-regulator"; + reg = <0x88e7000 0x60>; + regulator-name = "refgen"; + regulator-enable-ramp-delay = <5>; + }; +}; diff --git a/qcom/sa8195p-regulator.dtsi b/qcom/sa8195p-regulator.dtsi new file mode 100644 index 000000000000..5d480a9a464b --- /dev/null +++ b/qcom/sa8195p-regulator.dtsi @@ -0,0 +1,768 @@ +#include + +&apps_rsc { + + /* PM8195_1 S1 = VDD_EBI supply */ + rpmh-regulator-ebilvl { + compatible = "qcom,rpmh-arc-regulator"; + qcom,resource-name = "ebi.lvl"; + S1A_LEVEL: pm8195_1_s1_level: regulator-pm8195-1-s1-level { + regulator-name = "pm8195_1_s1_level"; + qcom,set = ; + regulator-min-microvolt + = ; + regulator-max-microvolt + = ; + qcom,init-voltage-level + = ; + }; + }; + + /* PM8195_1 S2 = VDDCX_MM supply */ + rpmh-regulator-mmcxlvl { + compatible = "qcom,rpmh-arc-regulator"; + qcom,resource-name = "mmcx.lvl"; + + VDD_MMCX_LEVEL: + S7A_LEVEL: pm8195_1_s7_level: regulator-pm8195-1-s7-level { + regulator-name = "pm8195_1_s7_level"; + qcom,set = ; + regulator-min-microvolt + = ; + regulator-max-microvolt + = ; + qcom,init-voltage-level + = ; + }; + + VDD_MMCX_LEVEL_AO: S7A_LEVEL_AO: + pm8195_1_s7_level_ao: regulator-pm8195-1-s7-level-ao { + regulator-name = "pm8195_1_s7_level_ao"; + qcom,set = ; + regulator-min-microvolt + = ; + regulator-max-microvolt + = ; + qcom,init-voltage-level + = ; + }; + }; + + rpmh-regulator-smpa3 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "smpa3"; + S3A: pm8195_1_s3: regulator-pm8195-1-s3 { + regulator-name = "pm8195_1_s3"; + qcom,set = ; + regulator-min-microvolt = <788000>; + regulator-max-microvolt = <969000>; + qcom,init-voltage = <788000>; + }; + }; + + rpmh-regulator-smpa5 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "smpa5"; + S5A: pm8195_1_s5: regulator-pm8195-1-s5 { + regulator-name = "pm8195_1_s5"; + qcom,set = ; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1000000>; + qcom,init-voltage = <900000>; + }; + }; + + rpmh-regulator-smpa6 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "smpa6"; + S6A: pm8195_1_s6: regulator-pm8195-1-s6 { + regulator-name = "pm8195_1_s6"; + qcom,set = ; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1300000>; + qcom,init-voltage = <800000>; + }; + }; + + rpmh-regulator-smpa2 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "smpa2"; + S2A: pm8195_1_s2: regulator-pm8195-1-s2 { + regulator-name = "pm8195_1_s2"; + qcom,set = ; + regulator-min-microvolt = <1179000>; + regulator-max-microvolt = <1379000>; + qcom,init-voltage = <1179000>; + }; + }; + + /* pm8195_1 S8 = VDD_MODEM supply */ + rpmh-regulator-msslvl { + compatible = "qcom,rpmh-arc-regulator"; + qcom,resource-name = "mss.lvl"; + VDD_MSS_LEVEL: + S8A_LEVEL: pm8195_1_s8_level: regulator-pm8195-1-s8-level { + regulator-name = "pm8195_1_s8_level"; + qcom,set = ; + regulator-min-microvolt + = ; + regulator-max-microvolt + = ; + qcom,init-voltage-level + = ; + }; + }; + + /* PM8195_1 S10 = VDD_MX supply */ + rpmh-regulator-mxlvl { + compatible = "qcom,rpmh-arc-regulator"; + qcom,resource-name = "mx.lvl"; + + VDD_MX_LEVEL: + S10A_LEVEL: pm8195_1_s10_level: regulator-pm8195-1-s10-level { + regulator-name = "pm8195_1_s10_level"; + qcom,set = ; + regulator-min-microvolt + = ; + regulator-max-microvolt + = ; + qcom,init-voltage-level + = ; + }; + + VDD_MX_LEVEL_AO: S10A_LEVEL_AO: + pm8195_1_s10_level_ao: regulator-pm8195-1-s10-level-ao { + regulator-name = "pm8195_1_s10_level_ao"; + qcom,set = ; + regulator-min-microvolt + = ; + regulator-max-microvolt + = ; + qcom,init-voltage-level + = ; + }; + }; + + rpmh-regulator-ldoa2 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa2"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L2A: pm8195_1_l2: regulator-pm8195-1-l2 { + regulator-name = "pm8195_1_l2"; + qcom,set = ; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + qcom,init-voltage = <1800000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoa3 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa3"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L3A: pm8195_1_l3: regulator-pm8195-1-l3 { + regulator-name = "pm8195_1_l3"; + qcom,set = ; + regulator-min-microvolt = <760000>; + regulator-max-microvolt = <816000>; + qcom,init-voltage = <760000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoa5 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa5"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L5A: pm8195_1_l5: regulator-pm8195-1-l5 { + regulator-name = "pm8195_1_l5"; + qcom,set = ; + regulator-min-microvolt = <720000>; + regulator-max-microvolt = <880000>; + qcom,init-voltage = <720000>; + qcom,init-mode = ; + }; + }; + + /* DSI display 1.2 */ + rpmh-regulator-ldoa9 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa9"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L9A: pm8195_1_l9: regulator-pm8195-1-l9 { + regulator-name = "pm8195_1_l9"; + qcom,set = ; + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1250000>; + qcom,init-voltage = <1150000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoa10 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa10"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L10A: pm8195_1_l10: regulator-pm8195-1-l10 { + regulator-name = "pm8195_1_l10"; + qcom,set = ; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + qcom,init-voltage = <2700000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoa11 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa11"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L11A: pm8195_1_l11: regulator-pm8195-1-l11 { + regulator-name = "pm8195_1_l11"; + qcom,set = ; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + qcom,init-voltage = <1100000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoa12 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa12"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L12A: pm8195_1_l12: regulator-pm8195-1-l12 { + regulator-name = "pm8195_1_l12"; + qcom,set = ; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1890000>; + qcom,init-voltage = <1800000>; + qcom,init-mode = ; + regulator-always-on; + }; + }; + + rpmh-regulator-ldoa13 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa13"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L13A: pm8195_1_l13: regulator-pm8195-1-l13 { + regulator-name = "pm8195_1_l13"; + qcom,set = ; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2900000>; + qcom,init-voltage = <2500000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoa15 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa15"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L15A: pm8195_1_l15: regulator-pm8195-1-l15 { + regulator-name = "pm8195_1_l15"; + qcom,set = ; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1751000>; + qcom,init-voltage = <1700000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoa16 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa16"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L16A: pm8195_1_l16: regulator-pm8195-1-l16 { + regulator-name = "pm8195_1_l16"; + qcom,set = ; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2900000>; + qcom,init-voltage = <2500000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoa17 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa17"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L17A: pm8195_1_l17: regulator-pm8195-1-l17 { + regulator-name = "pm8195_1_l17"; + qcom,set = ; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3544000>; + qcom,init-voltage = <1700000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoa18 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoa18"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L18A: pm8195_1_l18: regulator-pm8195-1-l18 { + regulator-name = "pm8195_1_l18"; + qcom,set = ; + regulator-min-microvolt = <831000>; + regulator-max-microvolt = <918000>; + qcom,init-voltage = <831000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-smpc1 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "smpc1"; + S1C: pm8195_2_s1: regulator-pm8195-2-s1 { + regulator-name = "pm8195_2_s1"; + qcom,set = ; + regulator-min-microvolt = <570000>; + regulator-max-microvolt = <648000>; + qcom,init-voltage = <570000>; + }; + }; + + rpmh-regulator-smpc2 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "smpc2"; + S2C: pm8195_2_s2: regulator-pm8195-2-s2 { + regulator-name = "pm8195_2_s2"; + qcom,set = ; + regulator-min-microvolt = <1060000>; + regulator-max-microvolt = <1170000>; + qcom,init-voltage = <1060000>; + }; + }; + + rpmh-regulator-smpc4 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "smpc4"; + S4C: pm8195_2_s4: regulator-pm8195-2-s4 { + regulator-name = "pm8195_2_s4"; + qcom,set = ; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1900000>; + qcom,init-voltage = <1620000>; + }; + }; + + rpmh-regulator-smpc5 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "smpc5"; + S5C: pm8195_2_s5: regulator-pm8195-2-s5 { + regulator-name = "pm8195_2_s5"; + qcom,set = ; + regulator-min-microvolt = <1713000>; + regulator-max-microvolt = <2040000>; + qcom,init-voltage = <1713000>; + }; + }; + + /* PM8195_2 S10 + S9 + S8 + S7 + S6 = VDD_GFX supply */ + rpmh-regulator-gfxlvl { + compatible = "qcom,rpmh-arc-regulator"; + qcom,resource-name = "gfx.lvl"; + VDD_GFX: + S10C_LEVEL: pm8195_2_s10_level: regulator-pm8195-2-s10-level { + regulator-name = "pm8195_2_s10_level"; + qcom,set = ; + regulator-min-microvolt + = ; + regulator-max-microvolt + = ; + qcom,init-voltage-level + = ; + }; + }; + + rpmh-regulator-ldoc2 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoc2"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L2C: pm8195_2_l2: regulator-pm8195-2-l2 { + regulator-name = "pm8195_2_l2"; + qcom,set = ; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3330000>; + qcom,init-voltage = <1800000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoc5 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoc5"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L5C: pm8195_2_l5: regulator-pm8195-2-l5 { + regulator-name = "pm8195_2_l5"; + qcom,set = ; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + qcom,init-voltage = <1200000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoc7 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoc7"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L7C: pm8195_2_l7: regulator-pm8195-2-l7 { + regulator-name = "pm8195_2_l7"; + qcom,set = ; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2040000>; + qcom,init-voltage = <1800000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoc10 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoc10"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L10C: pm8195_2_l10: regulator-pm8195-2-l10 { + regulator-name = "pm8195_2_l10"; + qcom,set = ; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <3300000>; + qcom,init-voltage = <1620000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoc11 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoc11"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L11C: pm8195_2_l11: regulator-pm8195-2-l11 { + regulator-name = "pm8195_2_l11"; + qcom,set = ; + regulator-min-microvolt = <1144000>; + regulator-max-microvolt = <1236000>; + qcom,init-voltage = <1144000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoc12 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoc12"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L12C: pm8195_2_l12: regulator-pm8195-2-l12 { + regulator-name = "pm8195_2_l12"; + qcom,set = ; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1900000>; + qcom,init-voltage = <1700000>; + qcom,init-mode = ; + }; + }; + + /* PM8195_3 S3 + S2 + S1 = VDD_CX supply */ + rpmh-regulator-cxlvl { + compatible = "qcom,rpmh-arc-regulator"; + qcom,resource-name = "cx.lvl"; + pm8195_3_s3_level-parent-supply = <&VDD_MX_LEVEL>; + pm8195_3_s3_level_ao-parent-supply = <&VDD_MX_LEVEL_AO>; + + VDD_CX_LEVEL: + S3E_LEVEL: pm8195_3_s3_level: regulator-pm8195-3-s3-level { + regulator-name = "pm8195_3_s3_level"; + qcom,set = ; + regulator-min-microvolt + = ; + regulator-max-microvolt + = ; + qcom,init-voltage-level + = ; + qcom,min-dropout-voltage-level = <(-1)>; + }; + + VDD_CX_LEVEL_AO: S3E_LEVEL_AO: + pm8195_3_s3_level_ao: regulator-pm8195-3-s3-level-ao { + regulator-name = "pm8195_3_s3_level_ao"; + qcom,set = ; + regulator-min-microvolt + = ; + regulator-max-microvolt + = ; + qcom,init-voltage-level + = ; + qcom,min-dropout-voltage-level = <(-1)>; + }; + }; + + rpmh-regulator-smpe4 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "smpe4"; + S4E: pm8195_3_s4: regulator-pm8195-3-s4 { + regulator-name = "pm8195_3_s4"; + qcom,set = ; + regulator-min-microvolt = <402000>; + regulator-max-microvolt = <1980000>; + qcom,init-voltage = <402000>; + }; + }; + + rpmh-regulator-smpe5 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "smpe5"; + S5E: pm8195_3_s5: regulator-pm8195-3-s5 { + regulator-name = "pm8195_3_s5"; + qcom,set = ; + regulator-min-microvolt = <1811000>; + regulator-max-microvolt = <2040000>; + qcom,init-voltage = <1811000>; + }; + }; + + /* PM8195_3 L4 - LPI_MX supply */ + rpmh-regulator-lmxlvl { + compatible = "qcom,rpmh-arc-regulator"; + qcom,resource-name = "lmx.lvl"; + L4E_LEVEL: pm8195_3_l4_level: regulator-pm8195-3-l4 { + regulator-name = "pm8195_3_l4_level"; + qcom,set = ; + regulator-min-microvolt = + ; + regulator-max-microvolt = + ; + qcom,init-voltage-level = + ; + }; + }; + + rpmh-regulator-ldoe5 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoe5"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L5E: pm8195_3_l5: regulator-pm8195-3-l5 { + regulator-name = "pm8195_3_l5"; + qcom,set = ; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <920000>; + qcom,init-voltage = <800000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoe7 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoe7"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L7E: pm8195_3_l7: regulator-pm8195-3-l7 { + regulator-name = "pm8195_3_l7"; + qcom,set = ; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1950000>; + qcom,init-voltage = <1700000>; + qcom,init-mode = ; + }; + }; + + /* pm8195_3 L8 - LPI_CX supply */ + rpmh-regulator-lcxlvl { + compatible = "qcom,rpmh-arc-regulator"; + qcom,resource-name = "lcx.lvl"; + VDD_SCC_CX_LEVEL: + L8E_LEVEL: pm8195_3_l8_level: regulator-pm8195-3-l8 { + regulator-name = "pm8195_3_l8_level"; + qcom,set = ; + regulator-min-microvolt = + ; + regulator-max-microvolt = + ; + qcom,init-voltage-level = + ; + }; + }; + + rpmh-regulator-ldoe9 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoe9"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L9E: pm8195_3_l9: regulator-pm8195-3-l9 { + regulator-name = "pm8195_3_l9"; + qcom,set = ; + regulator-min-microvolt = <830000>; + regulator-max-microvolt = <920000>; + qcom,init-voltage = <830000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoe10 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoe10"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L10E: pm8195_3_l10: regulator-pm8195-3-l10 { + regulator-name = "pm8195_3_l10"; + qcom,set = ; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3544000>; + qcom,init-voltage = <2500000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoe12 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoe12"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L12E: pm8195_3_l12: regulator-pm8195-3-l12 { + regulator-name = "pm8195_3_l12"; + qcom,set = ; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,init-voltage = <1800000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoe16 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoe16"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L16E: pm8195_3_l16: regulator-pm8195-3-l16 { + regulator-name = "pm8195_3_l16"; + qcom,set = ; + regulator-min-microvolt = <2921000>; + regulator-max-microvolt = <3300000>; + qcom,init-voltage = <2921000>; + qcom,init-mode = ; + }; + }; + + rpmh-regulator-ldoe17 { + compatible = "qcom,rpmh-vrm-regulator"; + qcom,resource-name = "ldoe17"; + qcom,regulator-type = "pmic5-ldo"; + qcom,supported-modes = + ; + qcom,mode-threshold-currents = <0 1>; + L17E: pm8195_3_l17: regulator-pm8195-3-l17 { + regulator-name = "pm8195_3_l17"; + qcom,set = ; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <3300000>; + qcom,init-voltage = <2900000>; + qcom,init-mode = ; + }; + }; +}; + +&soc { + /* Stub regulator */ + /* + * RPMh does not provide support for PM8195 S4 because it is always-on + * at 1.8 V in auto mode. Therefore, use a stub regulator for S4. + */ + S4A: pm8195_s4: regulator-pm8195-s4 { + compatible = "qcom,stub-regulator"; + regulator-name = "pm8195_s4"; + qcom,hpm-min-load = <100000>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; +}; diff --git a/qcom/sa8195p.dtsi b/qcom/sa8195p.dtsi index 0032ea7d78af..7fe00b0a2047 100644 --- a/qcom/sa8195p.dtsi +++ b/qcom/sa8195p.dtsi @@ -1,4 +1,5 @@ #include "sdmshrike-v2.dtsi" +#include "sa8195-pmic.dtsi" / { model = "Qualcomm Technologies, Inc. SA8195P"; diff --git a/qcom/sdmshrike.dtsi b/qcom/sdmshrike.dtsi index c97dd9653df4..57ced1af6751 100644 --- a/qcom/sdmshrike.dtsi +++ b/qcom/sdmshrike.dtsi @@ -673,3 +673,4 @@ }; #include "sdmshrike-pinctrl.dtsi" +#include "sa8195-regulator.dtsi" From 83c782245516e00c6963bab97db33b055cd6367f Mon Sep 17 00:00:00 2001 From: Veera Vegivada Date: Tue, 1 Dec 2020 12:05:39 +0530 Subject: [PATCH 7/9] ARM: dts: msm: Add Power management nodes for SDMSHRIKE This change adds two items for power management. 1. Add PDC interrupt controller device. The interrupt map remains same as sm8150. Also mention PDC as wakeup parent for TLMM. 2. Include power management for sm8150 for APSS low power modes and various stats drivers. Change-Id: I3473f86bbaa3c289199d3ca88d0c31be5712f145 --- qcom/sdmshrike-pinctrl.dtsi | 11 ++++++++++- qcom/sdmshrike.dtsi | 10 ++++++++++ 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/qcom/sdmshrike-pinctrl.dtsi b/qcom/sdmshrike-pinctrl.dtsi index e4af602e1c7a..c5e4ae02bc2f 100644 --- a/qcom/sdmshrike-pinctrl.dtsi +++ b/qcom/sdmshrike-pinctrl.dtsi @@ -3,11 +3,20 @@ compatible = "qcom,sdmshrike-pinctrl"; reg = <0x03000000 0xddc000>, <0x17c000f0 0x60>; reg-names = "pinctrl", "spi_cfg"; - interrupts =; + interrupts = , + , + , + , + , + , + , + , + ; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + wakeup-parent = <&pdc>; ufs_dev_reset_assert: ufs_dev_reset_assert { config { diff --git a/qcom/sdmshrike.dtsi b/qcom/sdmshrike.dtsi index 57ced1af6751..41fde14e63a1 100644 --- a/qcom/sdmshrike.dtsi +++ b/qcom/sdmshrike.dtsi @@ -500,6 +500,15 @@ interrupt-parent = <&intc>; }; + pdc: interrupt-controller@b220000 { + compatible = "qcom,sm8150-pdc"; + reg = <0xb220000 0x30000>, <0x17c000f0 0x64>; + qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>; + #interrupt-cells = <2>; + interrupt-parent = <&intc>; + interrupt-controller; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <1 1 0xf08>, @@ -674,3 +683,4 @@ #include "sdmshrike-pinctrl.dtsi" #include "sa8195-regulator.dtsi" +#include "sm8150-pm.dtsi" From d9b4a91ec0b565f76efab14924077a5012676e6c Mon Sep 17 00:00:00 2001 From: Veera Vegivada Date: Tue, 1 Dec 2020 12:50:16 +0530 Subject: [PATCH 8/9] ARM: dts: msm: Add system_pm device for SDMSHRIKE system_pm device is required for system level low power modes. Change-Id: Ib65fc22d67218bc6584c6aec044d4b06e22d6acc --- qcom/sdmshrike.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/qcom/sdmshrike.dtsi b/qcom/sdmshrike.dtsi index 41fde14e63a1..a56b27af3d27 100644 --- a/qcom/sdmshrike.dtsi +++ b/qcom/sdmshrike.dtsi @@ -647,6 +647,10 @@ , , ; + + system_pm { + compatible = "qcom,system-pm"; + }; }; disp_rsc: rsc@af20000 { From 84f6405c27d56e753c01c31d9d529e6bd0bdcbf0 Mon Sep 17 00:00:00 2001 From: Veera Vegivada Date: Thu, 17 Dec 2020 14:21:17 +0530 Subject: [PATCH 9/9] ARM: dts: msm: add PMIC devices for SM8150 Add top level SPMI slave devices for PM8150. Also add some of the peripheral devices within the SPMI slave devices. Change-Id: Ia59d63861135913f5968050d88a5f8d5c63882df --- qcom/pm8150.dtsi | 164 +++++++++++++++++++++++++++++++++ qcom/sa8155-adp-common.dtsi | 2 + qcom/sa8155-pmic-overlay.dtsi | 169 ++++++++++++++++++++++++++++++++++ qcom/sm8150.dtsi | 84 +++++++++++++++++ 4 files changed, 419 insertions(+) create mode 100644 qcom/pm8150.dtsi create mode 100644 qcom/sa8155-pmic-overlay.dtsi diff --git a/qcom/pm8150.dtsi b/qcom/pm8150.dtsi new file mode 100644 index 000000000000..21683a4ecffb --- /dev/null +++ b/qcom/pm8150.dtsi @@ -0,0 +1,164 @@ +#include +#include +#include +#include +#include + +&spmi_bus { + #address-cells = <2>; + #size-cells = <0>; + interrupt-controller; + #interrupt-cells = <4>; + + qcom,pm8150@0 { + compatible = "qcom,spmi-pmic"; + reg = <0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm8150_tz: qcom,temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; + io-channels = <&pm8150_vadc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + qcom,power-on@800 { + compatible = "qcom,qpnp-power-on"; + reg = <0x800 0x100>; + interrupts = <0x0 0x8 0x0 IRQ_TYPE_NONE>, + <0x0 0x8 0x1 IRQ_TYPE_NONE>; + interrupt-names = "kpdpwr", "resin"; + qcom,pon-dbc-delay = <15625>; + qcom,kpdpwr-sw-debounce; + qcom,system-reset; + qcom,store-hard-reset-reason; + + qcom,pon_1 { + qcom,pon-type = ; + qcom,pull-up; + linux,code = ; + }; + + qcom,pon_2 { + qcom,pon-type = ; + qcom,pull-up; + linux,code = ; + }; + }; + + pm8150_clkdiv: clock-controller@5b00 { + compatible = "qcom,spmi-clkdiv"; + reg = <0x5b00>; + #clock-cells = <1>; + qcom,num-clkdivs = <2>; + clock-output-names = "pm8150_div_clk1", + "pm8150_div_clk2"; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + }; + + pm8150_rtc: qcom,pm8150_rtc { + compatible = "qcom,pm8941-rtc"; + reg = <0x6000>, <0x6100>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; + }; + + pm8150_gpios: pinctrl@c000 { + compatible = "qcom,pm8150-gpio"; + reg = <0xc000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pm8150_sdam_2: sdam@b100 { + compatible = "qcom,spmi-sdam"; + reg = <0xb100>; + }; + + pm8150_vadc: vadc@3100 { + compatible = "qcom,spmi-adc5"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "eoc-int-en-set"; + #io-channel-cells = <1>; + io-channel-ranges; + + /* Channel node */ + ref_gnd { + reg = ; + label = "ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + vref_1p25 { + reg = ; + label = "vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + die_temp { + reg = ; + label = "die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + pm8150_adc_tm: adc_tm@3500 { + compatible = "qcom,adc-tm5"; + reg = <0x3500>; + interrupts = <0x0 0x35 0x0 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "thr-int-en"; + #address-cells = <1>; + #size-cells = <0>; + #thermal-sensor-cells = <1>; + io-channels = <&pm8150_vadc ADC5_XO_THERM_100K_PU>, + <&pm8150_vadc ADC5_AMUX_THM1_100K_PU>, + <&pm8150_vadc ADC5_AMUX_THM2_100K_PU>; + }; + }; + + qcom,pm8150@1 { + compatible ="qcom,spmi-pmic"; + reg = <1 SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + }; +}; + +&thermal_zones { + pm8150_temp_alarm: pm8150_tz { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&pm8150_tz>; + wake-capable-sensor; + + trips { + pm8150_trip0: trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8150_trip1: trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "passive"; + }; + + trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "passive"; + }; + }; + }; +}; diff --git a/qcom/sa8155-adp-common.dtsi b/qcom/sa8155-adp-common.dtsi index fc99f15ac51c..b7e203419cc2 100644 --- a/qcom/sa8155-adp-common.dtsi +++ b/qcom/sa8155-adp-common.dtsi @@ -1,6 +1,8 @@ #include #include +#include "sa8155-pmic-overlay.dtsi" + &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4"; diff --git a/qcom/sa8155-pmic-overlay.dtsi b/qcom/sa8155-pmic-overlay.dtsi new file mode 100644 index 000000000000..4c4fd12fe728 --- /dev/null +++ b/qcom/sa8155-pmic-overlay.dtsi @@ -0,0 +1,169 @@ + +#include "pm8150.dtsi" + +pm8150_1_tz: &pm8150_tz { +}; + +pm8150_1_clkdiv: &pm8150_clkdiv { + clock-output-names = "pm8150_1_div_clk1", "pm8150_1_div_clk2"; +}; + +pm8150_1_rtc: &pm8150_rtc { +}; + +pm8150_1_gpios: &pm8150_gpios { +}; + +/* PM8150_2: */ +&spmi_bus { + #address-cells = <2>; + #size-cells = <0>; + interrupt-controller; + #interrupt-cells = <4>; + + qcom,pm8150@4 { + compatible = "qcom,spmi-pmic"; + reg = <4 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm8150_2_tz: qcom,temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x4 0x24 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pm8150_2_vadc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + qcom,temperature-threshold-set = <1>; + }; + + qcom,power-on@800 { + compatible = "qcom,qpnp-power-on"; + reg = <0x800>; + }; + + pm8150_2_clkdiv: clock-controller@5b00 { + compatible = "qcom,spmi-clkdiv"; + reg = <0x5b00>; + #clock-cells = <1>; + qcom,num-clkdivs = <2>; + clock-output-names = "pm8150_2_div_clk1", + "pm8150_2_div_clk2"; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + }; + + pm8150_2_gpios: pinctrl@c000 { + compatible = "qcom,pm8150-gpio"; + reg = <0xc000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pm8150_2_vadc: vadc@3100 { + compatible = "qcom,spmi-adc5"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x4 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "eoc-int-en-set"; + #io-channel-cells = <1>; + io-channel-ranges; + + /* Channel node */ + ref_gnd { + reg = ; + label = "ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + vref_1p25 { + reg = ; + label = "vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + die_temp { + reg = ; + label = "die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + }; + + qcom,pm8150@5 { + compatible ="qcom,spmi-pmic"; + reg = <5 SPMI_USID>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; + +/* PMIC GPIO pin control configurations: */ +&pm8150_1_gpios { + key_home { + key_home_default: key_home_default { + pins = "gpio1"; + function = "normal"; + input-enable; + bias-pull-up; + power-source = <0>; + }; + }; + + storage_sd_detect { + storage_cd_default: storage_cd_default { + pins = "gpio4"; + function = "normal"; + input-enable; + bias-pull-up; + power-source = <0>; + }; + }; + + key_vol_up { + key_vol_up_default: key_vol_up_default { + pins = "gpio6"; + function = "normal"; + input-enable; + bias-pull-up; + power-source = <1>; + }; + }; +}; + +#include + +&thermal_zones { + pm8150_2_temp_alarm: pm8150_2_tz { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&pm8150_2_tz>; + wake-capable-sensor; + + trips { + pm8150_2_trip0: trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8150_2_trip1: trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "passive"; + }; + + trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "passive"; + }; + }; + + }; + +}; diff --git a/qcom/sm8150.dtsi b/qcom/sm8150.dtsi index 961e4e0fb6e2..b8e9208d6ec6 100644 --- a/qcom/sm8150.dtsi +++ b/qcom/sm8150.dtsi @@ -13,6 +13,8 @@ #include #include #include +#include +#include / { model = "Qualcomm Technologies, Inc. SM8150"; @@ -871,6 +873,88 @@ #freq-domain-cells = <2>; }; + spmi_bus: qcom,spmi@c440000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0xc440000 0x1100>, + <0xc600000 0x2000000>, + <0xe600000 0x100000>, + <0xe700000 0xa0000>, + <0xc40a000 0x26000>; + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; + interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "periph_irq"; + interrupt-controller; + #interrupt-cells = <4>; + #address-cells = <2>; + #size-cells = <0>; + cell-index = <0>; + qcom,channel = <0>; + qcom,ee = <0>; + }; + + spmi_debug_bus: qcom,spmi-debug@6b22000 { + compatible = "qcom,spmi-pmic-arb-debug"; + reg = <0x6b22000 0x60>, <0x7820a8 0x4>; + reg-names = "core", "fuse"; + clocks = <&aopcc QDSS_CLK>; + clock-names = "core_clk"; + qcom,fuse-disable-bit = <24>; + #address-cells = <2>; + #size-cells = <0>; + status = "disabled"; + + qcom,pm8150-debug@0 { + compatible = "qcom,spmi-pmic"; + reg = <0 SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + qcom,can-sleep; + }; + + qcom,pm8150-debug@1 { + compatible = "qcom,spmi-pmic"; + reg = <1 SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + qcom,can-sleep; + }; + + qcom,pm8150b-debug@2 { + compatible = "qcom,spmi-pmic"; + reg = <2 SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + qcom,can-sleep; + }; + + qcom,pm8150b-debug@3 { + compatible = "qcom,spmi-pmic"; + reg = <3 SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + qcom,can-sleep; + }; + + qcom,pm8150l-debug@4 { + compatible = "qcom,spmi-pmic"; + reg = <4 SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + qcom,can-sleep; + }; + + qcom,pm8150l-debug@5 { + compatible = "qcom,spmi-pmic"; + reg = <5 SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + qcom,can-sleep; + }; + }; + + thermal_zones: thermal-zones { + }; + osm_l3: interconnect@0x18321000 { reg = <0x18321000 0x1400>; compatible = "qcom,sm8150-osm-l3";