From e61901e2640b29e1ca821b088f54678955172630 Mon Sep 17 00:00:00 2001
From: Veera Vegivada <vvegivad@qti.qualcomm.com>
Date: Tue, 3 Nov 2020 11:51:08 +0530
Subject: [PATCH] ARM: dts: msm: Add interconnect osm l3  devices for SM8150

Add a device that allows voting for l3.

Change-Id: I6bf4bb5e1092dcbc03a591cb8f2a8da1f6e5cecc
---
 qcom/sm8150.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/qcom/sm8150.dtsi b/qcom/sm8150.dtsi
index 593cdf061a10..dc15e677873c 100644
--- a/qcom/sm8150.dtsi
+++ b/qcom/sm8150.dtsi
@@ -8,6 +8,7 @@
 #include <dt-bindings/clock/qcom,videocc-sm8150.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interconnect/qcom,icc.h>
+#include <dt-bindings/interconnect/qcom,osm-l3.h>
 #include <dt-bindings/interconnect/qcom,sm8150.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
@@ -848,6 +849,14 @@
 		#clock-cells = <1>;
 	};
 
+	osm_l3: interconnect@0x18321000 {
+		reg = <0x18321000 0x1400>;
+		compatible = "qcom,sm8150-osm-l3";
+		clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
+		clock-names = "xo", "alternate";
+		#interconnect-cells = <1>;
+	};
+
 	config_noc: interconnect@1500000 {
 		reg = <0x1500000 0x7400>;
 		compatible = "qcom,sm8150-config_noc";