drm/radeon/kms: fix 2D tile height alignment in the r600 CS checker

macro tile heights are aligned to num channels, not num banks.

Noticed by Dave Airlie.

Signed-off-by: Alex Deucher <[email protected]>
Cc: [email protected]
Signed-off-by: Dave Airlie <[email protected]>
This commit is contained in:
Alex Deucher 2010-10-18 23:45:39 -04:00 • committed by Dave Airlie
commit 354da65323

View file

@ -229,7 +229,7 @@ static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i)
__func__, __LINE__, pitch);
return -EINVAL;
}
if (!IS_ALIGNED((height / 8), track->nbanks)) {
if (!IS_ALIGNED((height / 8), track->npipes)) {
dev_warn(p->dev, "%s:%d cb height (%d) invalid\n",
__func__, __LINE__, height);
return -EINVAL;
@ -378,7 +378,7 @@ static int r600_cs_track_check(struct radeon_cs_parser *p)
__func__, __LINE__, pitch);
return -EINVAL;
}
if ((height / 8) & (track->nbanks - 1)) {
if (!IS_ALIGNED((height / 8), track->npipes)) {
dev_warn(p->dev, "%s:%d db height (%d) invalid\n",
__func__, __LINE__, height);
return -EINVAL;