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msm: camera: common: Fix compilation issues for 32-bit arch

Browse source 
Fix improper use of divide and modulo operator on 64 bit numbers.
Fix variable type to work with both 32/64 bit arch.

CRs-Fixed: 2543730
Change-Id: Ifa52d46dece3434d41308d284982a0cd8e17cd1b
Signed-off-by: Trishansh Bhardwaj <tbhardwa@codeaurora.org>
This commit is contained in:
Trishansh Bhardwaj 2019-09-24 13:01:20 +05:30 • committed by Gerrit - the friendly Code Review server
commit 35bead08c3
15 changed files with 105 additions and 76 deletions
Download patch file Download diff file Expand all files Collapse all files

2
drivers/cam_cdm/cam_cdm_hw_core.c
View file

@ -413,7 +413,7 @@ int cam_hw_cdm_submit_bl(struct cam_hw_info *cdm_hw,
}
for (i = 0; i < req->data->cmd_arrary_count ; i++) {
uint64_t hw_vaddr_ptr = 0;
dma_addr_t hw_vaddr_ptr = 0;
size_t len = 0;
if ((!cdm_cmd->cmd[i].len) &&

12
drivers/cam_cpas/cam_cpas_hw.c
View file

@ -424,7 +424,7 @@ static int cam_cpas_util_set_camnoc_axi_clk_rate(
if (soc_private->control_camnoc_axi_clk) {
struct cam_hw_soc_info *soc_info = &cpas_hw->soc_info;
uint64_t required_camnoc_bw = 0;
uint64_t required_camnoc_bw = 0, intermediate_result = 0;
int32_t clk_rate = 0;
for (i = 0; i < CAM_CPAS_MAX_TREE_NODES; i++) {
@ -440,15 +440,19 @@ static int cam_cpas_util_set_camnoc_axi_clk_rate(
}
}
required_camnoc_bw += (required_camnoc_bw *
soc_private->camnoc_axi_clk_bw_margin) / 100;
intermediate_result = required_camnoc_bw *
soc_private->camnoc_axi_clk_bw_margin;
do_div(intermediate_result, 100);
required_camnoc_bw += intermediate_result;
if ((required_camnoc_bw > 0) &&
(required_camnoc_bw <
soc_private->camnoc_axi_min_ib_bw))
required_camnoc_bw = soc_private->camnoc_axi_min_ib_bw;
clk_rate = required_camnoc_bw / soc_private->camnoc_bus_width;
intermediate_result = required_camnoc_bw;
do_div(intermediate_result, soc_private->camnoc_bus_width);
clk_rate = intermediate_result;
CAM_DBG(CAM_CPAS, "Setting camnoc axi clk rate : %llu %d",
required_camnoc_bw, clk_rate);

107
drivers/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.c
View file

@ -422,6 +422,7 @@ static int32_t cam_icp_ctx_timer(void *priv, void *data)
(struct cam_icp_hw_ctx_data *)task_data->data;
struct cam_icp_hw_mgr *hw_mgr = &icp_hw_mgr;
uint32_t id;
uint64_t temp;
struct cam_hw_intf *ipe0_dev_intf = NULL;
struct cam_hw_intf *ipe1_dev_intf = NULL;
struct cam_hw_intf *bps_dev_intf = NULL;
@ -521,16 +522,17 @@ static int32_t cam_icp_ctx_timer(void *priv, void *data)
ctx_data->clk_info.base_clk = 0;
clk_update.axi_vote.num_paths = 1;
clk_update.axi_vote.axi_path[0].camnoc_bw =
clk_info->uncompressed_bw / device_share_ratio;
clk_update.axi_vote.axi_path[0].mnoc_ab_bw =
clk_info->compressed_bw / device_share_ratio;
clk_update.axi_vote.axi_path[0].mnoc_ib_bw =
clk_info->compressed_bw / device_share_ratio;
clk_update.axi_vote.axi_path[0].ddr_ab_bw =
clk_info->compressed_bw / device_share_ratio;
clk_update.axi_vote.axi_path[0].ddr_ib_bw =
clk_info->compressed_bw / device_share_ratio;
temp = clk_info->uncompressed_bw;
do_div(temp, device_share_ratio);
clk_update.axi_vote.axi_path[0].camnoc_bw = temp;
temp = clk_info->compressed_bw;
do_div(temp, device_share_ratio);
clk_update.axi_vote.axi_path[0].mnoc_ab_bw = temp;
clk_update.axi_vote.axi_path[0].mnoc_ib_bw = temp;
clk_update.axi_vote.axi_path[0].ddr_ab_bw = temp;
clk_update.axi_vote.axi_path[0].ddr_ib_bw = temp;
} else {
int path_index;
@ -594,16 +596,21 @@ static int32_t cam_icp_ctx_timer(void *priv, void *data)
if (device_share_ratio > 1) {
for (i = 0; i < clk_update.axi_vote.num_paths; i++) {
clk_update.axi_vote.axi_path[i].camnoc_bw /=
device_share_ratio;
clk_update.axi_vote.axi_path[i].mnoc_ab_bw /=
device_share_ratio;
clk_update.axi_vote.axi_path[i].mnoc_ib_bw /=
device_share_ratio;
clk_update.axi_vote.axi_path[i].ddr_ab_bw /=
device_share_ratio;
clk_update.axi_vote.axi_path[i].ddr_ib_bw /=
device_share_ratio;
do_div(
clk_update.axi_vote.axi_path[i].camnoc_bw,
device_share_ratio);
do_div(
clk_update.axi_vote.axi_path[i].mnoc_ab_bw,
device_share_ratio);
do_div(
clk_update.axi_vote.axi_path[i].mnoc_ib_bw,
device_share_ratio);
do_div(
clk_update.axi_vote.axi_path[i].ddr_ab_bw,
device_share_ratio);
do_div(
clk_update.axi_vote.axi_path[i].ddr_ib_bw,
device_share_ratio);
}
}
}
@ -780,7 +787,8 @@ static uint32_t cam_icp_mgr_calc_base_clk(uint32_t frame_cycles,
uint64_t base_clk;
uint64_t mul = 1000000000;
base_clk = (frame_cycles * mul) / budget;
base_clk = frame_cycles * mul;
do_div(base_clk, budget);
CAM_DBG(CAM_ICP, "budget = %lld fc = %d ib = %lld base_clk = %lld",
budget, frame_cycles,
@ -1408,6 +1416,7 @@ static int cam_icp_update_cpas_vote(struct cam_icp_hw_mgr *hw_mgr,
struct cam_icp_hw_ctx_data *ctx_data)
{
uint32_t id;
uint64_t temp;
int i = 0;
struct cam_hw_intf *ipe0_dev_intf = NULL;
struct cam_hw_intf *ipe1_dev_intf = NULL;
@ -1463,16 +1472,17 @@ static int cam_icp_update_cpas_vote(struct cam_icp_hw_mgr *hw_mgr,
clk_update.axi_vote.axi_path[0].transac_type =
CAM_IPE_DEFAULT_AXI_TRANSAC;
}
clk_update.axi_vote.axi_path[0].camnoc_bw =
clk_info->uncompressed_bw / device_share_ratio;
clk_update.axi_vote.axi_path[0].mnoc_ab_bw =
clk_info->compressed_bw / device_share_ratio;
clk_update.axi_vote.axi_path[0].mnoc_ib_bw =
clk_info->compressed_bw / device_share_ratio;
clk_update.axi_vote.axi_path[0].ddr_ab_bw =
clk_info->compressed_bw / device_share_ratio;
clk_update.axi_vote.axi_path[0].ddr_ib_bw =
clk_info->compressed_bw / device_share_ratio;
temp = clk_info->uncompressed_bw;
do_div(temp, device_share_ratio);
clk_update.axi_vote.axi_path[0].camnoc_bw = temp;
temp = clk_info->compressed_bw;
do_div(temp, device_share_ratio);
clk_update.axi_vote.axi_path[0].mnoc_ab_bw = temp;
clk_update.axi_vote.axi_path[0].mnoc_ib_bw = temp;
clk_update.axi_vote.axi_path[0].ddr_ab_bw = temp;
clk_update.axi_vote.axi_path[0].ddr_ib_bw = temp;
} else {
clk_update.axi_vote.num_paths = clk_info->num_paths;
memcpy(&clk_update.axi_vote.axi_path[0],
@ -1482,16 +1492,21 @@ static int cam_icp_update_cpas_vote(struct cam_icp_hw_mgr *hw_mgr,
if (device_share_ratio > 1) {
for (i = 0; i < clk_update.axi_vote.num_paths; i++) {
clk_update.axi_vote.axi_path[i].camnoc_bw /=
device_share_ratio;
clk_update.axi_vote.axi_path[i].mnoc_ab_bw /=
device_share_ratio;
clk_update.axi_vote.axi_path[i].mnoc_ib_bw /=
device_share_ratio;
clk_update.axi_vote.axi_path[i].ddr_ab_bw /=
device_share_ratio;
clk_update.axi_vote.axi_path[i].ddr_ib_bw /=
device_share_ratio;
do_div(
clk_update.axi_vote.axi_path[i].camnoc_bw,
device_share_ratio);
do_div(
clk_update.axi_vote.axi_path[i].mnoc_ab_bw,
device_share_ratio);
do_div(
clk_update.axi_vote.axi_path[i].mnoc_ib_bw,
device_share_ratio);
do_div(
clk_update.axi_vote.axi_path[i].ddr_ab_bw,
device_share_ratio);
do_div(
clk_update.axi_vote.axi_path[i].ddr_ib_bw,
device_share_ratio);
}
}
}
@ -3877,7 +3892,7 @@ static int cam_icp_mgr_process_cmd_desc(struct cam_icp_hw_mgr *hw_mgr,
int rc = 0;
int i;
int num_cmd_buf = 0;
uint64_t addr;
dma_addr_t addr;
size_t len;
struct cam_cmd_buf_desc *cmd_desc = NULL;
uintptr_t cpu_addr = 0;
@ -4020,7 +4035,7 @@ static int cam_icp_process_stream_settings(
{
int rc = 0, i = 0;
size_t packet_size, map_cmd_size, len;
uint64_t iova;
dma_addr_t iova;
unsigned long rem_jiffies;
int timeout = 5000;
struct hfi_cmd_ipe_bps_map *map_cmd;
@ -4298,7 +4313,7 @@ static int cam_icp_process_generic_cmd_buffer(
struct cam_packet *packet,
struct cam_icp_hw_ctx_data *ctx_data,
int32_t index,
uint64_t *io_buf_addr)
dma_addr_t *io_buf_addr)
{
int i, rc = 0;
struct cam_cmd_buf_desc *cmd_desc = NULL;
@ -4394,7 +4409,7 @@ static void cam_icp_mgr_print_io_bufs(struct cam_packet *packet,
int32_t iommu_hdl, int32_t sec_mmu_hdl, uint32_t pf_buf_info,
bool *mem_found)
{
uint64_t iova_addr;
dma_addr_t iova_addr;
size_t src_buf_size;
int i;
int j;
@ -5056,7 +5071,7 @@ static int cam_icp_mgr_acquire_hw(void *hw_mgr_priv, void *acquire_hw_args)
{
int rc = 0, bitmap_size = 0;
uint32_t ctx_id = 0, dev_type;
uint64_t io_buf_addr;
dma_addr_t io_buf_addr;
size_t io_buf_size;
struct cam_icp_hw_mgr *hw_mgr = hw_mgr_priv;
struct cam_icp_hw_ctx_data *ctx_data = NULL;

4
drivers/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.h
View file

@ -135,7 +135,7 @@ struct clk_work_data {
*/
struct icp_frame_info {
uint64_t request_id;
uint64_t io_config;
dma_addr_t io_config;
struct hfi_cmd_ipebps_async hfi_cfg_io_cmd;
};
@ -262,7 +262,7 @@ struct cam_icp_hw_ctx_data {
struct icp_cmd_generic_blob {
struct cam_icp_hw_ctx_data *ctx;
uint32_t frame_info_idx;
uint64_t *io_buf_addr;
dma_addr_t *io_buf_addr;
};
/**

14
drivers/cam_isp/cam_isp_context.c
View file

@ -24,9 +24,9 @@ static const char isp_dev_name[] = "cam-isp";
static struct cam_isp_ctx_debug isp_ctx_debug;
#define INC_STATE_MONITOR_HEAD(head) \
(atomic64_add_return(1, head) % \
CAM_ISP_CTX_STATE_MONITOR_MAX_ENTRIES)
#define INC_STATE_MONITOR_HEAD(head, ret) \
div_u64_rem(atomic64_add_return(1, head),\
CAM_ISP_CTX_STATE_MONITOR_MAX_ENTRIES, (ret))
static int cam_isp_context_dump_active_request(void *data, unsigned long iova,
uint32_t buf_info);
@ -39,7 +39,9 @@ static void __cam_isp_ctx_update_state_monitor_array(
enum cam_isp_state_change_trigger trigger_type,
uint64_t req_id)
{
int iterator = INC_STATE_MONITOR_HEAD(&ctx_isp->state_monitor_head);
int iterator;
INC_STATE_MONITOR_HEAD(&ctx_isp->state_monitor_head, &iterator);
ctx_isp->cam_isp_ctx_state_monitor[iterator].curr_state =
ctx_isp->substate_activated;
@ -117,8 +119,8 @@ static void __cam_isp_ctx_dump_state_monitor_array(
oldest_entry = 0;
} else {
num_entries = CAM_ISP_CTX_STATE_MONITOR_MAX_ENTRIES;
oldest_entry = (state_head + 1) %
CAM_ISP_CTX_STATE_MONITOR_MAX_ENTRIES;
div_u64_rem(state_head + 1,
CAM_ISP_CTX_STATE_MONITOR_MAX_ENTRIES, &oldest_entry);
}
CAM_ERR(CAM_ISP,

9
drivers/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c
View file

@ -689,16 +689,19 @@ static void cam_ife_hw_mgr_dump_acq_data(
struct cam_ife_hw_mgr_res *hw_mgr_res_temp = NULL;
struct cam_isp_resource_node *hw_res = NULL;
struct timespec64 *ts = NULL;
uint64_t ms, tmp;
uint64_t ms, tmp, hrs, min, sec;
int i = 0, j = 0;
ts = &hwr_mgr_ctx->ts;
tmp = ts->tv_sec;
ms = (ts->tv_nsec) / 1000000;
sec = do_div(tmp, 60);
min = do_div(tmp, 60);
hrs = do_div(tmp, 24);
CAM_INFO(CAM_ISP,
"**** %llu:%llu:%llu.%llu ctx_idx: %u rdi_only: %s is_dual: %s acquired ****",
(tmp / 3600) % 24, (tmp / 60) % 60, tmp % 60, ms,
hrs, min, sec, ms,
hwr_mgr_ctx->ctx_index,
(hwr_mgr_ctx->is_rdi_only_context ? "true" : "false"),
(hwr_mgr_ctx->is_dual ? "true" : "false"));
@ -5688,7 +5691,7 @@ static void cam_ife_mgr_print_io_bufs(struct cam_packet *packet,
int32_t iommu_hdl, int32_t sec_mmu_hdl, uint32_t pf_buf_info,
bool *mem_found)
{
uint64_t iova_addr;
dma_addr_t iova_addr;
size_t src_buf_size;
int i;
int j;

4
drivers/cam_isp/isp_hw_mgr/hw_utils/cam_isp_packet_parser.c
View file

@ -465,8 +465,8 @@ int cam_isp_add_io_buffers(
uint32_t size_isp_out,
bool fill_fence)
{
int rc = 0;
uint64_t io_addr[CAM_PACKET_MAX_PLANES];
int rc = 0;
dma_addr_t io_addr[CAM_PACKET_MAX_PLANES];
struct cam_buf_io_cfg *io_cfg;
struct cam_isp_resource_node *res;
struct cam_ife_hw_mgr_res *hw_mgr_res;

2
drivers/cam_isp/isp_hw_mgr/isp_hw/include/cam_isp_hw.h
View file

@ -201,7 +201,7 @@ struct cam_isp_hw_cmd_buf_update {
*
*/
struct cam_isp_hw_get_wm_update {
uint64_t *image_buf;
dma_addr_t *image_buf;
uint32_t num_buf;
struct cam_buf_io_cfg *io_cfg;
};

2
drivers/cam_jpeg/jpeg_hw/cam_jpeg_hw_mgr.c
View file

@ -611,7 +611,7 @@ static void cam_jpeg_mgr_print_io_bufs(struct cam_packet *packet,
int32_t iommu_hdl, int32_t sec_mmu_hdl, uint32_t pf_buf_info,
bool *mem_found)
{
uint64_t iova_addr;
dma_addr_t iova_addr;
size_t src_buf_size;
int i;
int j;

2
drivers/cam_lrme/cam_lrme_context.h
View file

@ -11,7 +11,7 @@
#include "cam_hw_mgr_intf.h"
#include "cam_req_mgr_interface.h"
#define CAM_LRME_CTX_INDEX_SHIFT 32
#define CAM_LRME_CTX_INDEX_SHIFT 16
/**
* struct cam_lrme_context

2
drivers/cam_lrme/lrme_hw_mgr/cam_lrme_hw_mgr.c
View file

@ -144,7 +144,7 @@ static int cam_lrme_mgr_util_prepare_io_buffer(int32_t iommu_hdl,
int rc = -EINVAL;
uint32_t num_in_buf, num_out_buf, i, j, plane;
struct cam_buf_io_cfg *io_cfg;
uint64_t io_addr[CAM_PACKET_MAX_PLANES];
dma_addr_t io_addr[CAM_PACKET_MAX_PLANES];
size_t size;
num_in_buf = 0;

2
drivers/cam_req_mgr/cam_mem_mgr.c
View file

@ -175,7 +175,7 @@ static void cam_mem_put_slot(int32_t idx)
}
int cam_mem_get_io_buf(int32_t buf_handle, int32_t mmu_handle,
uint64_t *iova_ptr, size_t *len_ptr)
dma_addr_t *iova_ptr, size_t *len_ptr)
{
int rc = 0, idx;

2
drivers/cam_req_mgr/cam_mem_mgr_api.h
View file

@ -75,7 +75,7 @@ int cam_mem_mgr_release_mem(struct cam_mem_mgr_memory_desc *inp);
* @return Status of operation. Negative in case of error. Zero otherwise.
*/
int cam_mem_get_io_buf(int32_t buf_handle, int32_t mmu_handle,
uint64_t *iova_ptr, size_t *len_ptr);
dma_addr_t *iova_ptr, size_t *len_ptr);
/**
* @brief: This indicates begin of CPU access.

15
drivers/cam_sensor_module/cam_csiphy/cam_csiphy_core.c
View file

@ -375,6 +375,7 @@ int32_t cam_csiphy_config_dev(struct csiphy_device *csiphy_dev)
uint16_t lane_mask = 0, i = 0, cfg_size = 0, temp = 0;
uint8_t lane_cnt, lane_pos = 0;
uint16_t settle_cnt = 0;
uint64_t intermediate_var;
void __iomem *csiphybase;
struct csiphy_reg_t *csiphy_common_reg = NULL;
struct csiphy_reg_t (*reg_array)[MAX_SETTINGS_PER_LANE];
@ -484,12 +485,16 @@ int32_t cam_csiphy_config_dev(struct csiphy_device *csiphy_dev)
continue;
}
settle_cnt = (csiphy_dev->csiphy_info.settle_time / 200000000);
intermediate_var = csiphy_dev->csiphy_info.settle_time;
do_div(intermediate_var, 200000000);
settle_cnt = intermediate_var;
if (csiphy_dev->csiphy_info.combo_mode == 1 &&
(lane_pos >= 3))
settle_cnt =
(csiphy_dev->csiphy_info.settle_time_combo_sensor /
200000000);
(lane_pos >= 3)) {
intermediate_var =
csiphy_dev->csiphy_info.settle_time_combo_sensor;
do_div(intermediate_var, 200000000);
settle_cnt = intermediate_var;
}
for (i = 0; i < cfg_size; i++) {
switch (reg_array[lane_pos][i].csiphy_param_type) {
case CSIPHY_LANE_ENABLE:

2
drivers/cam_smmu/cam_smmu_api.c
View file

@ -3546,7 +3546,7 @@ static int cam_populate_smmu_context_banks(struct device *dev,
}
dma_set_max_seg_size(dev, DMA_BIT_MASK(32));
dma_set_seg_boundary(dev, DMA_BIT_MASK(64));
dma_set_seg_boundary(dev, (unsigned long)DMA_BIT_MASK(64));
end:
/* increment count to next bank */