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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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arm-soc: sparse IRQ conversion
The I.MX platform is getting converted to use sparse IRQs. We are doing this for all platforms over time, because this is one of the requirements for building a multiplatform kernel, and generally a good idea. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIVAwUAUA2dgGCrR//JCVInAQJOJRAA4xWh3CUqpuJ13yk2tOBcGU9+orer93fP U3DAG6jJ75blQzfA9wBoWPjqFhJo76ZtLFA9comkGI4vH8nTNNbXr1ZNt2/PjOGS PqZIYJk/f5QqOzCd10V5bK4EVFR/mjvQ8sBP8qfaHII0GVPomfa8jnXnFnLFjreX hhucTCf4z2HBvIjfOiilPtJbFpdrQ9oquM4W4Go1lrMZMU8B+Z3ClqytoxYW2Bw3 uQ0EzFlAwaXZ1CMcDn4eQJxNt8dO4SbGI7AHd3HmW3tFaaJC9dpey/7pIoW3gyz8 2e3wrdHXCAYq3sUlwzIrROCcBfW502E+KUmDi8ePT7zgZmxAmrqRCTNEqwaaGYrS Q/mk+Kpnjvtl6w21ss1LxNHP18TNL/f8isYW9vUQG8yogWlVin6NhPvNQXDDBWoD lfAyeL5JSoVxVGxft8EhLI/inPKBnWe2heE+zrRGQzUhTuUSyspmwK6o3b7JYNTX 16fY6OhW90CaZm6r1yKZsiE96Dd63oL4OVFELsgPQdsBNdWeKmOjs6fq46Bp0Hdf SAQ543yabPkDr4ZanaNqo0s3Vu2xVnvBS4FR0gbx6+LGuagkmBpSkYnlhgNJBbdK 6D5GCRoX0ayzJvg29kKzek2h8NhGtDco4dr7K5Hl9NebeZ++CjZ7xTbFQN6olt+D 8CcIdD2J0PY= =Y2Sm -----END PGP SIGNATURE----- Merge tag 'irq' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull arm-soc sparse IRQ conversion from Arnd Bergmann: "The I.MX platform is getting converted to use sparse IRQs. We are doing this for all platforms over time, because this is one of the requirements for building a multiplatform kernel, and generally a good idea." * tag 'irq' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: imx: select USE_OF ARM: imx: Fix build error due to missing irqs.h include ARM: imx: enable SPARSE_IRQ for imx platform ARM: fiq: change FIQ_START to a variable tty: serial: imx: remove the use of MXC_INTERNAL_IRQS ARM: imx: remove unneeded mach/irq.h inclusion i2c: imx: remove unneeded mach/irqs.h inclusion ARM: imx: add a legacy irqdomain for mx31ads ARM: imx: add a legacy irqdomain for 3ds_debugboard ARM: imx: pass gpio than irq number into mxc_expio_init ARM: imx: leave irq_base of wm8350_platform_data uninitialized dma: ipu: remove the use of ipu_platform_data ARM: imx: move irq_domain_add_legacy call into avic driver ARM: imx: move irq_domain_add_legacy call into tzic driver gpio/mxc: move irq_domain_add_legacy call into gpio driver ARM: imx: eliminate macro IRQ_GPIOx() ARM: imx: eliminate macro IOMUX_TO_IRQ() ARM: imx: eliminate macro IMX_GPIO_TO_IRQ()
This commit is contained in:
commit
3645f0cd96
79 changed files with 1052 additions and 1131 deletions
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@ -23,6 +23,7 @@
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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@ -33,8 +34,6 @@
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#include <asm-generic/bug.h>
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#include <asm/mach/irq.h>
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#define irq_to_gpio(irq) ((irq) - MXC_GPIO_IRQ_START)
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enum mxc_gpio_hwtype {
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IMX1_GPIO, /* runs on i.mx1 */
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IMX21_GPIO, /* runs on i.mx21 and i.mx27 */
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@ -61,7 +60,7 @@ struct mxc_gpio_port {
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void __iomem *base;
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int irq;
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int irq_high;
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int virtual_irq_start;
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struct irq_domain *domain;
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struct bgpio_chip bgc;
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u32 both_edges;
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};
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@ -144,14 +143,15 @@ static LIST_HEAD(mxc_gpio_ports);
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static int gpio_set_irq_type(struct irq_data *d, u32 type)
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{
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u32 gpio = irq_to_gpio(d->irq);
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
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struct mxc_gpio_port *port = gc->private;
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u32 bit, val;
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u32 gpio_idx = d->hwirq;
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u32 gpio = port->bgc.gc.base + gpio_idx;
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int edge;
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void __iomem *reg = port->base;
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port->both_edges &= ~(1 << (gpio & 31));
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port->both_edges &= ~(1 << gpio_idx);
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switch (type) {
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case IRQ_TYPE_EDGE_RISING:
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edge = GPIO_INT_RISE_EDGE;
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@ -168,7 +168,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type)
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edge = GPIO_INT_HIGH_LEV;
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pr_debug("mxc: set GPIO %d to high trigger\n", gpio);
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}
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port->both_edges |= 1 << (gpio & 31);
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port->both_edges |= 1 << gpio_idx;
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break;
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case IRQ_TYPE_LEVEL_LOW:
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edge = GPIO_INT_LOW_LEV;
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@ -180,11 +180,11 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type)
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return -EINVAL;
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}
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reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */
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bit = gpio & 0xf;
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reg += GPIO_ICR1 + ((gpio_idx & 0x10) >> 2); /* ICR1 or ICR2 */
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bit = gpio_idx & 0xf;
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val = readl(reg) & ~(0x3 << (bit << 1));
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writel(val | (edge << (bit << 1)), reg);
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writel(1 << (gpio & 0x1f), port->base + GPIO_ISR);
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writel(1 << gpio_idx, port->base + GPIO_ISR);
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return 0;
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}
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@ -217,15 +217,13 @@ static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio)
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/* handle 32 interrupts in one status register */
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static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat)
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{
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u32 gpio_irq_no_base = port->virtual_irq_start;
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while (irq_stat != 0) {
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int irqoffset = fls(irq_stat) - 1;
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if (port->both_edges & (1 << irqoffset))
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mxc_flip_edge(port, irqoffset);
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generic_handle_irq(gpio_irq_no_base + irqoffset);
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generic_handle_irq(irq_find_mapping(port->domain, irqoffset));
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irq_stat &= ~(1 << irqoffset);
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}
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@ -276,10 +274,9 @@ static void mx2_gpio_irq_handler(u32 irq, struct irq_desc *desc)
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*/
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static int gpio_set_wake_irq(struct irq_data *d, u32 enable)
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{
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u32 gpio = irq_to_gpio(d->irq);
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u32 gpio_idx = gpio & 0x1F;
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
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struct mxc_gpio_port *port = gc->private;
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u32 gpio_idx = d->hwirq;
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if (enable) {
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if (port->irq_high && (gpio_idx >= 16))
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@ -296,12 +293,12 @@ static int gpio_set_wake_irq(struct irq_data *d, u32 enable)
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return 0;
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}
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static void __init mxc_gpio_init_gc(struct mxc_gpio_port *port)
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static void __init mxc_gpio_init_gc(struct mxc_gpio_port *port, int irq_base)
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{
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struct irq_chip_generic *gc;
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struct irq_chip_type *ct;
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gc = irq_alloc_generic_chip("gpio-mxc", 1, port->virtual_irq_start,
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gc = irq_alloc_generic_chip("gpio-mxc", 1, irq_base,
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port->base, handle_level_irq);
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gc->private = port;
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@ -352,7 +349,7 @@ static int mxc_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
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struct mxc_gpio_port *port =
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container_of(bgc, struct mxc_gpio_port, bgc);
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return port->virtual_irq_start + offset;
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return irq_find_mapping(port->domain, offset);
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}
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static int __devinit mxc_gpio_probe(struct platform_device *pdev)
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@ -360,6 +357,7 @@ static int __devinit mxc_gpio_probe(struct platform_device *pdev)
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struct device_node *np = pdev->dev.of_node;
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struct mxc_gpio_port *port;
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struct resource *iores;
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int irq_base;
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int err;
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mxc_gpio_get_hw(pdev);
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@ -432,20 +430,30 @@ static int __devinit mxc_gpio_probe(struct platform_device *pdev)
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if (err)
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goto out_bgpio_remove;
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/*
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* In dt case, we use gpio number range dynamically
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* allocated by gpio core.
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*/
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port->virtual_irq_start = MXC_GPIO_IRQ_START + (np ? port->bgc.gc.base :
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pdev->id * 32);
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irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id());
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if (irq_base < 0) {
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err = irq_base;
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goto out_gpiochip_remove;
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}
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port->domain = irq_domain_add_legacy(np, 32, irq_base, 0,
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&irq_domain_simple_ops, NULL);
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if (!port->domain) {
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err = -ENODEV;
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goto out_irqdesc_free;
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}
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/* gpio-mxc can be a generic irq chip */
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mxc_gpio_init_gc(port);
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mxc_gpio_init_gc(port, irq_base);
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list_add_tail(&port->node, &mxc_gpio_ports);
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return 0;
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out_irqdesc_free:
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irq_free_descs(irq_base, 32);
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out_gpiochip_remove:
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WARN_ON(gpiochip_remove(&port->bgc.gc) < 0);
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out_bgpio_remove:
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bgpio_remove(&port->bgc);
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out_iounmap:
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