From 365fe92e7c175ae02456a7e90ef5d8fae4f1cdc9 Mon Sep 17 00:00:00 2001
From: wuwl10 <wuwl10@motorola.com>
Date: Fri, 29 Oct 2021 13:54:41 +0800
Subject: [PATCH] arm64/dt: milanf: config new nfc

Milanf will change nfc from ST to NXP PN557.
Change from DVT1A HW.

Change-Id: I529b678f79ac1c9c3982815a09bca9199f93f0d8
Signed-off-by: wuwl10 <wuwl10@motorola.com>
Reviewed-on: https://gerrit.mot.com/2103064
SLTApproved: Slta Waiver
SME-Granted: SME Approvals Granted
Tested-by: Jira Key
Reviewed-by: Huosheng Liao <liaohs@motorola.com>
Submit-Approved: Jira Key
---
 qcom/blair-milanf-dvt1-overlay.dts | 44 ++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/qcom/blair-milanf-dvt1-overlay.dts b/qcom/blair-milanf-dvt1-overlay.dts
index f039e76f90ba..e32d40932a41 100644
--- a/qcom/blair-milanf-dvt1-overlay.dts
+++ b/qcom/blair-milanf-dvt1-overlay.dts
@@ -58,6 +58,26 @@
 			pins = "gpio6";
 		};
 	};
+
+	nfc_enable_active {
+		mux {
+			pins = "gpio48";
+		};
+
+		config {
+			pins = "gpio48";
+		};
+	};
+
+	nfc_enable_suspend {
+		mux {
+			pins = "gpio48";
+		};
+
+		config {
+			pins = "gpio48";
+		};
+	};
 };
 
 &et528 {
@@ -67,3 +87,27 @@
 &silead {
 	avdd-gpios = <&tlmm 6 0x0>;
 };
+
+&qupv3_se7_i2c {
+	st21nfc@8 {
+		status = "diabled";
+	};
+
+	nq@28 {
+		compatible = "qcom,sn-nci";
+		mmi,status = "/chosen", "mmi,nfc", "nxp";
+		reg = <0x28>;
+		qcom,sn-irq = <&tlmm 9 0x00>;
+		qcom,sn-ven = <&tlmm 48 0x00>;
+		qcom,sn-firm = <&tlmm 8 0x00>;
+		qcom,sn-clkreq = <&tlmm 7 0x00>;
+		interrupt-parent = <&tlmm>;
+		interrupts = <9 0>;
+		interrupt-names = "nfc_irq";
+		pinctrl-names = "nfc_active", "nfc_suspend";
+		pinctrl-0 = <&nfc_int_active &nfc_enable_active
+				&nfc_clk_req_active>;
+		pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend
+				&nfc_clk_req_suspend>;
+	};
+};