From 1eef0cc38383d37a71d11fe9c460a56e3c3eb602 Mon Sep 17 00:00:00 2001 From: Himansu Nayak Date: Fri, 14 Apr 2023 09:35:20 +0530 Subject: [PATCH 1/4] ipa_eth: Header change to pass more info from ETH to GSI Adding Support rtk8111k and add additional member which fill from ioss and pass to GSI via IPA num_queues_enabled (Total nuber of queue). Change-Id: I7a127a9a60e1e45eb384634a7c7d74f813df3e08 Signed-off-by: Himansu Nayak --- include/linux/ipa_eth.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/linux/ipa_eth.h b/include/linux/ipa_eth.h index e64fca58d1fe..108efb313250 100644 --- a/include/linux/ipa_eth.h +++ b/include/linux/ipa_eth.h @@ -2,7 +2,7 @@ /* * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved. * - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _IPA_ETH_H_ @@ -109,12 +109,14 @@ struct ipa_eth_aqc_setup_info { * @bar_size: bar region size * @queue_number: Which RTK queue to check the status on * @dest_tail_ptr_offs: tail ptr offset + * @num_queues_enabled: Total queues to be enable */ struct ipa_eth_realtek_setup_info { phys_addr_t bar_addr; u32 bar_size; u8 queue_number; phys_addr_t dest_tail_ptr_offs; + u8 num_queues_enabled; }; From d5e2d67500afc47f0c6b33dd411d7dd7f66daed3 Mon Sep 17 00:00:00 2001 From: Raihan Haider Date: Mon, 6 Mar 2023 13:02:11 +0530 Subject: [PATCH 2/4] msm: Add config option for R8168 IOSS glue driver Add kernel config option for Realtek R8168 IOSS glue driver Change-Id: Icbcd29f154df979d4a4cb508e6c052441964d074 Signed-off-by: Raihan Haider --- drivers/platform/msm/Kconfig | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/platform/msm/Kconfig b/drivers/platform/msm/Kconfig index 98d2ae6d8f16..c6a38ba5686f 100644 --- a/drivers/platform/msm/Kconfig +++ b/drivers/platform/msm/Kconfig @@ -190,6 +190,18 @@ config R8125_IOSS To compile this driver as a module, choose M here. Module will be called r8125_ioss. If unsure, say N. +config R8168_IOSS + tristate "Realtek R8168 IOSS glue driver" + depends on R8168 + depends on IOSS + help + Enables IPA Ethernet Offload path on Realtek R8168 NIC. It is + designed to support generic HW processing of UL/DL IP packets for + various use cases to reduce the CPU load during E2E IP traffic. + + To compile this driver as a module, choose M here. Module will be + called r8168_ioss. If unsure, say N. + config AQFWD_IOSS tristate "AQC glue driver for IOSS v2" depends on AQFWD From 0c5f471d1ca93da7b627ef0c9ea7740e0b242bb6 Mon Sep 17 00:00:00 2001 From: Sai Chaitanya Kaveti Date: Thu, 6 Jul 2023 16:11:30 +0530 Subject: [PATCH 3/4] msm: ep_pcie: Set clock power management bit for EP According to PCIe spec, PCIE_CAP_CLOCK_POWER_MAN bit in LINK_CAPABILITIES_REG register should be set for EP. But it is seen as cleared after core reset. In the current driver this bit is being set but it is not taking effect. Enabling CLK_PM_EN in PCIE_ELBI_SYS_CTRL register, so that PCIE_CAP_CLOCK_POWER_MAN is set. Change-Id: I16654d5a477fa8eeaad61d6ec1dd32757627e2f9 Signed-off-by: Sai Chaitanya Kaveti --- drivers/platform/msm/ep_pcie/ep_pcie_core.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/platform/msm/ep_pcie/ep_pcie_core.c b/drivers/platform/msm/ep_pcie/ep_pcie_core.c index 7e81a80905b9..dcbee0bd18f7 100644 --- a/drivers/platform/msm/ep_pcie/ep_pcie_core.c +++ b/drivers/platform/msm/ep_pcie/ep_pcie_core.c @@ -828,6 +828,9 @@ static void ep_pcie_core_init(struct ep_pcie_dev_t *dev, bool configured) ep_pcie_write_mask(dev->dm_core + PCIE20_L1SUB_CAPABILITY, 0, 0x1f); + /* Set CLK_PM_EN which allows to configure the clock-power-man bit below for EP */ + ep_pcie_write_mask(dev->elbi + PCIE20_ELBI_SYS_CTRL, 1, BIT(7)); + /* Enable Clock Power Management */ ep_pcie_write_reg_field(dev->dm_core, PCIE20_LINK_CAPABILITIES, PCIE20_MASK_CLOCK_POWER_MAN, 0x1); From c99a841d40aa8753224386c8ca61aaaccd852ecb Mon Sep 17 00:00:00 2001 From: Pratham Pratap Date: Wed, 12 Jul 2023 00:17:04 +0530 Subject: [PATCH 4/4] usb: gadget: cdev: Add spinlock to synchronize ports->cbits_updated Consider a scenario in which open, write and close of AT port is being done repeatedly. At some point in time, cbits_updated in f_cdev structure gets overwritten by the previous close instance causing the AT port to go unresponsive. This prevents port bridge service from sending DTR/RTS settings to at_mdm0 from at_usb0. Fix this by adding spinlock to synchronise the updation of ports->cbits_updated field in f_cdev structure. Change-Id: Ibf39aa90f3918cd5f22e32a3b06685db4c4298ae Signed-off-by: Pratham Pratap --- drivers/usb/gadget/function/f_cdev.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/usb/gadget/function/f_cdev.c b/drivers/usb/gadget/function/f_cdev.c index 9357949a1525..481783ea6968 100644 --- a/drivers/usb/gadget/function/f_cdev.c +++ b/drivers/usb/gadget/function/f_cdev.c @@ -1617,6 +1617,7 @@ static long f_cdev_ioctl(struct file *fp, unsigned int cmd, int i = 0; uint32_t val; struct f_cdev *port; + unsigned long flags; port = fp->private_data; if (!port) { @@ -1638,11 +1639,13 @@ static long f_cdev_ioctl(struct file *fp, unsigned int cmd, break; case TIOCMGET: pr_debug("TIOCMGET on port(%s)%pK\n", port->name, port); + spin_lock_irqsave(&port->port_lock, flags); ret = f_cdev_tiocmget(port); if (ret >= 0) { ret = put_user(ret, (uint32_t *)arg); port->cbits_updated = false; } + spin_unlock_irqrestore(&port->port_lock, flags); break; default: pr_err("Received cmd:%d not supported\n", cmd); @@ -1658,6 +1661,7 @@ static void usb_cser_notify_modem(void *fport, int ctrl_bits) int temp; struct f_cdev *port = fport; struct cserial *cser; + unsigned long flags; cser = &port->port_usb; if (!port) { @@ -1672,6 +1676,7 @@ static void usb_cser_notify_modem(void *fport, int ctrl_bits) if (temp == port->cbits_to_modem) return; + spin_lock_irqsave(&port->port_lock, flags); port->cbits_to_modem = temp; port->cbits_updated = true; @@ -1686,6 +1691,7 @@ static void usb_cser_notify_modem(void *fport, int ctrl_bits) cser->send_modem_ctrl_bits(cser, cbits_to_laptop); } + spin_unlock_irqrestore(&port->port_lock, flags); wake_up(&port->read_wq); }