mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-29 19:21:31 -04:00
Merge branch 'for-2.6.25' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'for-2.6.25' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (69 commits) [POWERPC] Add SPE registers to core dumps [POWERPC] Use regset code for compat PTRACE_*REGS* calls [POWERPC] Use generic compat_sys_ptrace [POWERPC] Use generic compat_ptrace_request [POWERPC] Use generic ptrace peekdata/pokedata [POWERPC] Use regset code for PTRACE_*REGS* requests [POWERPC] Switch to generic compat_binfmt_elf code [POWERPC] Switch to using user_regset-based core dumps [POWERPC] Add user_regset compat support [POWERPC] Add user_regset_view definitions [POWERPC] Use user_regset accessors for GPRs [POWERPC] ptrace accessors for special regs MSR and TRAP [POWERPC] Use user_regset accessors for SPE regs [POWERPC] Use user_regset accessors for altivec regs [POWERPC] Use user_regset accessors for FP regs [POWERPC] mpc52xx: fix compile error introduce when rebasing patch [POWERPC] 4xx: PCIe indirect DCR spinlock fix. [POWERPC] Add missing native dcr dcr_ind_lock spinlock [POWERPC] 4xx: Fix offset value on Warp board [POWERPC] 4xx: Add 440EPx Sequoia ehci dts entry ...
This commit is contained in:
Linus Torvalds
commit
3796958130
102 changed files with 4173 additions and 969 deletions
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@ -1142,17 +1142,17 @@ config SERIAL_SGI_L1_CONSOLE
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say Y. Otherwise, say N.
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config SERIAL_MPC52xx
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tristate "Freescale MPC52xx family PSC serial support"
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depends on PPC_MPC52xx
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tristate "Freescale MPC52xx/MPC512x family PSC serial support"
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depends on PPC_MPC52xx || PPC_MPC512x
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select SERIAL_CORE
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help
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This drivers support the MPC52xx PSC serial ports. If you would
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like to use them, you must answer Y or M to this option. Not that
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This driver supports MPC52xx and MPC512x PSC serial ports. If you would
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like to use them, you must answer Y or M to this option. Note that
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for use as console, it must be included in kernel and not as a
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module.
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config SERIAL_MPC52xx_CONSOLE
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bool "Console on a Freescale MPC52xx family PSC serial port"
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bool "Console on a Freescale MPC52xx/MPC512x family PSC serial port"
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depends on SERIAL_MPC52xx=y
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select SERIAL_CORE_CONSOLE
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help
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@ -1160,7 +1160,7 @@ config SERIAL_MPC52xx_CONSOLE
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of the Freescale MPC52xx family as a console.
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config SERIAL_MPC52xx_CONSOLE_BAUD
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int "Freescale MPC52xx family PSC serial port baud"
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int "Freescale MPC52xx/MPC512x family PSC serial port baud"
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depends on SERIAL_MPC52xx_CONSOLE=y
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default "9600"
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help
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|
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@ -16,6 +16,9 @@
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* Some of the code has been inspired/copied from the 2.4 code written
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* by Dale Farnsworth <dfarnsworth@mvista.com>.
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*
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* Copyright (C) 2008 Freescale Semiconductor Inc.
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* John Rigby <jrigby@gmail.com>
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* Added support for MPC5121
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* Copyright (C) 2006 Secret Lab Technologies Ltd.
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* Grant Likely <grant.likely@secretlab.ca>
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* Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
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@ -67,7 +70,6 @@
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#include <linux/serial.h>
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#include <linux/sysrq.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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@ -79,6 +81,7 @@
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#endif
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#include <asm/mpc52xx.h>
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#include <asm/mpc512x.h>
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#include <asm/mpc52xx_psc.h>
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#if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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@ -111,8 +114,8 @@ static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
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static void mpc52xx_uart_of_enumerate(void);
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#endif
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#define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
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#define FIFO(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
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/* Forward declaration of the interruption handling routine */
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@ -128,15 +131,301 @@ static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
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#define uart_console(port) (0)
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#endif
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/* ======================================================================== */
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/* PSC fifo operations for isolating differences between 52xx and 512x */
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/* ======================================================================== */
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struct psc_ops {
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void (*fifo_init)(struct uart_port *port);
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int (*raw_rx_rdy)(struct uart_port *port);
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int (*raw_tx_rdy)(struct uart_port *port);
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int (*rx_rdy)(struct uart_port *port);
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int (*tx_rdy)(struct uart_port *port);
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int (*tx_empty)(struct uart_port *port);
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void (*stop_rx)(struct uart_port *port);
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void (*start_tx)(struct uart_port *port);
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void (*stop_tx)(struct uart_port *port);
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void (*rx_clr_irq)(struct uart_port *port);
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void (*tx_clr_irq)(struct uart_port *port);
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void (*write_char)(struct uart_port *port, unsigned char c);
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unsigned char (*read_char)(struct uart_port *port);
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void (*cw_disable_ints)(struct uart_port *port);
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void (*cw_restore_ints)(struct uart_port *port);
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unsigned long (*getuartclk)(void *p);
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};
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#ifdef CONFIG_PPC_MPC52xx
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#define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
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static void mpc52xx_psc_fifo_init(struct uart_port *port)
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{
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struct mpc52xx_psc __iomem *psc = PSC(port);
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struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port);
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/* /32 prescaler */
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out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00);
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out_8(&fifo->rfcntl, 0x00);
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out_be16(&fifo->rfalarm, 0x1ff);
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out_8(&fifo->tfcntl, 0x07);
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out_be16(&fifo->tfalarm, 0x80);
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port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
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out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
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}
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static int mpc52xx_psc_raw_rx_rdy(struct uart_port *port)
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{
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return in_be16(&PSC(port)->mpc52xx_psc_status)
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& MPC52xx_PSC_SR_RXRDY;
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}
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static int mpc52xx_psc_raw_tx_rdy(struct uart_port *port)
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{
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return in_be16(&PSC(port)->mpc52xx_psc_status)
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& MPC52xx_PSC_SR_TXRDY;
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}
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static int mpc52xx_psc_rx_rdy(struct uart_port *port)
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{
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return in_be16(&PSC(port)->mpc52xx_psc_isr)
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& port->read_status_mask
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& MPC52xx_PSC_IMR_RXRDY;
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}
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static int mpc52xx_psc_tx_rdy(struct uart_port *port)
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{
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return in_be16(&PSC(port)->mpc52xx_psc_isr)
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& port->read_status_mask
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& MPC52xx_PSC_IMR_TXRDY;
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}
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static int mpc52xx_psc_tx_empty(struct uart_port *port)
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{
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return in_be16(&PSC(port)->mpc52xx_psc_status)
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& MPC52xx_PSC_SR_TXEMP;
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}
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static void mpc52xx_psc_start_tx(struct uart_port *port)
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{
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port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
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out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
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}
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static void mpc52xx_psc_stop_tx(struct uart_port *port)
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{
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port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
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out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
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}
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static void mpc52xx_psc_stop_rx(struct uart_port *port)
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{
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port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
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out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
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}
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static void mpc52xx_psc_rx_clr_irq(struct uart_port *port)
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{
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}
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static void mpc52xx_psc_tx_clr_irq(struct uart_port *port)
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{
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||||
}
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static void mpc52xx_psc_write_char(struct uart_port *port, unsigned char c)
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||||
{
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out_8(&PSC(port)->mpc52xx_psc_buffer_8, c);
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}
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static unsigned char mpc52xx_psc_read_char(struct uart_port *port)
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{
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return in_8(&PSC(port)->mpc52xx_psc_buffer_8);
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}
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static void mpc52xx_psc_cw_disable_ints(struct uart_port *port)
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{
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out_be16(&PSC(port)->mpc52xx_psc_imr, 0);
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}
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static void mpc52xx_psc_cw_restore_ints(struct uart_port *port)
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{
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out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
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}
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/* Search for bus-frequency property in this node or a parent */
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static unsigned long mpc52xx_getuartclk(void *p)
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{
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#if defined(CONFIG_PPC_MERGE)
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static struct of_device_id mpc52xx_uart_of_match[] = {
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{ .type = "serial", .compatible = "fsl,mpc5200-psc-uart", },
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{ .type = "serial", .compatible = "mpc5200-psc-uart", }, /* lite5200 */
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{ .type = "serial", .compatible = "mpc5200-serial", }, /* efika */
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{},
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/*
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* 5200 UARTs have a / 32 prescaler
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* but the generic serial code assumes 16
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* so return ipb freq / 2
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*/
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return mpc52xx_find_ipb_freq(p) / 2;
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#else
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pr_debug("unexpected call to mpc52xx_getuartclk with arch/ppc\n");
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return NULL;
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#endif
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}
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static struct psc_ops mpc52xx_psc_ops = {
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.fifo_init = mpc52xx_psc_fifo_init,
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.raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
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.raw_tx_rdy = mpc52xx_psc_raw_tx_rdy,
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.rx_rdy = mpc52xx_psc_rx_rdy,
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.tx_rdy = mpc52xx_psc_tx_rdy,
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.tx_empty = mpc52xx_psc_tx_empty,
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.stop_rx = mpc52xx_psc_stop_rx,
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.start_tx = mpc52xx_psc_start_tx,
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.stop_tx = mpc52xx_psc_stop_tx,
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.rx_clr_irq = mpc52xx_psc_rx_clr_irq,
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.tx_clr_irq = mpc52xx_psc_tx_clr_irq,
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.write_char = mpc52xx_psc_write_char,
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.read_char = mpc52xx_psc_read_char,
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.cw_disable_ints = mpc52xx_psc_cw_disable_ints,
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.cw_restore_ints = mpc52xx_psc_cw_restore_ints,
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.getuartclk = mpc52xx_getuartclk,
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};
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#endif /* CONFIG_MPC52xx */
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#ifdef CONFIG_PPC_MPC512x
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#define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
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static void mpc512x_psc_fifo_init(struct uart_port *port)
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{
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out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
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out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
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out_be32(&FIFO_512x(port)->txalarm, 1);
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out_be32(&FIFO_512x(port)->tximr, 0);
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out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);
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||||
out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
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||||
out_be32(&FIFO_512x(port)->rxalarm, 1);
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||||
out_be32(&FIFO_512x(port)->rximr, 0);
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||||
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||||
out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM);
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out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM);
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||||
}
|
||||
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||||
static int mpc512x_psc_raw_rx_rdy(struct uart_port *port)
|
||||
{
|
||||
return !(in_be32(&FIFO_512x(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY);
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||||
}
|
||||
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||||
static int mpc512x_psc_raw_tx_rdy(struct uart_port *port)
|
||||
{
|
||||
return !(in_be32(&FIFO_512x(port)->txsr) & MPC512x_PSC_FIFO_FULL);
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||||
}
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||||
|
||||
static int mpc512x_psc_rx_rdy(struct uart_port *port)
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||||
{
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||||
return in_be32(&FIFO_512x(port)->rxsr)
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& in_be32(&FIFO_512x(port)->rximr)
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& MPC512x_PSC_FIFO_ALARM;
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||||
}
|
||||
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||||
static int mpc512x_psc_tx_rdy(struct uart_port *port)
|
||||
{
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||||
return in_be32(&FIFO_512x(port)->txsr)
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||||
& in_be32(&FIFO_512x(port)->tximr)
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||||
& MPC512x_PSC_FIFO_ALARM;
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||||
}
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||||
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||||
static int mpc512x_psc_tx_empty(struct uart_port *port)
|
||||
{
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||||
return in_be32(&FIFO_512x(port)->txsr)
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||||
& MPC512x_PSC_FIFO_EMPTY;
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||||
}
|
||||
|
||||
static void mpc512x_psc_stop_rx(struct uart_port *port)
|
||||
{
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||||
unsigned long rx_fifo_imr;
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||||
|
||||
rx_fifo_imr = in_be32(&FIFO_512x(port)->rximr);
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||||
rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
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||||
out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr);
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||||
}
|
||||
|
||||
static void mpc512x_psc_start_tx(struct uart_port *port)
|
||||
{
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||||
unsigned long tx_fifo_imr;
|
||||
|
||||
tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
|
||||
tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM;
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||||
out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
|
||||
}
|
||||
|
||||
static void mpc512x_psc_stop_tx(struct uart_port *port)
|
||||
{
|
||||
unsigned long tx_fifo_imr;
|
||||
|
||||
tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
|
||||
tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
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||||
out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
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||||
}
|
||||
|
||||
static void mpc512x_psc_rx_clr_irq(struct uart_port *port)
|
||||
{
|
||||
out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr));
|
||||
}
|
||||
|
||||
static void mpc512x_psc_tx_clr_irq(struct uart_port *port)
|
||||
{
|
||||
out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr));
|
||||
}
|
||||
|
||||
static void mpc512x_psc_write_char(struct uart_port *port, unsigned char c)
|
||||
{
|
||||
out_8(&FIFO_512x(port)->txdata_8, c);
|
||||
}
|
||||
|
||||
static unsigned char mpc512x_psc_read_char(struct uart_port *port)
|
||||
{
|
||||
return in_8(&FIFO_512x(port)->rxdata_8);
|
||||
}
|
||||
|
||||
static void mpc512x_psc_cw_disable_ints(struct uart_port *port)
|
||||
{
|
||||
port->read_status_mask =
|
||||
in_be32(&FIFO_512x(port)->tximr) << 16 |
|
||||
in_be32(&FIFO_512x(port)->rximr);
|
||||
out_be32(&FIFO_512x(port)->tximr, 0);
|
||||
out_be32(&FIFO_512x(port)->rximr, 0);
|
||||
}
|
||||
|
||||
static void mpc512x_psc_cw_restore_ints(struct uart_port *port)
|
||||
{
|
||||
out_be32(&FIFO_512x(port)->tximr,
|
||||
(port->read_status_mask >> 16) & 0x7f);
|
||||
out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f);
|
||||
}
|
||||
|
||||
static unsigned long mpc512x_getuartclk(void *p)
|
||||
{
|
||||
return mpc512x_find_ips_freq(p);
|
||||
}
|
||||
|
||||
static struct psc_ops mpc512x_psc_ops = {
|
||||
.fifo_init = mpc512x_psc_fifo_init,
|
||||
.raw_rx_rdy = mpc512x_psc_raw_rx_rdy,
|
||||
.raw_tx_rdy = mpc512x_psc_raw_tx_rdy,
|
||||
.rx_rdy = mpc512x_psc_rx_rdy,
|
||||
.tx_rdy = mpc512x_psc_tx_rdy,
|
||||
.tx_empty = mpc512x_psc_tx_empty,
|
||||
.stop_rx = mpc512x_psc_stop_rx,
|
||||
.start_tx = mpc512x_psc_start_tx,
|
||||
.stop_tx = mpc512x_psc_stop_tx,
|
||||
.rx_clr_irq = mpc512x_psc_rx_clr_irq,
|
||||
.tx_clr_irq = mpc512x_psc_tx_clr_irq,
|
||||
.write_char = mpc512x_psc_write_char,
|
||||
.read_char = mpc512x_psc_read_char,
|
||||
.cw_disable_ints = mpc512x_psc_cw_disable_ints,
|
||||
.cw_restore_ints = mpc512x_psc_cw_restore_ints,
|
||||
.getuartclk = mpc512x_getuartclk,
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct psc_ops *psc_ops;
|
||||
|
||||
/* ======================================================================== */
|
||||
/* UART operations */
|
||||
|
|
@ -145,8 +434,7 @@ static struct of_device_id mpc52xx_uart_of_match[] = {
|
|||
static unsigned int
|
||||
mpc52xx_uart_tx_empty(struct uart_port *port)
|
||||
{
|
||||
int status = in_be16(&PSC(port)->mpc52xx_psc_status);
|
||||
return (status & MPC52xx_PSC_SR_TXEMP) ? TIOCSER_TEMT : 0;
|
||||
return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0;
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -166,16 +454,14 @@ static void
|
|||
mpc52xx_uart_stop_tx(struct uart_port *port)
|
||||
{
|
||||
/* port->lock taken by caller */
|
||||
port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
|
||||
out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
|
||||
psc_ops->stop_tx(port);
|
||||
}
|
||||
|
||||
static void
|
||||
mpc52xx_uart_start_tx(struct uart_port *port)
|
||||
{
|
||||
/* port->lock taken by caller */
|
||||
port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
|
||||
out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
|
||||
psc_ops->start_tx(port);
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -188,8 +474,7 @@ mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
|
|||
if (ch) {
|
||||
/* Make sure tx interrupts are on */
|
||||
/* Truly necessary ??? They should be anyway */
|
||||
port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
|
||||
out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
|
||||
psc_ops->start_tx(port);
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&port->lock, flags);
|
||||
|
|
@ -199,8 +484,7 @@ static void
|
|||
mpc52xx_uart_stop_rx(struct uart_port *port)
|
||||
{
|
||||
/* port->lock taken by caller */
|
||||
port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
|
||||
out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
|
||||
psc_ops->stop_rx(port);
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -227,12 +511,12 @@ static int
|
|||
mpc52xx_uart_startup(struct uart_port *port)
|
||||
{
|
||||
struct mpc52xx_psc __iomem *psc = PSC(port);
|
||||
struct mpc52xx_psc_fifo __iomem *fifo = FIFO(port);
|
||||
int ret;
|
||||
|
||||
/* Request IRQ */
|
||||
ret = request_irq(port->irq, mpc52xx_uart_int,
|
||||
IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "mpc52xx_psc_uart", port);
|
||||
IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_SHARED,
|
||||
"mpc52xx_psc_uart", port);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
|
@ -242,15 +526,7 @@ mpc52xx_uart_startup(struct uart_port *port)
|
|||
|
||||
out_be32(&psc->sicr, 0); /* UART mode DCD ignored */
|
||||
|
||||
out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */
|
||||
|
||||
out_8(&fifo->rfcntl, 0x00);
|
||||
out_be16(&fifo->rfalarm, 0x1ff);
|
||||
out_8(&fifo->tfcntl, 0x07);
|
||||
out_be16(&fifo->tfalarm, 0x80);
|
||||
|
||||
port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
|
||||
out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
|
||||
psc_ops->fifo_init(port);
|
||||
|
||||
out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
|
||||
out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
|
||||
|
|
@ -333,8 +609,7 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
|
|||
* boot for the console, all stuff is not yet ready to receive at that
|
||||
* time and that just makes the kernel oops */
|
||||
/* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
|
||||
while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
|
||||
--j)
|
||||
while (!mpc52xx_uart_tx_empty(port) && --j)
|
||||
udelay(1);
|
||||
|
||||
if (!j)
|
||||
|
|
@ -462,11 +737,9 @@ mpc52xx_uart_int_rx_chars(struct uart_port *port)
|
|||
unsigned short status;
|
||||
|
||||
/* While we can read, do so ! */
|
||||
while ((status = in_be16(&PSC(port)->mpc52xx_psc_status)) &
|
||||
MPC52xx_PSC_SR_RXRDY) {
|
||||
|
||||
while (psc_ops->raw_rx_rdy(port)) {
|
||||
/* Get the char */
|
||||
ch = in_8(&PSC(port)->mpc52xx_psc_buffer_8);
|
||||
ch = psc_ops->read_char(port);
|
||||
|
||||
/* Handle sysreq char */
|
||||
#ifdef SUPPORT_SYSRQ
|
||||
|
|
@ -481,6 +754,8 @@ mpc52xx_uart_int_rx_chars(struct uart_port *port)
|
|||
flag = TTY_NORMAL;
|
||||
port->icount.rx++;
|
||||
|
||||
status = in_be16(&PSC(port)->mpc52xx_psc_status);
|
||||
|
||||
if (status & (MPC52xx_PSC_SR_PE |
|
||||
MPC52xx_PSC_SR_FE |
|
||||
MPC52xx_PSC_SR_RB)) {
|
||||
|
|
@ -510,7 +785,7 @@ mpc52xx_uart_int_rx_chars(struct uart_port *port)
|
|||
|
||||
tty_flip_buffer_push(tty);
|
||||
|
||||
return in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY;
|
||||
return psc_ops->raw_rx_rdy(port);
|
||||
}
|
||||
|
||||
static inline int
|
||||
|
|
@ -520,7 +795,7 @@ mpc52xx_uart_int_tx_chars(struct uart_port *port)
|
|||
|
||||
/* Process out of band chars */
|
||||
if (port->x_char) {
|
||||
out_8(&PSC(port)->mpc52xx_psc_buffer_8, port->x_char);
|
||||
psc_ops->write_char(port, port->x_char);
|
||||
port->icount.tx++;
|
||||
port->x_char = 0;
|
||||
return 1;
|
||||
|
|
@ -533,8 +808,8 @@ mpc52xx_uart_int_tx_chars(struct uart_port *port)
|
|||
}
|
||||
|
||||
/* Send chars */
|
||||
while (in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXRDY) {
|
||||
out_8(&PSC(port)->mpc52xx_psc_buffer_8, xmit->buf[xmit->tail]);
|
||||
while (psc_ops->raw_tx_rdy(port)) {
|
||||
psc_ops->write_char(port, xmit->buf[xmit->tail]);
|
||||
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
|
||||
port->icount.tx++;
|
||||
if (uart_circ_empty(xmit))
|
||||
|
|
@ -560,7 +835,6 @@ mpc52xx_uart_int(int irq, void *dev_id)
|
|||
struct uart_port *port = dev_id;
|
||||
unsigned long pass = ISR_PASS_LIMIT;
|
||||
unsigned int keepgoing;
|
||||
unsigned short status;
|
||||
|
||||
spin_lock(&port->lock);
|
||||
|
||||
|
|
@ -569,18 +843,12 @@ mpc52xx_uart_int(int irq, void *dev_id)
|
|||
/* If we don't find anything to do, we stop */
|
||||
keepgoing = 0;
|
||||
|
||||
/* Read status */
|
||||
status = in_be16(&PSC(port)->mpc52xx_psc_isr);
|
||||
status &= port->read_status_mask;
|
||||
|
||||
/* Do we need to receive chars ? */
|
||||
/* For this RX interrupts must be on and some chars waiting */
|
||||
if (status & MPC52xx_PSC_IMR_RXRDY)
|
||||
psc_ops->rx_clr_irq(port);
|
||||
if (psc_ops->rx_rdy(port))
|
||||
keepgoing |= mpc52xx_uart_int_rx_chars(port);
|
||||
|
||||
/* Do we need to send chars ? */
|
||||
/* For this, TX must be ready and TX interrupt enabled */
|
||||
if (status & MPC52xx_PSC_IMR_TXRDY)
|
||||
psc_ops->tx_clr_irq(port);
|
||||
if (psc_ops->tx_rdy(port))
|
||||
keepgoing |= mpc52xx_uart_int_tx_chars(port);
|
||||
|
||||
/* Limit number of iteration */
|
||||
|
|
@ -647,36 +915,33 @@ static void
|
|||
mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
|
||||
{
|
||||
struct uart_port *port = &mpc52xx_uart_ports[co->index];
|
||||
struct mpc52xx_psc __iomem *psc = PSC(port);
|
||||
unsigned int i, j;
|
||||
|
||||
/* Disable interrupts */
|
||||
out_be16(&psc->mpc52xx_psc_imr, 0);
|
||||
psc_ops->cw_disable_ints(port);
|
||||
|
||||
/* Wait the TX buffer to be empty */
|
||||
j = 5000000; /* Maximum wait */
|
||||
while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
|
||||
--j)
|
||||
while (!mpc52xx_uart_tx_empty(port) && --j)
|
||||
udelay(1);
|
||||
|
||||
/* Write all the chars */
|
||||
for (i = 0; i < count; i++, s++) {
|
||||
/* Line return handling */
|
||||
if (*s == '\n')
|
||||
out_8(&psc->mpc52xx_psc_buffer_8, '\r');
|
||||
psc_ops->write_char(port, '\r');
|
||||
|
||||
/* Send the char */
|
||||
out_8(&psc->mpc52xx_psc_buffer_8, *s);
|
||||
psc_ops->write_char(port, *s);
|
||||
|
||||
/* Wait the TX buffer to be empty */
|
||||
j = 20000; /* Maximum wait */
|
||||
while (!(in_be16(&psc->mpc52xx_psc_status) &
|
||||
MPC52xx_PSC_SR_TXEMP) && --j)
|
||||
while (!mpc52xx_uart_tx_empty(port) && --j)
|
||||
udelay(1);
|
||||
}
|
||||
|
||||
/* Restore interrupt state */
|
||||
out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
|
||||
psc_ops->cw_restore_ints(port);
|
||||
}
|
||||
|
||||
#if !defined(CONFIG_PPC_MERGE)
|
||||
|
|
@ -721,7 +986,7 @@ mpc52xx_console_setup(struct console *co, char *options)
|
|||
{
|
||||
struct uart_port *port = &mpc52xx_uart_ports[co->index];
|
||||
struct device_node *np = mpc52xx_uart_nodes[co->index];
|
||||
unsigned int ipb_freq;
|
||||
unsigned int uartclk;
|
||||
struct resource res;
|
||||
int ret;
|
||||
|
||||
|
|
@ -753,17 +1018,16 @@ mpc52xx_console_setup(struct console *co, char *options)
|
|||
return ret;
|
||||
}
|
||||
|
||||
/* Search for bus-frequency property in this node or a parent */
|
||||
ipb_freq = mpc52xx_find_ipb_freq(np);
|
||||
if (ipb_freq == 0) {
|
||||
pr_debug("Could not find IPB bus frequency!\n");
|
||||
uartclk = psc_ops->getuartclk(np);
|
||||
if (uartclk == 0) {
|
||||
pr_debug("Could not find uart clock frequency!\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Basic port init. Needed since we use some uart_??? func before
|
||||
* real init for early access */
|
||||
spin_lock_init(&port->lock);
|
||||
port->uartclk = ipb_freq / 2;
|
||||
port->uartclk = uartclk;
|
||||
port->ops = &mpc52xx_uart_ops;
|
||||
port->mapbase = res.start;
|
||||
port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
|
||||
|
|
@ -945,11 +1209,25 @@ static struct platform_driver mpc52xx_uart_platform_driver = {
|
|||
/* OF Platform Driver */
|
||||
/* ======================================================================== */
|
||||
|
||||
static struct of_device_id mpc52xx_uart_of_match[] = {
|
||||
#ifdef CONFIG_PPC_MPC52xx
|
||||
{ .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
|
||||
/* binding used by old lite5200 device trees: */
|
||||
{ .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
|
||||
/* binding used by efika: */
|
||||
{ .compatible = "mpc5200-serial", .data = &mpc52xx_psc_ops, },
|
||||
#endif
|
||||
#ifdef CONFIG_PPC_MPC512x
|
||||
{ .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, },
|
||||
{},
|
||||
#endif
|
||||
};
|
||||
|
||||
static int __devinit
|
||||
mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
|
||||
{
|
||||
int idx = -1;
|
||||
unsigned int ipb_freq;
|
||||
unsigned int uartclk;
|
||||
struct uart_port *port = NULL;
|
||||
struct resource res;
|
||||
int ret;
|
||||
|
|
@ -965,10 +1243,9 @@ mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
|
|||
pr_debug("Found %s assigned to ttyPSC%x\n",
|
||||
mpc52xx_uart_nodes[idx]->full_name, idx);
|
||||
|
||||
/* Search for bus-frequency property in this node or a parent */
|
||||
ipb_freq = mpc52xx_find_ipb_freq(op->node);
|
||||
if (ipb_freq == 0) {
|
||||
dev_dbg(&op->dev, "Could not find IPB bus frequency!\n");
|
||||
uartclk = psc_ops->getuartclk(op->node);
|
||||
if (uartclk == 0) {
|
||||
dev_dbg(&op->dev, "Could not find uart clock frequency!\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
|
@ -976,7 +1253,7 @@ mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
|
|||
port = &mpc52xx_uart_ports[idx];
|
||||
|
||||
spin_lock_init(&port->lock);
|
||||
port->uartclk = ipb_freq / 2;
|
||||
port->uartclk = uartclk;
|
||||
port->fifosize = 512;
|
||||
port->iotype = UPIO_MEM;
|
||||
port->flags = UPF_BOOT_AUTOCONF |
|
||||
|
|
@ -1080,15 +1357,19 @@ mpc52xx_uart_of_enumerate(void)
|
|||
static int enum_done;
|
||||
struct device_node *np;
|
||||
const unsigned int *devno;
|
||||
const struct of_device_id *match;
|
||||
int i;
|
||||
|
||||
if (enum_done)
|
||||
return;
|
||||
|
||||
for_each_node_by_type(np, "serial") {
|
||||
if (!of_match_node(mpc52xx_uart_of_match, np))
|
||||
match = of_match_node(mpc52xx_uart_of_match, np);
|
||||
if (!match)
|
||||
continue;
|
||||
|
||||
psc_ops = match->data;
|
||||
|
||||
/* Is a particular device number requested? */
|
||||
devno = of_get_property(np, "port-number", NULL);
|
||||
mpc52xx_uart_of_assign(np, devno ? *devno : -1);
|
||||
|
|
@ -1149,6 +1430,7 @@ mpc52xx_uart_init(void)
|
|||
return ret;
|
||||
}
|
||||
#else
|
||||
psc_ops = &mpc52xx_psc_ops;
|
||||
ret = platform_driver_register(&mpc52xx_uart_platform_driver);
|
||||
if (ret) {
|
||||
printk(KERN_ERR "%s: platform_driver_register failed (%i)\n",
|
||||
|
|
|
|||
|
|
@ -17,10 +17,21 @@
|
|||
#include <linux/tty.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/init.h>
|
||||
#include <asm/io.h>
|
||||
#if defined(CONFIG_OF)
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/of_platform.h>
|
||||
|
||||
/* Match table for of_platform binding */
|
||||
static struct of_device_id ulite_of_match[] __devinitdata = {
|
||||
{ .compatible = "xlnx,opb-uartlite-1.00.b", },
|
||||
{ .compatible = "xlnx,xps-uartlite-1.00.a", },
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, ulite_of_match);
|
||||
|
||||
#endif
|
||||
|
||||
#define ULITE_NAME "ttyUL"
|
||||
|
|
@ -275,6 +286,9 @@ static void ulite_release_port(struct uart_port *port)
|
|||
|
||||
static int ulite_request_port(struct uart_port *port)
|
||||
{
|
||||
pr_debug("ulite console: port=%p; port->mapbase=%x\n",
|
||||
port, port->mapbase);
|
||||
|
||||
if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
|
||||
dev_err(port->dev, "Memory region busy\n");
|
||||
return -EBUSY;
|
||||
|
|
@ -375,32 +389,6 @@ static void ulite_console_write(struct console *co, const char *s,
|
|||
spin_unlock_irqrestore(&port->lock, flags);
|
||||
}
|
||||
|
||||
#if defined(CONFIG_OF)
|
||||
static inline void __init ulite_console_of_find_device(int id)
|
||||
{
|
||||
struct device_node *np;
|
||||
struct resource res;
|
||||
const unsigned int *of_id;
|
||||
int rc;
|
||||
|
||||
for_each_compatible_node(np, NULL, "xilinx,uartlite") {
|
||||
of_id = of_get_property(np, "port-number", NULL);
|
||||
if ((!of_id) || (*of_id != id))
|
||||
continue;
|
||||
|
||||
rc = of_address_to_resource(np, 0, &res);
|
||||
if (rc)
|
||||
continue;
|
||||
|
||||
ulite_ports[id].mapbase = res.start;
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
}
|
||||
#else /* CONFIG_OF */
|
||||
static inline void __init ulite_console_of_find_device(int id) { /* do nothing */ }
|
||||
#endif /* CONFIG_OF */
|
||||
|
||||
static int __init ulite_console_setup(struct console *co, char *options)
|
||||
{
|
||||
struct uart_port *port;
|
||||
|
|
@ -414,11 +402,7 @@ static int __init ulite_console_setup(struct console *co, char *options)
|
|||
|
||||
port = &ulite_ports[co->index];
|
||||
|
||||
/* Check if it is an OF device */
|
||||
if (!port->mapbase)
|
||||
ulite_console_of_find_device(co->index);
|
||||
|
||||
/* Do we have a device now? */
|
||||
/* Has the device been initialized yet? */
|
||||
if (!port->mapbase) {
|
||||
pr_debug("console on ttyUL%i not present\n", co->index);
|
||||
return -ENODEV;
|
||||
|
|
@ -617,13 +601,6 @@ static int __devexit ulite_of_remove(struct of_device *op)
|
|||
return ulite_release(&op->dev);
|
||||
}
|
||||
|
||||
/* Match table for of_platform binding */
|
||||
static struct of_device_id __devinit ulite_of_match[] = {
|
||||
{ .type = "serial", .compatible = "xilinx,uartlite", },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, ulite_of_match);
|
||||
|
||||
static struct of_platform_driver ulite_of_driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.name = "uartlite",
|
||||
|
|
|
|||
Loading…
Reference in a new issue