From 58d2ca31d74ea5cd3e03c721b18c5f04024b64c9 Mon Sep 17 00:00:00 2001 From: Gaurav Kashyap Date: Fri, 25 Sep 2020 10:40:41 -0700 Subject: [PATCH] hwkm: Empty RSP buffer before any command Empty the RSP fifo before executing any command in case there is some stale data from previous commands. Change-Id: I6f15e8f5a8e901da224e89b741c503d408b9449f Signed-off-by: Gaurav Kashyap --- drivers/soc/qcom/hwkm.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/drivers/soc/qcom/hwkm.c b/drivers/soc/qcom/hwkm.c index de075aa49180..d763292fbd6b 100644 --- a/drivers/soc/qcom/hwkm.c +++ b/drivers/soc/qcom/hwkm.c @@ -143,6 +143,7 @@ static int qti_hwkm_master_transaction(struct hwkm_device *dev, int i = 0; int err = 0; u32 val = 0; + uint32_t rsp_discard; // Clear CMD FIFO qti_hwkm_setb(dev, QTI_HWKM_MASTER_RG_BANK2_BANKN_CTL, @@ -177,6 +178,22 @@ static int qti_hwkm_master_transaction(struct hwkm_device *dev, return -err; } + if (qti_hwkm_testb(dev, QTI_HWKM_MASTER_RG_BANK2_BANKN_IRQ_STATUS, + RSP_FIFO_NOT_EMPTY, KM_MASTER)) { + while (qti_hwkm_get_reg_data(dev, + QTI_HWKM_MASTER_RG_BANK2_BANKN_STATUS, + RSP_FIFO_AVAILABLE_DATA, RSP_FIFO_AVAILABLE_DATA_MASK, + KM_MASTER) > 0) { + rsp_discard = qti_hwkm_readl(dev, + QTI_HWKM_MASTER_RG_BANK2_RSP_0, KM_MASTER); + } + // Clear RSP_FIFO_NOT_EMPTY status bit + qti_hwkm_setb(dev, QTI_HWKM_MASTER_RG_BANK2_BANKN_IRQ_STATUS, + RSP_FIFO_NOT_EMPTY, KM_MASTER); + /* Write memory barrier */ + wmb(); + } + for (i = 0; i < cmd_words; i++) { WAIT_UNTIL(qti_hwkm_get_reg_data(dev, QTI_HWKM_MASTER_RG_BANK2_BANKN_STATUS, @@ -258,6 +275,7 @@ static int qti_hwkm_ice_transaction(struct hwkm_device *dev, int i = 0; int err = 0; u32 val = 0; + uint32_t rsp_discard; // Clear CMD FIFO qti_hwkm_setb(dev, QTI_HWKM_ICE_RG_BANK0_BANKN_CTL, @@ -293,6 +311,22 @@ static int qti_hwkm_ice_transaction(struct hwkm_device *dev, return err; } + if (qti_hwkm_testb(dev, QTI_HWKM_ICE_RG_BANK0_BANKN_IRQ_STATUS, + RSP_FIFO_NOT_EMPTY, ICEMEM_SLAVE)) { + while (qti_hwkm_get_reg_data(dev, + QTI_HWKM_ICE_RG_BANK0_BANKN_STATUS, + RSP_FIFO_AVAILABLE_DATA, RSP_FIFO_AVAILABLE_DATA_MASK, + ICEMEM_SLAVE) > 0) { + rsp_discard = qti_hwkm_readl(dev, + QTI_HWKM_ICE_RG_BANK0_RSP_0, ICEMEM_SLAVE); + } + // Clear RSP_FIFO_NOT_EMPTY status bit + qti_hwkm_setb(dev, QTI_HWKM_ICE_RG_BANK0_BANKN_IRQ_STATUS, + RSP_FIFO_NOT_EMPTY, ICEMEM_SLAVE); + /* Write memory barrier */ + wmb(); + } + for (i = 0; i < cmd_words; i++) { WAIT_UNTIL(qti_hwkm_get_reg_data(dev, QTI_HWKM_ICE_RG_BANK0_BANKN_STATUS,