mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-10 14:19:09 -04:00
iommu: arm-smmu: add capturebus support for smmuv500
add a debugfs interface under /sys/kernel/debug/iommu/capturebus to support capture bus for smmuv500. Change-Id: Ibf2a2daf87941387c1b3f990f05d86a1cd4dbfff Signed-off-by: Vijayanand Jitta <vjitta@codeaurora.org> [guptap@codeaurora.org: refactored implementation] Signed-off-by: Prakash Gupta <guptap@codeaurora.org>
This commit is contained in:
Vijayanand Jitta
Prakash Gupta
parent
5168327a4f
commit
38edc27806
4 changed files with 476 additions and 11 deletions
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@ -223,3 +223,66 @@ void arm_smmu_debug_dump_tcu_testbus(struct device *dev, phys_addr_t phys_addr,
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arm_smmu_debug_tcu_testbus_select(phys_addr, tcu_base,
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CLK_TESTBUS, READ, 0));
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}
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void arm_smmu_debug_set_tnx_tcr_cntl(void __iomem *tbu_base, u64 val)
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{
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u64 tcr_cntl_val = readq_relaxed(tbu_base + TNX_TCR_CNTL);
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/* Don't override OT_CAPTURE configuration*/
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if (!(tcr_cntl_val & TNX_TCR_CNTL_TBU_OT_CAPTURE_EN))
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writeq_relaxed(val, tbu_base + TNX_TCR_CNTL);
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else
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pr_err_ratelimited("OT capture enbl, skip TCR CNTL write\n");
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}
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u64 arm_smmu_debug_get_tnx_tcr_cntl(void __iomem *tbu_base)
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{
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return readq_relaxed(tbu_base + TNX_TCR_CNTL);
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}
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void arm_smmu_debug_set_mask_and_match(void __iomem *tbu_base, u64 sel,
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u64 mask, u64 match)
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{
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writeq_relaxed(mask, tbu_base + ARM_SMMU_CAPTURE1_MASK(sel));
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writeq_relaxed(match, tbu_base + ARM_SMMU_CAPTURE1_MATCH(sel));
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}
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void arm_smmu_debug_get_mask_and_match(void __iomem *tbu_base, u64 *mask,
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u64 *match)
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{
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int i;
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for (i = 0; i < NO_OF_MASK_AND_MATCH; ++i) {
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mask[i] = readq_relaxed(tbu_base +
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ARM_SMMU_CAPTURE1_MASK(i+1));
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match[i] = readq_relaxed(tbu_base +
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ARM_SMMU_CAPTURE1_MATCH(i+1));
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}
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}
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void arm_smmu_debug_get_capture_snapshot(void __iomem *tbu_base,
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u64 snapshot[NO_OF_CAPTURE_POINTS][REGS_PER_CAPTURE_POINT])
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{
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int i, j;
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u64 valid;
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valid = readl_relaxed(tbu_base + TNX_TCR_CNTL_2);
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for (i = 0; i < NO_OF_CAPTURE_POINTS ; ++i) {
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if (valid & BIT(i))
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for (j = 0; j < REGS_PER_CAPTURE_POINT; ++j)
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snapshot[i][j] = readq_relaxed(tbu_base +
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ARM_SMMU_CAPTURE_SNAPSHOT(i, j));
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else
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for (j = 0; j < REGS_PER_CAPTURE_POINT; ++j)
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snapshot[i][j] = 0xdededede;
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}
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}
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void arm_smmu_debug_clear_intr_and_validbits(void __iomem *tbu_base)
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{
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u64 val = 0;
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val |= INTR_CLR | RESET_VALID;
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writeq_relaxed(val, tbu_base + TNX_TCR_CNTL);
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}
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@ -38,6 +38,28 @@
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extern int tbu_testbus_sel;
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extern int tcu_testbus_sel;
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#define TNX_TCR_CNTL 0x130
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#define TNX_TCR_CNTL_TBU_OT_CAPTURE_EN BIT(18)
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#define TNX_TCR_CNTL_ALWAYS_CAPTURE BIT(15)
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#define TNX_TCR_CNTL_MATCH_MASK_UPD BIT(7)
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#define TNX_TCR_CNTL_MATCH_MASK_VALID BIT(6)
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#define CAPTURE1_SNAPSHOT_1 0x138
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#define TNX_TCR_CNTL_2 0x178
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#define TNX_TCR_CNTL_2_CAP1_VALID BIT(0)
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#define ARM_SMMU_CAPTURE1_MASK(i) (0x100 + (0x8 * (i-1)))
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#define ARM_SMMU_CAPTURE1_MATCH(i) (0x118 + (0x8 * (i-1)))
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#define ARM_SMMU_CAPTURE_SNAPSHOT(i, j) (CAPTURE1_SNAPSHOT_1 + \
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(0x10 * (i)) + ((j) * 0x8))
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#define NO_OF_MASK_AND_MATCH 0x3
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#define NO_OF_CAPTURE_POINTS 0x4
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#define REGS_PER_CAPTURE_POINT 0x2
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#define INTR_CLR BIT(0)
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#define RESET_VALID BIT(7)
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enum tcu_testbus {
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PTW_AND_CACHE_TESTBUS,
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CLK_TESTBUS,
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@ -66,7 +88,15 @@ void arm_smmu_debug_dump_tbu_testbus(struct device *dev, void __iomem *tbu_base,
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int tbu_testbus_sel);
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void arm_smmu_debug_dump_tcu_testbus(struct device *dev, phys_addr_t phys_addr,
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void __iomem *tcu_base, int tcu_testbus_sel);
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void arm_smmu_debug_set_tnx_tcr_cntl(void __iomem *tbu_base, u64 val);
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u64 arm_smmu_debug_get_tnx_tcr_cntl(void __iomem *tbu_base);
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void arm_smmu_debug_set_mask_and_match(void __iomem *tbu_base, u64 sel,
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u64 mask, u64 match);
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void arm_smmu_debug_get_mask_and_match(void __iomem *tbu_base,
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u64 *mask, u64 *match);
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void arm_smmu_debug_get_capture_snapshot(void __iomem *tbu_base,
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u64 snapshot[NO_OF_CAPTURE_POINTS][REGS_PER_CAPTURE_POINT]);
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void arm_smmu_debug_clear_intr_and_validbits(void __iomem *tbu_base);
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#else
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static inline u32 arm_smmu_debug_tbu_testbus_select(void __iomem *tbu_base,
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bool write, u32 val)
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@ -95,5 +125,30 @@ static inline void arm_smmu_debug_dump_tcu_testbus(struct device *dev,
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int tcu_testbus_sel)
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{
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}
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static inline void arm_smmu_debug_set_tnx_tcr_cntl(void __iomem *tbu_base,
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u64 val)
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{
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}
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static inline u64 arm_smmu_debug_get_tnx_tcr_cntl(void __iomem *tbu_base)
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{
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return 0;
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}
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static inline void arm_smmu_debug_set_mask_and_match(void __iomem *tbu_base, u64
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sel, u64 mask, u64 match)
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{
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}
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static inline void arm_smmu_debug_get_mask_and_match(void __iomem *tbu_base,
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u64 *mask, u64 *match)
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{
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}
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static inline void arm_smmu_debug_get_capture_snapshot(void __iomem *tbu_base,
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u64 snapshot[NO_OF_CAPTURE_POINTS][REGS_PER_CAPTURE_POINT])
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{
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}
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static inline void arm_smmu_debug_clear_intr_and_validbits(void __iomem
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*tbu_base)
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{
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}
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#endif
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@ -4,6 +4,7 @@
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*/
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#include <linux/bitfield.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/of.h>
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@ -378,16 +379,6 @@ static const struct arm_smmu_impl qcom_smmu_impl = {
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#define TBU_DBG_TIMEOUT_US 100
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#define TNX_TCR_CNTL 0x130
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#define TNX_TCR_CNTL_TBU_OT_CAPTURE_EN BIT(18)
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#define TNX_TCR_CNTL_ALWAYS_CAPTURE BIT(15)
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#define TNX_TCR_CNTL_MATCH_MASK_UPD BIT(7)
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#define TNX_TCR_CNTL_MATCH_MASK_VALID BIT(6)
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#define CAPTURE1_SNAPSHOT_1 0x138
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#define TNX_TCR_CNTL_2 0x178
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#define TNX_TCR_CNTL_2_CAP1_VALID BIT(0)
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struct actlr_setting {
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struct arm_smmu_smr smr;
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@ -426,6 +417,10 @@ static struct qsmmuv500_tbu_device *qsmmuv500_find_tbu(
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static DEFINE_MUTEX(capture_reg_lock);
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static DEFINE_SPINLOCK(testbus_lock);
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#ifdef CONFIG_IOMMU_DEBUGFS
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static struct dentry *debugfs_capturebus_dir;
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#endif
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#ifdef CONFIG_ARM_SMMU_TESTBUS_DEBUGFS
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static struct dentry *debugfs_testbus_dir;
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@ -829,6 +824,325 @@ bug:
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BUG_ON(IS_ENABLED(CONFIG_IOMMU_TLBSYNC_DEBUG));
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}
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static ssize_t arm_smmu_debug_capturebus_snapshot_read(struct file *file,
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char __user *ubuf, size_t count, loff_t *offset)
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{
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struct qsmmuv500_tbu_device *tbu = file->private_data;
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struct arm_smmu_device *smmu = tbu->smmu;
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void __iomem *tbu_base = tbu->base;
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u64 snapshot[NO_OF_CAPTURE_POINTS][REGS_PER_CAPTURE_POINT];
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char buf[400];
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ssize_t retval;
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size_t buflen;
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int buf_len = sizeof(buf);
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int i, j;
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if (*offset)
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return 0;
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memset(buf, 0, buf_len);
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if (arm_smmu_power_on(smmu->pwr))
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return -EINVAL;
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if (arm_smmu_power_on(tbu->pwr)) {
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arm_smmu_power_off(smmu, smmu->pwr);
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return -EINVAL;
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}
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if (!mutex_trylock(&capture_reg_lock)) {
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dev_warn_ratelimited(smmu->dev,
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"capture bus regs in use, not dumping it.\n");
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return -EBUSY;
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}
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arm_smmu_debug_get_capture_snapshot(tbu_base, snapshot);
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mutex_unlock(&capture_reg_lock);
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arm_smmu_power_off(tbu->smmu, tbu->pwr);
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arm_smmu_power_off(smmu, smmu->pwr);
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for (i = 0; i < NO_OF_CAPTURE_POINTS ; ++i) {
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for (j = 0; j < REGS_PER_CAPTURE_POINT; ++j) {
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scnprintf(buf + strlen(buf), buf_len - strlen(buf),
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"Capture_%d_Snapshot_%d : 0x%0llx\n",
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i+1, j+1, snapshot[i][j]);
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}
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}
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buflen = min(count, strlen(buf));
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if (copy_to_user(ubuf, buf, buflen)) {
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dev_err_ratelimited(smmu->dev, "Couldn't copy_to_user\n");
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retval = -EFAULT;
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} else {
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*offset = 1;
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retval = buflen;
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}
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return retval;
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}
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static const struct file_operations arm_smmu_debug_capturebus_snapshot_fops = {
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.open = simple_open,
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.read = arm_smmu_debug_capturebus_snapshot_read,
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};
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static ssize_t arm_smmu_debug_capturebus_config_write(struct file *file,
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const char __user *ubuf, size_t count, loff_t *offset)
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{
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struct qsmmuv500_tbu_device *tbu = file->private_data;
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struct arm_smmu_device *smmu = tbu->smmu;
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void __iomem *tbu_base = tbu->base;
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char *comma1, *comma2;
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char buf[100];
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u64 sel, mask, match, val;
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if (count >= sizeof(buf)) {
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dev_err_ratelimited(smmu->dev, "Input too large\n");
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goto invalid_format;
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}
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memset(buf, 0, sizeof(buf));
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if (copy_from_user(buf, ubuf, count)) {
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dev_err_ratelimited(smmu->dev, "Couldn't copy from user\n");
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return -EFAULT;
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}
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comma1 = strnchr(buf, count, ',');
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if (!comma1)
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goto invalid_format;
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*comma1 = '\0';
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if (kstrtou64(buf, 0, &sel))
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goto invalid_format;
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if (sel > 4) {
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goto invalid_format;
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} else if (sel == 4) {
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if (kstrtou64(comma1 + 1, 0, &val))
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goto invalid_format;
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goto program_capturebus;
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}
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comma2 = strnchr(comma1 + 1, count, ',');
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if (!comma2)
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goto invalid_format;
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/* split up the words */
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*comma2 = '\0';
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if (kstrtou64(comma1 + 1, 0, &mask))
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goto invalid_format;
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if (kstrtou64(comma2 + 1, 0, &match))
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goto invalid_format;
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program_capturebus:
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if (arm_smmu_power_on(smmu->pwr))
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return -EINVAL;
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if (arm_smmu_power_on(tbu->pwr)) {
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arm_smmu_power_off(smmu, smmu->pwr);
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return -EINVAL;
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}
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if (!mutex_trylock(&capture_reg_lock)) {
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dev_warn_ratelimited(smmu->dev,
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"capture bus regs in use, not configuring it.\n");
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return -EBUSY;
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}
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if (sel == 4)
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arm_smmu_debug_set_tnx_tcr_cntl(tbu_base, val);
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else
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arm_smmu_debug_set_mask_and_match(tbu_base, sel, mask, match);
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mutex_unlock(&capture_reg_lock);
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arm_smmu_power_off(tbu->smmu, tbu->pwr);
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arm_smmu_power_off(smmu, smmu->pwr);
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return count;
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invalid_format:
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dev_err_ratelimited(smmu->dev, "Invalid format\n");
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dev_err_ratelimited(smmu->dev,
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"Expected:<1/2/3,Mask,Match> <4,TNX_TCR_CNTL>\n");
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return -EINVAL;
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}
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static ssize_t arm_smmu_debug_capturebus_config_read(struct file *file,
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char __user *ubuf, size_t count, loff_t *offset)
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{
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struct qsmmuv500_tbu_device *tbu = file->private_data;
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struct arm_smmu_device *smmu = tbu->smmu;
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void __iomem *tbu_base = tbu->base;
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u64 val;
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u64 mask[NO_OF_MASK_AND_MATCH], match[NO_OF_MASK_AND_MATCH];
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char buf[400];
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ssize_t retval;
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size_t buflen;
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int buf_len = sizeof(buf);
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int i;
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if (*offset)
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return 0;
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memset(buf, 0, buf_len);
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if (arm_smmu_power_on(smmu->pwr))
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return -EINVAL;
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if (arm_smmu_power_on(tbu->pwr)) {
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arm_smmu_power_off(smmu, smmu->pwr);
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return -EINVAL;
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}
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if (!mutex_trylock(&capture_reg_lock)) {
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dev_warn_ratelimited(smmu->dev,
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"capture bus regs in use, not configuring it.\n");
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return -EBUSY;
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}
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arm_smmu_debug_get_mask_and_match(tbu_base,
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mask, match);
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val = arm_smmu_debug_get_tnx_tcr_cntl(tbu_base);
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mutex_unlock(&capture_reg_lock);
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arm_smmu_power_off(tbu->smmu, tbu->pwr);
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arm_smmu_power_off(smmu, smmu->pwr);
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for (i = 0; i < NO_OF_MASK_AND_MATCH; ++i) {
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scnprintf(buf + strlen(buf), buf_len - strlen(buf),
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"Mask_%d : 0x%0llx\t", i+1, mask[i]);
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scnprintf(buf + strlen(buf), buf_len - strlen(buf),
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"Match_%d : 0x%0llx\n", i+1, match[i]);
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}
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scnprintf(buf + strlen(buf), buf_len - strlen(buf), "0x%0lx\n", val);
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buflen = min(count, strlen(buf));
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if (copy_to_user(ubuf, buf, buflen)) {
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dev_err_ratelimited(smmu->dev, "Couldn't copy_to_user\n");
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retval = -EFAULT;
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} else {
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*offset = 1;
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retval = buflen;
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}
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return retval;
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}
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static const struct file_operations arm_smmu_debug_capturebus_config_fops = {
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.open = simple_open,
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.write = arm_smmu_debug_capturebus_config_write,
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.read = arm_smmu_debug_capturebus_config_read,
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};
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#ifdef CONFIG_IOMMU_DEBUGFS
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static int qsmmuv500_capturebus_init(struct qsmmuv500_tbu_device *tbu)
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{
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struct dentry *capturebus_dir;
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if (!iommu_debugfs_dir)
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return 0;
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if (!debugfs_capturebus_dir) {
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debugfs_capturebus_dir = debugfs_create_dir(
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"capturebus", iommu_debugfs_dir);
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if (IS_ERR(debugfs_capturebus_dir)) {
|
||||
dev_err_ratelimited(tbu->dev, "Couldn't create iommu/capturebus debugfs directory\n");
|
||||
return PTR_ERR(debugfs_capturebus_dir);
|
||||
}
|
||||
}
|
||||
|
||||
capturebus_dir = debugfs_create_dir(dev_name(tbu->dev),
|
||||
debugfs_capturebus_dir);
|
||||
if (IS_ERR(capturebus_dir)) {
|
||||
dev_err_ratelimited(tbu->dev, "Couldn't create iommu/capturebus/%s debugfs directory\n",
|
||||
dev_name(tbu->dev));
|
||||
goto err;
|
||||
}
|
||||
|
||||
if (IS_ERR(debugfs_create_file("config", 0400, capturebus_dir, tbu,
|
||||
&arm_smmu_debug_capturebus_config_fops))) {
|
||||
dev_err_ratelimited(tbu->dev, "Couldn't create iommu/capturebus/%s/config debugfs file\n",
|
||||
dev_name(tbu->dev));
|
||||
goto err_rmdir;
|
||||
}
|
||||
|
||||
if (IS_ERR(debugfs_create_file("snapshot", 0400, capturebus_dir, tbu,
|
||||
&arm_smmu_debug_capturebus_snapshot_fops))) {
|
||||
dev_err_ratelimited(tbu->dev, "Couldn't create iommu/capturebus/%s/snapshot debugfs file\n",
|
||||
dev_name(tbu->dev));
|
||||
goto err_rmdir;
|
||||
}
|
||||
return 0;
|
||||
err_rmdir:
|
||||
debugfs_remove_recursive(capturebus_dir);
|
||||
err:
|
||||
return -ENODEV;
|
||||
}
|
||||
#else
|
||||
static int qsmmuv500_capturebus_init(struct qsmmuv500_tbu_device *tbu)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static irqreturn_t arm_smmu_debug_capture_bus_match(int irq, void *dev)
|
||||
{
|
||||
struct qsmmuv500_tbu_device *tbu = dev;
|
||||
struct arm_smmu_device *smmu = tbu->smmu;
|
||||
void __iomem *tbu_base = tbu->base;
|
||||
u64 mask[NO_OF_MASK_AND_MATCH], match[NO_OF_MASK_AND_MATCH];
|
||||
u64 snapshot[NO_OF_CAPTURE_POINTS][REGS_PER_CAPTURE_POINT];
|
||||
int i, j;
|
||||
u64 val;
|
||||
|
||||
if (arm_smmu_power_on(smmu->pwr))
|
||||
return IRQ_NONE;
|
||||
|
||||
if (arm_smmu_power_on(tbu->pwr)) {
|
||||
arm_smmu_power_off(smmu, smmu->pwr);
|
||||
return IRQ_NONE;
|
||||
}
|
||||
|
||||
if (!mutex_trylock(&capture_reg_lock)) {
|
||||
dev_warn_ratelimited(smmu->dev,
|
||||
"capture bus regs in use, not dumping it.\n");
|
||||
return IRQ_NONE;
|
||||
}
|
||||
|
||||
val = arm_smmu_debug_get_tnx_tcr_cntl(tbu_base);
|
||||
arm_smmu_debug_get_mask_and_match(tbu_base, mask, match);
|
||||
arm_smmu_debug_get_capture_snapshot(tbu_base, snapshot);
|
||||
arm_smmu_debug_clear_intr_and_validbits(tbu_base);
|
||||
|
||||
mutex_unlock(&capture_reg_lock);
|
||||
arm_smmu_power_off(tbu->smmu, tbu->pwr);
|
||||
arm_smmu_power_off(smmu, smmu->pwr);
|
||||
|
||||
dev_info(tbu->dev, "TNX_TCR_CNTL : 0x%0llx\n", val);
|
||||
|
||||
for (i = 0; i < NO_OF_MASK_AND_MATCH; ++i) {
|
||||
dev_info(tbu->dev,
|
||||
"Mask_%d : 0x%0llx\n", i+1, mask[i]);
|
||||
dev_info(tbu->dev,
|
||||
"Match_%d : 0x%0llx\n", i+1, match[i]);
|
||||
}
|
||||
|
||||
for (i = 0; i < NO_OF_CAPTURE_POINTS ; ++i) {
|
||||
for (j = 0; j < REGS_PER_CAPTURE_POINT; ++j) {
|
||||
dev_info(tbu->dev,
|
||||
"Capture_%d_Snapshot_%d : 0x%0llx\n",
|
||||
i+1, j+1, snapshot[i][j]);
|
||||
}
|
||||
}
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static void qsmmuv500_tlb_sync_timeout(struct arm_smmu_device *smmu)
|
||||
{
|
||||
u32 sync_inv_ack, tbu_pwr_status, sync_inv_progress;
|
||||
|
|
@ -1385,8 +1699,11 @@ static void qsmmuv500_init_cb(struct arm_smmu_domain *smmu_domain,
|
|||
|
||||
static int qsmmuv500_tbu_register(struct device *dev, void *cookie)
|
||||
{
|
||||
struct resource *res;
|
||||
struct qsmmuv500_tbu_device *tbu;
|
||||
struct qsmmuv500_archdata *data = cookie;
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
int i, err, num_irqs = 0;
|
||||
|
||||
if (!dev->driver) {
|
||||
dev_err(dev, "TBU failed probe, QSMMUV500 cannot continue!\n");
|
||||
|
|
@ -1399,7 +1716,36 @@ static int qsmmuv500_tbu_register(struct device *dev, void *cookie)
|
|||
tbu->smmu = &data->smmu;
|
||||
list_add(&tbu->list, &data->tbus);
|
||||
|
||||
while ((res = platform_get_resource(pdev, IORESOURCE_IRQ, num_irqs)))
|
||||
num_irqs++;
|
||||
|
||||
tbu->irqs = devm_kzalloc(dev, sizeof(*tbu->irqs) * num_irqs,
|
||||
GFP_KERNEL);
|
||||
if (!tbu->irqs)
|
||||
return -ENOMEM;
|
||||
|
||||
for (i = 0; i < num_irqs; ++i) {
|
||||
int irq = platform_get_irq(pdev, i);
|
||||
|
||||
if (irq < 0) {
|
||||
dev_err(dev, "failed to get irq index %d\n", i);
|
||||
return -ENODEV;
|
||||
}
|
||||
tbu->irqs[i] = irq;
|
||||
|
||||
err = devm_request_threaded_irq(tbu->dev, tbu->irqs[i],
|
||||
NULL, arm_smmu_debug_capture_bus_match,
|
||||
IRQF_ONESHOT | IRQF_SHARED,
|
||||
"capture bus", tbu);
|
||||
if (err) {
|
||||
dev_err(dev, "failed to request capture bus irq%d (%u)\n",
|
||||
i, tbu->irqs[i]);
|
||||
return err;
|
||||
}
|
||||
}
|
||||
|
||||
qsmmuv500_tbu_testbus_init(tbu);
|
||||
qsmmuv500_capturebus_init(tbu);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -418,6 +418,7 @@ struct qsmmuv500_tbu_device {
|
|||
/* Protects halt count */
|
||||
spinlock_t halt_lock;
|
||||
u32 halt_count;
|
||||
unsigned int *irqs;
|
||||
};
|
||||
|
||||
struct arm_smmu_master_cfg {
|
||||
|
|
|
|||
Loading…
Reference in a new issue