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[ARM] 4487/1: ns9xxx: complete definition of GPIO related registers

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I changed the naming to be more obvious---unfortunately the HRM
doesn't specify these.

Moreover the numbering is changed to be zero indexed as this is more
natural.

Adjust all callers.

Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Russell King <[email protected]>
This commit is contained in:
Uwe Kleine-König 2007-07-17 22:36:09 +01:00 • committed by Russell King
commit 3945a567d0
2 changed files with 27 additions and 4 deletions
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3
arch/arm/mach-ns9xxx/board-a9m9750dev.c
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@ -91,7 +91,7 @@ void __init board_a9m9750dev_init_irq(void)
* use GPIO 11, because GPIO 32 is used for the LCD
*/
/* XXX: proper GPIO handling */
BBU_GC(2) &= ~0x2000;
BBU_GCONFb1(1) &= ~0x2000;
for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) {
set_irq_chip(i, &a9m9750dev_fpga_chip);
@ -196,4 +196,3 @@ void __init board_a9m9750dev_init_machine(void)
platform_add_devices(board_a9m9750dev_devices,
ARRAY_SIZE(board_a9m9750dev_devices));
}