mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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ARM: SoC driver updates for v5.4
The branch contains driver changes that are tightly connected to SoC specific code. Aside from smaller cleanups and bug fixes, here is a list of the notable changes. New device drivers: - The Turris Mox router has a new "moxtet" bus driver for its on-board pluggable extension bus. The same platform also gains a firmware driver. - The Samsung Exynos family gains a new Chipid driver exporting using the soc device sysfs interface - A similar socinfo driver for Qualcomm Snapdragon chips. - A firmware driver for the NXP i.MX DSP IPC protocol using shared memory and a mailbox Other changes: - The i.MX reset controller driver now supports the NXP i.MX8MM chip - Amlogic SoC specific drivers gain support for the S905X3 and A311D chips - A rework of the TI Davinci framebuffer driver to allow important cleanups in the platform code - A couple of device drivers for removed ARM SoC platforms are removed. Most of the removals were picked up by other maintainers, this contains whatever was left. Signed-off-by: Arnd Bergmann <[email protected]> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJdf6SUAAoJEJpsee/mABjZAfwP/01bXBOlGVusNH2zuh8IUSHb //5sTdWpwa2ugRekLOJUOjo2p9Fu70yH6xr4RUHI0rcRjZA0xR3bZPx45gI8LRHQ tfb25LaKqfgZjWMCJ8due1Lh7B6ffOQukryMtM/LoiCtqsy7b6aThEKaLpM9/Owl t53o4wKaVQJK5He9JQom9NOZidkl7tYLHmDQTOXhX2UEA/i45vtfjdsEBvoFPbTx +bYvlqs+SWlpDJk29j+oBOeKadPF+TFboLDiUCxH44MC3OsH51zjtKVBRTtbNMkb ek/ci5x9hCeHcYSEigNq2EMzEln09Yxyvjk8U/jLiJ1h1kz3p5MjqJbVMF1rYXpe ALuAwinM8Zv2o5/UOCkiQTWq79PtpOKHZKpNBXkaJ8kyqBLMSy8Fs3hCvXrDnjnQ TC8jX7UBqHRV2rbQIYehAQAxTvcRgTbqusQGLkUJInlux6go57LoMYHPABpHftJV kRdVeT0KzdCz1pvQwyekIog5hPLNTBi4jw6eQcOgeENvAea1MJa8lMMfKcVbIdS0 ZVvxLl+K6noEKAv5lSeHAzjXq+cQFr3zDCsWy351mJETDHmE8zjsaHN1SgbRYLEk ZqzNwUYaPYBis38g85qaY/TSsJrWJ+jP8u7s9HTw3Oywg8SRy5vtW177s00/9VOd PYZ2UpqUeX8cdvggqUUU =lxFi -----END PGP SIGNATURE----- Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "This contains driver changes that are tightly connected to SoC specific code. Aside from smaller cleanups and bug fixes, here is a list of the notable changes. New device drivers: - The Turris Mox router has a new "moxtet" bus driver for its on-board pluggable extension bus. The same platform also gains a firmware driver. - The Samsung Exynos family gains a new Chipid driver exporting using the soc device sysfs interface - A similar socinfo driver for Qualcomm Snapdragon chips. - A firmware driver for the NXP i.MX DSP IPC protocol using shared memory and a mailbox Other changes: - The i.MX reset controller driver now supports the NXP i.MX8MM chip - Amlogic SoC specific drivers gain support for the S905X3 and A311D chips - A rework of the TI Davinci framebuffer driver to allow important cleanups in the platform code - A couple of device drivers for removed ARM SoC platforms are removed. Most of the removals were picked up by other maintainers, this contains whatever was left" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (123 commits) bus: uniphier-system-bus: use devm_platform_ioremap_resource() soc: ti: ti_sci_pm_domains: Add support for exclusive and shared access dt-bindings: ti_sci_pm_domains: Add support for exclusive and shared access firmware: ti_sci: Allow for device shared and exclusive requests bus: imx-weim: remove incorrect __init annotations fbdev: remove w90x900/nuc900 platform drivers spi: remove w90x900 driver net: remove w90p910-ether driver net: remove ks8695 driver firmware: turris-mox-rwtm: Add sysfs documentation firmware: Add Turris Mox rWTM firmware driver dt-bindings: firmware: Document cznic,turris-mox-rwtm binding bus: moxtet: fix unsigned comparison to less than zero bus: moxtet: remove set but not used variable 'dummy' ARM: scoop: Use the right include dt-bindings: power: add Amlogic Everything-Else power domains bindings soc: amlogic: Add support for Everything-Else power domains controller fbdev: da8xx: use resource management for dma fbdev: da8xx-fb: drop a redundant if fbdev: da8xx-fb: use devm_platform_ioremap_resource() ...
This commit is contained in:
commit
399eb9b6cb
128 changed files with 5409 additions and 4954 deletions
16
include/dt-bindings/bus/moxtet.h
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16
include/dt-bindings/bus/moxtet.h
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@ -0,0 +1,16 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Constant for device tree bindings for Turris Mox module configuration bus
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*
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* Copyright (C) 2019 Marek Behun <marek.behun@nic.cz>
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*/
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#ifndef _DT_BINDINGS_BUS_MOXTET_H
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#define _DT_BINDINGS_BUS_MOXTET_H
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#define MOXTET_IRQ_PCI 0
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#define MOXTET_IRQ_USB3 4
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#define MOXTET_IRQ_PERIDOT(n) (8 + (n))
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#define MOXTET_IRQ_TOPAZ 12
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#endif /* _DT_BINDINGS_BUS_MOXTET_H */
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13
include/dt-bindings/power/meson-g12a-power.h
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13
include/dt-bindings/power/meson-g12a-power.h
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@ -0,0 +1,13 @@
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/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
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/*
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* Copyright (c) 2019 BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#ifndef _DT_BINDINGS_MESON_G12A_POWER_H
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#define _DT_BINDINGS_MESON_G12A_POWER_H
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#define PWRC_G12A_VPU_ID 0
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#define PWRC_G12A_ETH_ID 1
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#endif
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18
include/dt-bindings/power/meson-sm1-power.h
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18
include/dt-bindings/power/meson-sm1-power.h
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@ -0,0 +1,18 @@
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/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
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/*
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* Copyright (c) 2019 BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#ifndef _DT_BINDINGS_MESON_SM1_POWER_H
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#define _DT_BINDINGS_MESON_SM1_POWER_H
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#define PWRC_SM1_VPU_ID 0
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#define PWRC_SM1_NNA_ID 1
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#define PWRC_SM1_USB_ID 2
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#define PWRC_SM1_PCIE_ID 3
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#define PWRC_SM1_GE2D_ID 4
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#define PWRC_SM1_AUDIO_ID 5
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#define PWRC_SM1_ETH_ID 6
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#endif
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@ -1,56 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
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/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright (c) 2016 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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* The full GNU General Public License is included in this distribution
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* in the file called COPYING.
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*
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* BSD LICENSE
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*
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* Copyright (c) 2016 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H
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#define _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H
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@ -1,56 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
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/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright (c) 2016 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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* The full GNU General Public License is included in this distribution
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* in the file called COPYING.
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*
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* BSD LICENSE
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*
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* Copyright (c) 2016 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DT_BINDINGS_AMLOGIC_MESON8B_RESET_H
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#define _DT_BINDINGS_AMLOGIC_MESON8B_RESET_H
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@ -31,33 +31,33 @@
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#define IMX8MQ_RESET_OTG2_PHY_RESET 20
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#define IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N 21
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#define IMX8MQ_RESET_MIPI_DSI_RESET_N 22
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#define IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N 23
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#define IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N 24
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#define IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N 25
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#define IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N 23
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#define IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N 24
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#define IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N 25
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#define IMX8MQ_RESET_PCIEPHY 26
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#define IMX8MQ_RESET_PCIEPHY_PERST 27
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#define IMX8MQ_RESET_PCIE_CTRL_APPS_EN 28
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#define IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF 29
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#define IMX8MQ_RESET_HDMI_PHY_APB_RESET 30
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#define IMX8MQ_RESET_HDMI_PHY_APB_RESET 30 /* i.MX8MM does NOT support */
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#define IMX8MQ_RESET_DISP_RESET 31
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#define IMX8MQ_RESET_GPU_RESET 32
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#define IMX8MQ_RESET_VPU_RESET 33
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#define IMX8MQ_RESET_PCIEPHY2 34
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#define IMX8MQ_RESET_PCIEPHY2_PERST 35
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#define IMX8MQ_RESET_PCIE2_CTRL_APPS_EN 36
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#define IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF 37
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#define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET 38
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#define IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET 39
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#define IMX8MQ_RESET_MIPI_CSI1_ESC_RESET 40
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#define IMX8MQ_RESET_MIPI_CSI2_CORE_RESET 41
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#define IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET 42
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#define IMX8MQ_RESET_MIPI_CSI2_ESC_RESET 43
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#define IMX8MQ_RESET_PCIEPHY2 34 /* i.MX8MM does NOT support */
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#define IMX8MQ_RESET_PCIEPHY2_PERST 35 /* i.MX8MM does NOT support */
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#define IMX8MQ_RESET_PCIE2_CTRL_APPS_EN 36 /* i.MX8MM does NOT support */
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#define IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF 37 /* i.MX8MM does NOT support */
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#define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET 38 /* i.MX8MM does NOT support */
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#define IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET 39 /* i.MX8MM does NOT support */
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#define IMX8MQ_RESET_MIPI_CSI1_ESC_RESET 40 /* i.MX8MM does NOT support */
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#define IMX8MQ_RESET_MIPI_CSI2_CORE_RESET 41 /* i.MX8MM does NOT support */
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#define IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET 42 /* i.MX8MM does NOT support */
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#define IMX8MQ_RESET_MIPI_CSI2_ESC_RESET 43 /* i.MX8MM does NOT support */
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#define IMX8MQ_RESET_DDRC1_PRST 44
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#define IMX8MQ_RESET_DDRC1_CORE_RESET 45
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#define IMX8MQ_RESET_DDRC1_PHY_RESET 46
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#define IMX8MQ_RESET_DDRC2_PRST 47
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#define IMX8MQ_RESET_DDRC2_CORE_RESET 48
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#define IMX8MQ_RESET_DDRC2_PHY_RESET 49
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#define IMX8MQ_RESET_DDRC2_PRST 47 /* i.MX8MM does NOT support */
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#define IMX8MQ_RESET_DDRC2_CORE_RESET 48 /* i.MX8MM does NOT support */
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#define IMX8MQ_RESET_DDRC2_PHY_RESET 49 /* i.MX8MM does NOT support */
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#define IMX8MQ_RESET_NUM 50
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9
include/dt-bindings/soc/ti,sci_pm_domain.h
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9
include/dt-bindings/soc/ti,sci_pm_domain.h
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@ -0,0 +1,9 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __DT_BINDINGS_TI_SCI_PM_DOMAIN_H
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#define __DT_BINDINGS_TI_SCI_PM_DOMAIN_H
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#define TI_SCI_PD_EXCLUSIVE 1
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#define TI_SCI_PD_SHARED 0
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#endif /* __DT_BINDINGS_TI_SCI_PM_DOMAIN_H */
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