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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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soc: pinctrl-lpi: add changes to support slew rate config
Add changes to read slew rate from device tree table and set the same under set configs list. Change-Id: I0d7e950d67d34b63c5a6436bb4d10b08a80c2c58 Signed-off-by: Karthikeyan Mani <kmani@codeaurora.org>
This commit is contained in:
Karthikeyan Mani
parent
52bdcf758c
commit
39b70f5ff2
1 changed files with 134 additions and 43 deletions
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
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* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
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*/
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#include <linux/gpio.h>
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@ -14,6 +14,7 @@
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#include <linux/slab.h>
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#include <linux/types.h>
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#include <linux/clk.h>
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#include <linux/bitops.h>
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#include <soc/snd_event.h>
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#include <linux/pm_runtime.h>
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#include <dsp/audio_notifier.h>
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@ -21,39 +22,45 @@
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#include "core.h"
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#include "pinctrl-utils.h"
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#define LPI_AUTO_SUSPEND_DELAY 100 /* delay in msec */
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#define LPI_AUTO_SUSPEND_DELAY 100 /* delay in msec */
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#define LPI_ADDRESS_SIZE 0x20000
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#define LPI_ADDRESS_SIZE 0x20000
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#define LPI_SLEW_ADDRESS_SIZE 0x1000
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#define LPI_GPIO_REG_VAL_CTL 0x00
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#define LPI_GPIO_REG_DIR_CTL 0x04
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#define LPI_GPIO_REG_VAL_CTL 0x00
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#define LPI_GPIO_REG_DIR_CTL 0x04
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#define LPI_GPIO_REG_PULL_SHIFT 0x0
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#define LPI_GPIO_REG_PULL_MASK 0x3
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#define LPI_SLEW_REG_VAL_CTL 0x00
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#define LPI_SLEW_RATE_MAX 0x03
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#define LPI_SLEW_BITS_SIZE 0x02
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#define LPI_SLEW_OFFSET_INVALID 0xFFFFFFFF
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#define LPI_GPIO_REG_FUNCTION_SHIFT 0x2
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#define LPI_GPIO_REG_FUNCTION_MASK 0x3C
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#define LPI_GPIO_REG_PULL_SHIFT 0x0
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#define LPI_GPIO_REG_PULL_MASK 0x3
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#define LPI_GPIO_REG_OUT_STRENGTH_SHIFT 0x6
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#define LPI_GPIO_REG_OUT_STRENGTH_MASK 0x1C0
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#define LPI_GPIO_REG_FUNCTION_SHIFT 0x2
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#define LPI_GPIO_REG_FUNCTION_MASK 0x3C
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#define LPI_GPIO_REG_OE_SHIFT 0x9
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#define LPI_GPIO_REG_OE_MASK 0x200
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#define LPI_GPIO_REG_OUT_STRENGTH_SHIFT 0x6
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#define LPI_GPIO_REG_OUT_STRENGTH_MASK 0x1C0
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#define LPI_GPIO_REG_DIR_SHIFT 0x1
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#define LPI_GPIO_REG_DIR_MASK 0x2
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#define LPI_GPIO_REG_OE_SHIFT 0x9
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#define LPI_GPIO_REG_OE_MASK 0x200
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#define LPI_GPIO_BIAS_DISABLE 0x0
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#define LPI_GPIO_PULL_DOWN 0x1
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#define LPI_GPIO_KEEPER 0x2
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#define LPI_GPIO_PULL_UP 0x3
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#define LPI_GPIO_REG_DIR_SHIFT 0x1
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#define LPI_GPIO_REG_DIR_MASK 0x2
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#define LPI_GPIO_FUNC_GPIO "gpio"
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#define LPI_GPIO_FUNC_FUNC1 "func1"
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#define LPI_GPIO_FUNC_FUNC2 "func2"
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#define LPI_GPIO_FUNC_FUNC3 "func3"
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#define LPI_GPIO_FUNC_FUNC4 "func4"
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#define LPI_GPIO_FUNC_FUNC5 "func5"
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#define LPI_GPIO_BIAS_DISABLE 0x0
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#define LPI_GPIO_PULL_DOWN 0x1
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#define LPI_GPIO_KEEPER 0x2
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#define LPI_GPIO_PULL_UP 0x3
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#define LPI_GPIO_FUNC_GPIO "gpio"
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#define LPI_GPIO_FUNC_FUNC1 "func1"
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#define LPI_GPIO_FUNC_FUNC2 "func2"
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#define LPI_GPIO_FUNC_FUNC3 "func3"
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#define LPI_GPIO_FUNC_FUNC4 "func4"
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#define LPI_GPIO_FUNC_FUNC5 "func5"
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static bool lpi_dev_up;
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static struct device *lpi_dev;
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@ -70,30 +77,39 @@ enum lpi_gpio_func_index {
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/**
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* struct lpi_gpio_pad - keep current GPIO settings
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* @offset: Nth GPIO in supported GPIOs.
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* @offset: stores one of gpio_offset or slew_offset at a given time.
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* @gpio_offset: Nth GPIO in supported GPIOs.
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* @slew_offset: Nth GPIO's position in slew register in supported GPIOs.
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* @output_enabled: Set to true if GPIO output logic is enabled.
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* @value: value of a pin
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* @base: Address base of LPI GPIO PAD.
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* @base: stores one of gpio_base or slew_base at a given time.
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* @gpio_base: Address base of LPI GPIO PAD.
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* @slew_base: Address base of LPI SLEW PAD.
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* @pullup: Constant current which flow through GPIO output buffer.
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* @strength: No, Low, Medium, High
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* @function: See lpi_gpio_functions[]
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*/
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struct lpi_gpio_pad {
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u32 offset;
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bool output_enabled;
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bool value;
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char __iomem *base;
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unsigned int pullup;
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unsigned int strength;
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unsigned int function;
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u32 offset;
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u32 gpio_offset;
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u32 slew_offset;
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bool output_enabled;
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bool value;
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char __iomem *base;
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char __iomem *gpio_base;
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char __iomem *slew_base;
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unsigned int pullup;
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unsigned int strength;
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unsigned int function;
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};
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struct lpi_gpio_state {
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struct device *dev;
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struct pinctrl_dev *ctrl;
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struct gpio_chip chip;
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char __iomem *base;
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struct clk *lpass_npa_rsc_island;
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struct device *dev;
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struct pinctrl_dev *ctrl;
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struct gpio_chip chip;
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char __iomem *base;
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struct clk *lpass_npa_rsc_island;
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struct mutex slew_access_lock;
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};
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static const char *const lpi_gpio_groups[] = {
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@ -106,6 +122,7 @@ static const char *const lpi_gpio_groups[] = {
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#define LPI_TLMM_MAX_PINS 100
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static u32 lpi_offset[LPI_TLMM_MAX_PINS];
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static u32 lpi_slew_offset[LPI_TLMM_MAX_PINS];
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static const char *const lpi_gpio_functions[] = {
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[LPI_GPIO_FUNC_INDEX_GPIO] = LPI_GPIO_FUNC_GPIO,
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@ -272,7 +289,9 @@ static int lpi_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
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{
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struct lpi_gpio_pad *pad;
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unsigned int param, arg;
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int i, ret = 0, val;
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int i, ret = 0;
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volatile unsigned long val;
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struct lpi_gpio_state *state = dev_get_drvdata(pctldev->dev);
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pad = pctldev->desc->pins[pin].drv_data;
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@ -306,12 +325,44 @@ static int lpi_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
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case PIN_CONFIG_DRIVE_STRENGTH:
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pad->strength = arg;
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break;
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case PIN_CONFIG_SLEW_RATE:
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if (pad->slew_base == NULL ||
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pad->slew_offset == LPI_SLEW_OFFSET_INVALID) {
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dev_dbg(pctldev->dev, "%s: invalid slew settings for pin: %d\n",
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__func__, pin);
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goto set_gpio;
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}
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if (arg > LPI_SLEW_RATE_MAX) {
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dev_err(pctldev->dev, "%s: invalid slew rate %u for pin: %d\n",
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__func__, arg, pin);
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goto set_gpio;
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}
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pad->base = pad->slew_base;
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pad->offset = 0;
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mutex_lock(&state->slew_access_lock);
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val = lpi_gpio_read(pad, LPI_SLEW_REG_VAL_CTL);
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pad->offset = pad->slew_offset;
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for (i = 0; i < LPI_SLEW_BITS_SIZE; i++) {
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if (arg & 0x01)
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set_bit(pad->offset, &val);
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else
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clear_bit(pad->offset, &val);
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pad->offset++;
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arg = arg >> 1;
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}
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pad->offset = 0;
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lpi_gpio_write(pad, LPI_SLEW_REG_VAL_CTL, val);
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mutex_unlock(&state->slew_access_lock);
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break;
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default:
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ret = -EINVAL;
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goto done;
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}
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}
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set_gpio:
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pad->base = pad->gpio_base;
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pad->offset = pad->gpio_offset;
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val = lpi_gpio_read(pad, LPI_GPIO_REG_VAL_CTL);
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val &= ~(LPI_GPIO_REG_PULL_MASK | LPI_GPIO_REG_OUT_STRENGTH_MASK |
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LPI_GPIO_REG_OE_MASK);
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@ -502,7 +553,8 @@ static int lpi_pinctrl_probe(struct platform_device *pdev)
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struct lpi_gpio_state *state;
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int ret, npins, i;
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char __iomem *lpi_base;
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u32 reg;
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char __iomem *slew_base;
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u32 reg, slew_reg;
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struct clk *lpass_npa_rsc_island = NULL;
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ret = of_property_read_u32(dev->of_node, "reg", ®);
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return ret;
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}
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ret = of_property_read_u32_array(dev->of_node,
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"qcom,lpi-slew-offset-tbl",
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lpi_slew_offset, npins);
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if (ret < 0) {
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for (i = 0; i < npins; i++)
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lpi_slew_offset[i] = LPI_SLEW_OFFSET_INVALID;
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dev_dbg(dev, "%s: error in reading lpi slew offset table: %d\n",
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__func__, ret);
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}
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state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL);
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if (!state)
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return -ENOMEM;
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@ -532,6 +594,23 @@ static int lpi_pinctrl_probe(struct platform_device *pdev)
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state->dev = &pdev->dev;
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slew_reg = 0;
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ret = of_property_read_u32(dev->of_node, "qcom,slew-reg", &slew_reg);
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if (!ret) {
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slew_base = devm_ioremap(dev, slew_reg, LPI_SLEW_ADDRESS_SIZE);
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if (slew_base == NULL) {
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dev_err(dev,
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"%s devm_ioremap failed for slew rate reg\n",
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__func__);
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ret = -ENOMEM;
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goto err_io;
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}
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} else {
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slew_base = NULL;
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dev_dbg(dev, "error in reading lpi slew register: %d\n",
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__func__, ret);
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}
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pindesc = devm_kcalloc(dev, npins, sizeof(*pindesc), GFP_KERNEL);
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if (!pindesc)
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return -ENOMEM;
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@ -566,8 +645,13 @@ static int lpi_pinctrl_probe(struct platform_device *pdev)
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pindesc->number = i;
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pindesc->name = lpi_gpio_groups[i];
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pad->base = lpi_base;
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pad->offset = lpi_offset[i];
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pad->gpio_base = lpi_base;
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pad->slew_base = slew_base;
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pad->base = pad->gpio_base;
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pad->gpio_offset = lpi_offset[i];
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pad->slew_offset = lpi_slew_offset[i];
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pad->offset = pad->gpio_offset;
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}
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state->chip = lpi_gpio_template;
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@ -578,6 +662,8 @@ static int lpi_pinctrl_probe(struct platform_device *pdev)
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state->chip.of_gpio_n_cells = 2;
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state->chip.can_sleep = false;
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mutex_init(&state->slew_access_lock);
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state->ctrl = devm_pinctrl_register(dev, pctrldesc, state);
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if (IS_ERR(state->ctrl))
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return PTR_ERR(state->ctrl);
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@ -636,18 +722,23 @@ err_snd_evt:
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err_range:
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gpiochip_remove(&state->chip);
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err_chip:
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mutex_destroy(&state->slew_access_lock);
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err_io:
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return ret;
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}
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static int lpi_pinctrl_remove(struct platform_device *pdev)
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{
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struct lpi_gpio_state *state = platform_get_drvdata(pdev);
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pm_runtime_disable(&pdev->dev);
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pm_runtime_set_suspended(&pdev->dev);
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snd_event_client_deregister(&pdev->dev);
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audio_notifier_deregister("lpi_tlmm");
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gpiochip_remove(&state->chip);
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mutex_destroy(&state->slew_access_lock);
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return 0;
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}
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