From 3a28d0464f9d37f1715b25e7172bf60ea143e1d3 Mon Sep 17 00:00:00 2001
From: Jagadeesh Kona <jkona@codeaurora.org>
Date: Mon, 4 May 2020 16:24:17 +0530
Subject: [PATCH] clk: qcom: gcc: Update voltage voting Support for GCC CPUSS
 AHB clock

Add voltage voting support for GCC CPUSS AHB clock upto 100MHz.

Change-Id: I87c06750355c51c3211dc42cb93a87c933870f6b
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
---
 drivers/clk/qcom/gcc-shima.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/gcc-shima.c b/drivers/clk/qcom/gcc-shima.c
index 4b85be3c521e..742b3b53a4d5 100644
--- a/drivers/clk/qcom/gcc-shima.c
+++ b/drivers/clk/qcom/gcc-shima.c
@@ -484,7 +484,8 @@ static struct clk_rcg2 gcc_cpuss_ahb_clk_src = {
 		.num_rate_max = VDD_NUM,
 		.rate_max = (unsigned long[VDD_NUM]) {
 			[VDD_LOWER] = 19200000,
-		},
+			[VDD_LOW] = 50000000,
+			[VDD_NOMINAL] = 100000000},
 	},
 };