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spi: dw: round up result of calculation for clock divider
Avoid ending up with a higher frequency than requested Signed-off-by: Matthias Seidel <[email protected]> Signed-off-by: Mark Brown <[email protected]>
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1 changed files with 1 additions and 1 deletions
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@ -300,7 +300,7 @@ static int dw_spi_transfer_one(struct spi_master *master,
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if (transfer->speed_hz != dws->current_freq) {
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if (transfer->speed_hz != chip->speed_hz) {
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/* clk_div doesn't support odd number */
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chip->clk_div = (dws->max_freq / transfer->speed_hz + 1) & 0xfffe;
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chip->clk_div = (DIV_ROUND_UP(dws->max_freq, transfer->speed_hz) + 1) & 0xfffe;
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chip->speed_hz = transfer->speed_hz;
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}
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dws->current_freq = transfer->speed_hz;
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