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da8xx-fb: cleanup LCDC configurations

Browse source 
Configure below LCDC configurations to optimal values, also have an
option configure these optional parameters for platform.
1) AC bias configuration: Required only for passive panels
2) Dma_burst_size:
3) FIFO_DMA_DELAY:
4) FIFO threshold: Does not apply for da830 LCDC.

Patch is verified for 16bpp and 24bpp configurations on da830, da850 and
am335x EVMs.

Signed-off-by: Manjunathappa, Prakash <[email protected]>
Signed-off-by: Tomi Valkeinen <[email protected]>
This commit is contained in:
Manjunathappa, Prakash 2012-10-16 10:23:16 +05:30 • committed by Tomi Valkeinen
commit 3b43ad201d
3 changed files with 19 additions and 68 deletions
Download patch file Download diff file Expand all files Collapse all files

22
include/video/da8xx-fb.h
View file

@ -12,10 +12,6 @@
#ifndef DA8XX_FB_H
#define DA8XX_FB_H
enum panel_type {
QVGA = 0
};
enum panel_shade {
MONOCHROME = 0,
COLOR_ACTIVE,
@ -27,13 +23,6 @@ enum raster_load_mode {
LOAD_PALETTE,
};
struct display_panel {
enum panel_type panel_type; /* QVGA */
int max_bpp;
int min_bpp;
enum panel_shade panel_shade;
};
struct da8xx_lcdc_platform_data {
const char manu_name[10];
void *controller_data;
@ -42,7 +31,7 @@ struct da8xx_lcdc_platform_data {
};
struct lcd_ctrl_config {
const struct display_panel *p_disp_panel;
enum panel_shade panel_shade;
/* AC Bias Pin Frequency */
int ac_bias;
@ -68,18 +57,9 @@ struct lcd_ctrl_config {
/* Mono 8-bit Mode: 1=D0-D7 or 0=D0-D3 */
unsigned char mono_8bit_mode;
/* Invert line clock */
unsigned char invert_line_clock;
/* Invert frame clock */
unsigned char invert_frm_clock;
/* Horizontal and Vertical Sync Edge: 0=rising 1=falling */
unsigned char sync_edge;
/* Horizontal and Vertical Sync: Control: 0=ignore */
unsigned char sync_ctrl;
/* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */
unsigned char raster_order;