mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-29 03:01:39 -04:00
PCI changes for the 3.5 merge window:
- Host bridge cleanups from Yinghai - Disable Bus Master bit on PCI device shutdown (kexec-related) - Stratus ftServer fix - pci_dev_reset() locking fix - IvyBridge graphics erratum workaround -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iQIcBAABAgAGBQJPumymAAoJEPGMOI97Hn6z9JUQALVh5UE/X+kg9CU63FGSwrRQ nMiQiOv4uX3K+QV7LJsx/wKlOu2AQuZvHbiDNn100865LlLvMfPLOhYxzitjQ9fb 38j9GsXBgMxPQZOdvWT9F6XUTONR84w3xoxGFZb1sLAmAxkWhsHBCGSfNwJXzQhG 7AENGhby/AisYpHT915KJ3ZshSIiqHEo34DFyQtEkjaJRWIC643TMQoBhURb+aIn K/rjaWxS4AaXue3npkpBTyd2ngMiDz65+FTUJXxy+F0sIZ5w44ZZCdBk59UCLVYU LynjXeHWYzvC6YKOF47PY/vkToVcX3mtZ06KpW8kuesZDAO+qAdPnVOlY/O21NCI 6KKCn3bkGEOldHLsw5mtUU5Pwf1WixfURiDi5bd/X1k5NeFJNjyvWJ/HArJS8OAh CvJO9UNsgaqAcx4fnrJ+CY2PcX1W44m1IsqpCMbxbSRXPEN+JLBrW7oeRrk0hyIa dhUZXt7wancda8iK5XYFPhFwaMRnsAibdsUOBecSK6XhVtmd6hflo3p6DWRQdpXL R3pECiI4j3lBCByQCMbSSk6TOCj4J2spRSZOE38n0nNAoR4Vxldw1m1uyE2swP0v n+KYd5w3O3VwLAFGMYI7LYtwWlTBX7ith/NAnsn1YEtiBBm9Ft51c38jI1QtzjOU lrzViloqYnYGJctJ4ojo =gHTG -----END PGP SIGNATURE----- Merge tag 'pci-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI changes from Bjorn Helgaas: - Host bridge cleanups from Yinghai - Disable Bus Master bit on PCI device shutdown (kexec-related) - Stratus ftServer fix - pci_dev_reset() locking fix - IvyBridge graphics erratum workaround * tag 'pci-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (21 commits) microblaze/PCI: fix "io_offset undeclared" error x86/PCI: only check for spinlock being held in SMP kernels resources: add resource_overlaps() PCI: fix uninitialized variable 'cap_mask' MAINTAINERS: update PCI git tree and patchwork PCI: disable Bus Master on PCI device shutdown PCI: work around IvyBridge internal graphics FLR erratum x86/PCI: fix unused variable warning in amd_bus.c PCI: move mutex locking out of pci_dev_reset function PCI: work around Stratus ftServer broken PCIe hierarchy x86/PCI: merge pcibios_scan_root() and pci_scan_bus_on_node() x86/PCI: dynamically allocate pci_root_info for native host bridge drivers x86/PCI: embed pci_sysdata into pci_root_info on ACPI path x86/PCI: embed name into pci_root_info struct x86/PCI: add host bridge resource release for _CRS path x86/PCI: refactor get_current_resources() PCI: add host bridge release support PCI: add generic device into pci_host_bridge struct PCI: rename pci_host_bridge() to find_pci_root_bridge() x86/PCI: fix memleak with get_current_resources() ...
This commit is contained in:
Linus Torvalds
commit
3bb07f1b73
20 changed files with 442 additions and 305 deletions
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@ -2,7 +2,7 @@
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# Makefile for the PCI bus specific drivers.
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#
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obj-y += access.o bus.o probe.o remove.o pci.o \
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obj-y += access.o bus.o probe.o host-bridge.o remove.o pci.o \
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pci-driver.o search.o pci-sysfs.o rom.o setup-res.o \
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irq.o vpd.o
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obj-$(CONFIG_PROC_FS) += proc.o
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|
|
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96
drivers/pci/host-bridge.c
Normal file
96
drivers/pci/host-bridge.c
Normal file
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@ -0,0 +1,96 @@
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/*
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* host bridge related code
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/module.h>
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#include "pci.h"
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static struct pci_bus *find_pci_root_bus(struct pci_dev *dev)
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{
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struct pci_bus *bus;
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bus = dev->bus;
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while (bus->parent)
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bus = bus->parent;
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return bus;
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}
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static struct pci_host_bridge *find_pci_host_bridge(struct pci_dev *dev)
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{
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struct pci_bus *bus = find_pci_root_bus(dev);
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return to_pci_host_bridge(bus->bridge);
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}
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void pci_set_host_bridge_release(struct pci_host_bridge *bridge,
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void (*release_fn)(struct pci_host_bridge *),
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void *release_data)
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{
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bridge->release_fn = release_fn;
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bridge->release_data = release_data;
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}
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static bool resource_contains(struct resource *res1, struct resource *res2)
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{
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return res1->start <= res2->start && res1->end >= res2->end;
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}
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void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
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struct resource *res)
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{
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struct pci_host_bridge *bridge = find_pci_host_bridge(dev);
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struct pci_host_bridge_window *window;
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resource_size_t offset = 0;
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list_for_each_entry(window, &bridge->windows, list) {
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if (resource_type(res) != resource_type(window->res))
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continue;
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if (resource_contains(window->res, res)) {
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offset = window->offset;
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break;
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}
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}
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region->start = res->start - offset;
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region->end = res->end - offset;
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}
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EXPORT_SYMBOL(pcibios_resource_to_bus);
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static bool region_contains(struct pci_bus_region *region1,
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struct pci_bus_region *region2)
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{
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return region1->start <= region2->start && region1->end >= region2->end;
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}
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void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
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struct pci_bus_region *region)
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{
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struct pci_host_bridge *bridge = find_pci_host_bridge(dev);
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struct pci_host_bridge_window *window;
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resource_size_t offset = 0;
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list_for_each_entry(window, &bridge->windows, list) {
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struct pci_bus_region bus_region;
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if (resource_type(res) != resource_type(window->res))
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continue;
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bus_region.start = window->res->start - window->offset;
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bus_region.end = window->res->end - window->offset;
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if (region_contains(&bus_region, region)) {
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offset = window->offset;
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break;
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}
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}
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res->start = region->start + offset;
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res->end = region->end + offset;
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}
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EXPORT_SYMBOL(pcibios_bus_to_resource);
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@ -420,6 +420,12 @@ static void pci_device_shutdown(struct device *dev)
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pci_msi_shutdown(pci_dev);
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pci_msix_shutdown(pci_dev);
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/*
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* Turn off Bus Master bit on the device to tell it to not
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* continue to do DMA
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*/
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pci_disable_device(pci_dev);
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/*
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* Devices may be enabled to wake up by runtime PM, but they need not
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* be supposed to wake up the system from its "power off" state (e.g.
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|
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@ -22,6 +22,7 @@
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#include <linux/interrupt.h>
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#include <linux/device.h>
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#include <linux/pm_runtime.h>
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#include <asm-generic/pci-bridge.h>
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#include <asm/setup.h>
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#include "pci.h"
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@ -3164,18 +3165,12 @@ static int pci_parent_bus_reset(struct pci_dev *dev, int probe)
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return 0;
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}
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static int pci_dev_reset(struct pci_dev *dev, int probe)
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static int __pci_dev_reset(struct pci_dev *dev, int probe)
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{
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int rc;
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might_sleep();
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if (!probe) {
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pci_cfg_access_lock(dev);
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/* block PM suspend, driver probe, etc. */
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device_lock(&dev->dev);
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}
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rc = pci_dev_specific_reset(dev, probe);
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if (rc != -ENOTTY)
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goto done;
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@ -3194,14 +3189,27 @@ static int pci_dev_reset(struct pci_dev *dev, int probe)
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rc = pci_parent_bus_reset(dev, probe);
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done:
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return rc;
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}
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static int pci_dev_reset(struct pci_dev *dev, int probe)
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{
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int rc;
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if (!probe) {
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pci_cfg_access_lock(dev);
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/* block PM suspend, driver probe, etc. */
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device_lock(&dev->dev);
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}
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rc = __pci_dev_reset(dev, probe);
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if (!probe) {
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device_unlock(&dev->dev);
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pci_cfg_access_unlock(dev);
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}
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return rc;
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}
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/**
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* __pci_reset_function - reset a PCI device function
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* @dev: PCI device to reset
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@ -3246,7 +3254,7 @@ EXPORT_SYMBOL_GPL(__pci_reset_function);
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*/
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int __pci_reset_function_locked(struct pci_dev *dev)
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{
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return pci_dev_reset(dev, 1);
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return __pci_dev_reset(dev, 0);
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}
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EXPORT_SYMBOL_GPL(__pci_reset_function_locked);
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@ -3893,6 +3901,8 @@ static int __init pci_setup(char *str)
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pcie_bus_config = PCIE_BUS_PERFORMANCE;
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} else if (!strncmp(str, "pcie_bus_peer2peer", 18)) {
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pcie_bus_config = PCIE_BUS_PEER2PEER;
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} else if (!strncmp(str, "pcie_scan_all", 13)) {
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pci_add_flags(PCI_SCAN_ALL_PCIE_DEVS);
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} else {
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printk(KERN_ERR "PCI: Unknown option `%s'\n",
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str);
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@ -249,7 +249,7 @@ static int get_port_device_capability(struct pci_dev *dev)
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int services = 0, pos;
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u16 reg16;
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u32 reg32;
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int cap_mask;
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int cap_mask = 0;
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int err;
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if (pcie_ports_disabled)
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@ -10,18 +10,16 @@
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#include <linux/module.h>
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#include <linux/cpumask.h>
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#include <linux/pci-aspm.h>
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#include <asm-generic/pci-bridge.h>
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#include "pci.h"
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#define CARDBUS_LATENCY_TIMER 176 /* secondary latency timer */
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#define CARDBUS_RESERVE_BUSNR 3
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static LIST_HEAD(pci_host_bridges);
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/* Ugh. Need to stop exporting this to modules. */
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LIST_HEAD(pci_root_buses);
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EXPORT_SYMBOL(pci_root_buses);
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static int find_anything(struct device *dev, void *data)
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{
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return 1;
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@ -44,82 +42,6 @@ int no_pci_devices(void)
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}
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EXPORT_SYMBOL(no_pci_devices);
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static struct pci_host_bridge *pci_host_bridge(struct pci_dev *dev)
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{
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struct pci_bus *bus;
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struct pci_host_bridge *bridge;
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|
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bus = dev->bus;
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while (bus->parent)
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bus = bus->parent;
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list_for_each_entry(bridge, &pci_host_bridges, list) {
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if (bridge->bus == bus)
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return bridge;
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}
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return NULL;
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}
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static bool resource_contains(struct resource *res1, struct resource *res2)
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{
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return res1->start <= res2->start && res1->end >= res2->end;
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}
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|
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void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
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struct resource *res)
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{
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struct pci_host_bridge *bridge = pci_host_bridge(dev);
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struct pci_host_bridge_window *window;
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resource_size_t offset = 0;
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list_for_each_entry(window, &bridge->windows, list) {
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if (resource_type(res) != resource_type(window->res))
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continue;
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|
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if (resource_contains(window->res, res)) {
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offset = window->offset;
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break;
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}
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}
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|
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region->start = res->start - offset;
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region->end = res->end - offset;
|
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}
|
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EXPORT_SYMBOL(pcibios_resource_to_bus);
|
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|
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static bool region_contains(struct pci_bus_region *region1,
|
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struct pci_bus_region *region2)
|
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{
|
||||
return region1->start <= region2->start && region1->end >= region2->end;
|
||||
}
|
||||
|
||||
void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
|
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struct pci_bus_region *region)
|
||||
{
|
||||
struct pci_host_bridge *bridge = pci_host_bridge(dev);
|
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struct pci_host_bridge_window *window;
|
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struct pci_bus_region bus_region;
|
||||
resource_size_t offset = 0;
|
||||
|
||||
list_for_each_entry(window, &bridge->windows, list) {
|
||||
if (resource_type(res) != resource_type(window->res))
|
||||
continue;
|
||||
|
||||
bus_region.start = window->res->start - window->offset;
|
||||
bus_region.end = window->res->end - window->offset;
|
||||
|
||||
if (region_contains(&bus_region, region)) {
|
||||
offset = window->offset;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
res->start = region->start + offset;
|
||||
res->end = region->end + offset;
|
||||
}
|
||||
EXPORT_SYMBOL(pcibios_bus_to_resource);
|
||||
|
||||
/*
|
||||
* PCI Bus Class
|
||||
*/
|
||||
|
|
@ -501,6 +423,19 @@ static struct pci_bus * pci_alloc_bus(void)
|
|||
return b;
|
||||
}
|
||||
|
||||
static struct pci_host_bridge *pci_alloc_host_bridge(struct pci_bus *b)
|
||||
{
|
||||
struct pci_host_bridge *bridge;
|
||||
|
||||
bridge = kzalloc(sizeof(*bridge), GFP_KERNEL);
|
||||
if (bridge) {
|
||||
INIT_LIST_HEAD(&bridge->windows);
|
||||
bridge->bus = b;
|
||||
}
|
||||
|
||||
return bridge;
|
||||
}
|
||||
|
||||
static unsigned char pcix_bus_speed[] = {
|
||||
PCI_SPEED_UNKNOWN, /* 0 */
|
||||
PCI_SPEED_66MHz_PCIX, /* 1 */
|
||||
|
|
@ -1201,7 +1136,14 @@ int pci_cfg_space_size(struct pci_dev *dev)
|
|||
|
||||
static void pci_release_bus_bridge_dev(struct device *dev)
|
||||
{
|
||||
kfree(dev);
|
||||
struct pci_host_bridge *bridge = to_pci_host_bridge(dev);
|
||||
|
||||
if (bridge->release_fn)
|
||||
bridge->release_fn(bridge);
|
||||
|
||||
pci_free_resource_list(&bridge->windows);
|
||||
|
||||
kfree(bridge);
|
||||
}
|
||||
|
||||
struct pci_dev *alloc_pci_dev(void)
|
||||
|
|
@ -1395,10 +1337,13 @@ static unsigned no_next_fn(struct pci_dev *dev, unsigned fn)
|
|||
static int only_one_child(struct pci_bus *bus)
|
||||
{
|
||||
struct pci_dev *parent = bus->self;
|
||||
|
||||
if (!parent || !pci_is_pcie(parent))
|
||||
return 0;
|
||||
if (parent->pcie_type == PCI_EXP_TYPE_ROOT_PORT ||
|
||||
parent->pcie_type == PCI_EXP_TYPE_DOWNSTREAM)
|
||||
if (parent->pcie_type == PCI_EXP_TYPE_ROOT_PORT)
|
||||
return 1;
|
||||
if (parent->pcie_type == PCI_EXP_TYPE_DOWNSTREAM &&
|
||||
!pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS))
|
||||
return 1;
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -1650,28 +1595,19 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
|
|||
int error;
|
||||
struct pci_host_bridge *bridge;
|
||||
struct pci_bus *b, *b2;
|
||||
struct device *dev;
|
||||
struct pci_host_bridge_window *window, *n;
|
||||
struct resource *res;
|
||||
resource_size_t offset;
|
||||
char bus_addr[64];
|
||||
char *fmt;
|
||||
|
||||
bridge = kzalloc(sizeof(*bridge), GFP_KERNEL);
|
||||
if (!bridge)
|
||||
return NULL;
|
||||
|
||||
b = pci_alloc_bus();
|
||||
if (!b)
|
||||
goto err_bus;
|
||||
|
||||
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
|
||||
if (!dev)
|
||||
goto err_dev;
|
||||
return NULL;
|
||||
|
||||
b->sysdata = sysdata;
|
||||
b->ops = ops;
|
||||
|
||||
b2 = pci_find_bus(pci_domain_nr(b), bus);
|
||||
if (b2) {
|
||||
/* If we already got to this bus through a different bridge, ignore it */
|
||||
|
|
@ -1679,13 +1615,17 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
|
|||
goto err_out;
|
||||
}
|
||||
|
||||
dev->parent = parent;
|
||||
dev->release = pci_release_bus_bridge_dev;
|
||||
dev_set_name(dev, "pci%04x:%02x", pci_domain_nr(b), bus);
|
||||
error = device_register(dev);
|
||||
bridge = pci_alloc_host_bridge(b);
|
||||
if (!bridge)
|
||||
goto err_out;
|
||||
|
||||
bridge->dev.parent = parent;
|
||||
bridge->dev.release = pci_release_bus_bridge_dev;
|
||||
dev_set_name(&bridge->dev, "pci%04x:%02x", pci_domain_nr(b), bus);
|
||||
error = device_register(&bridge->dev);
|
||||
if (error)
|
||||
goto dev_reg_err;
|
||||
b->bridge = get_device(dev);
|
||||
goto bridge_dev_reg_err;
|
||||
b->bridge = get_device(&bridge->dev);
|
||||
device_enable_async_suspend(b->bridge);
|
||||
pci_set_bus_of_node(b);
|
||||
|
||||
|
|
@ -1704,9 +1644,6 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
|
|||
|
||||
b->number = b->secondary = bus;
|
||||
|
||||
bridge->bus = b;
|
||||
INIT_LIST_HEAD(&bridge->windows);
|
||||
|
||||
if (parent)
|
||||
dev_info(parent, "PCI host bridge to bus %s\n", dev_name(&b->dev));
|
||||
else
|
||||
|
|
@ -1732,25 +1669,18 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
|
|||
}
|
||||
|
||||
down_write(&pci_bus_sem);
|
||||
list_add_tail(&bridge->list, &pci_host_bridges);
|
||||
list_add_tail(&b->node, &pci_root_buses);
|
||||
up_write(&pci_bus_sem);
|
||||
|
||||
return b;
|
||||
|
||||
class_dev_reg_err:
|
||||
device_unregister(dev);
|
||||
dev_reg_err:
|
||||
down_write(&pci_bus_sem);
|
||||
list_del(&bridge->list);
|
||||
list_del(&b->node);
|
||||
up_write(&pci_bus_sem);
|
||||
err_out:
|
||||
kfree(dev);
|
||||
err_dev:
|
||||
kfree(b);
|
||||
err_bus:
|
||||
put_device(&bridge->dev);
|
||||
device_unregister(&bridge->dev);
|
||||
bridge_dev_reg_err:
|
||||
kfree(bridge);
|
||||
err_out:
|
||||
kfree(b);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -3097,16 +3097,74 @@ static int reset_intel_82599_sfp_virtfn(struct pci_dev *dev, int probe)
|
|||
return 0;
|
||||
}
|
||||
|
||||
#include "../gpu/drm/i915/i915_reg.h"
|
||||
#define MSG_CTL 0x45010
|
||||
#define NSDE_PWR_STATE 0xd0100
|
||||
#define IGD_OPERATION_TIMEOUT 10000 /* set timeout 10 seconds */
|
||||
|
||||
static int reset_ivb_igd(struct pci_dev *dev, int probe)
|
||||
{
|
||||
void __iomem *mmio_base;
|
||||
unsigned long timeout;
|
||||
u32 val;
|
||||
|
||||
if (probe)
|
||||
return 0;
|
||||
|
||||
mmio_base = pci_iomap(dev, 0, 0);
|
||||
if (!mmio_base)
|
||||
return -ENOMEM;
|
||||
|
||||
iowrite32(0x00000002, mmio_base + MSG_CTL);
|
||||
|
||||
/*
|
||||
* Clobbering SOUTH_CHICKEN2 register is fine only if the next
|
||||
* driver loaded sets the right bits. However, this's a reset and
|
||||
* the bits have been set by i915 previously, so we clobber
|
||||
* SOUTH_CHICKEN2 register directly here.
|
||||
*/
|
||||
iowrite32(0x00000005, mmio_base + SOUTH_CHICKEN2);
|
||||
|
||||
val = ioread32(mmio_base + PCH_PP_CONTROL) & 0xfffffffe;
|
||||
iowrite32(val, mmio_base + PCH_PP_CONTROL);
|
||||
|
||||
timeout = jiffies + msecs_to_jiffies(IGD_OPERATION_TIMEOUT);
|
||||
do {
|
||||
val = ioread32(mmio_base + PCH_PP_STATUS);
|
||||
if ((val & 0xb0000000) == 0)
|
||||
goto reset_complete;
|
||||
msleep(10);
|
||||
} while (time_before(jiffies, timeout));
|
||||
dev_warn(&dev->dev, "timeout during reset\n");
|
||||
|
||||
reset_complete:
|
||||
iowrite32(0x00000002, mmio_base + NSDE_PWR_STATE);
|
||||
|
||||
pci_iounmap(dev, mmio_base);
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define PCI_DEVICE_ID_INTEL_82599_SFP_VF 0x10ed
|
||||
#define PCI_DEVICE_ID_INTEL_IVB_M_VGA 0x0156
|
||||
#define PCI_DEVICE_ID_INTEL_IVB_M2_VGA 0x0166
|
||||
|
||||
static const struct pci_dev_reset_methods pci_dev_reset_methods[] = {
|
||||
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82599_SFP_VF,
|
||||
reset_intel_82599_sfp_virtfn },
|
||||
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IVB_M_VGA,
|
||||
reset_ivb_igd },
|
||||
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IVB_M2_VGA,
|
||||
reset_ivb_igd },
|
||||
{ PCI_VENDOR_ID_INTEL, PCI_ANY_ID,
|
||||
reset_intel_generic_dev },
|
||||
{ 0 }
|
||||
};
|
||||
|
||||
/*
|
||||
* These device-specific reset methods are here rather than in a driver
|
||||
* because when a host assigns a device to a guest VM, the host may need
|
||||
* to reset the device but probably doesn't have a driver for it.
|
||||
*/
|
||||
int pci_dev_specific_reset(struct pci_dev *dev, int probe)
|
||||
{
|
||||
const struct pci_dev_reset_methods *i;
|
||||
|
|
|
|||
Loading…
Reference in a new issue