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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-11 15:11:48 -04:00
msm: camera: cpas: Add support for Bengal camnoc
Bengal has different version of camnoc which requires separate register space and camnoc interface changes. This change adds the same. CRs-Fixed: 2594541 Change-Id: I2a8e6cb8894444cb669ab1c4da5fa706dc6543ad Signed-off-by: Rishabh Jain <risjai@codeaurora.org> Signed-off-by: Trishansh Bhardwaj <tbhardwa@codeaurora.org>
This commit is contained in:
parent
2c76e695e3
commit
3bbd97274f
4 changed files with 261 additions and 7 deletions
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
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* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
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*/
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#include <linux/delay.h>
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@ -22,6 +22,7 @@
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#include "cpastop_v175_130.h"
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#include "cpastop_v480_100.h"
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#include "cpastop_v580_100.h"
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#include "cpastop_v540_100.h"
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struct cam_camnoc_info *camnoc_info;
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@ -126,6 +127,10 @@ static int cam_cpastop_get_hw_info(struct cam_hw_info *cpas_hw,
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(hw_caps->camera_version.minor == 8) &&
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(hw_caps->camera_version.incr == 0)) {
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soc_info->hw_version = CAM_CPAS_TITAN_580_V100;
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} else if ((hw_caps->camera_version.major == 5) &&
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(hw_caps->camera_version.minor == 4) &&
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(hw_caps->camera_version.incr == 0)) {
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soc_info->hw_version = CAM_CPAS_TITAN_540_V100;
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}
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CAM_DBG(CAM_CPAS, "CPAS HW VERSION %x", soc_info->hw_version);
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@ -521,8 +526,7 @@ static int cam_cpastop_poweron(struct cam_hw_info *cpas_hw)
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int i;
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struct cam_cpas_hw_errata_wa_list *errata_wa_list =
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camnoc_info->errata_wa_list;
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struct cam_cpas_hw_errata_wa *errata_wa =
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&errata_wa_list->tcsr_camera_hf_sf_ares_glitch;
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struct cam_cpas_hw_errata_wa *errata_wa;
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cam_cpastop_reset_irq(cpas_hw);
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for (i = 0; i < camnoc_info->specific_size; i++) {
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@ -544,8 +548,10 @@ static int cam_cpastop_poweron(struct cam_hw_info *cpas_hw)
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}
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}
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if (errata_wa->enable) {
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cam_cpastop_scm_write(errata_wa);
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if (errata_wa_list) {
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errata_wa = &errata_wa_list->tcsr_camera_hf_sf_ares_glitch;
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if (errata_wa->enable)
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cam_cpastop_scm_write(errata_wa);
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}
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return 0;
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@ -628,6 +634,8 @@ static int cam_cpastop_init_hw_version(struct cam_hw_info *cpas_hw,
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break;
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case CAM_CPAS_TITAN_580_V100:
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camnoc_info = &cam580_cpas100_camnoc_info;
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case CAM_CPAS_TITAN_540_V100:
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camnoc_info = &cam540_cpas100_camnoc_info;
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break;
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default:
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CAM_ERR(CAM_CPAS, "Camera Version not supported %d.%d.%d",
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@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
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* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
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*/
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#ifndef _CAM_CPASTOP_HW_H_
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@ -115,6 +115,8 @@ enum cam_camnoc_hw_irq_type {
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* @CAM_CAMNOC_JPEG: Indicates JPEG HW connection to camnoc
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* @CAM_CAMNOC_FD: Indicates FD HW connection to camnoc
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* @CAM_CAMNOC_ICP: Indicates ICP HW connection to camnoc
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* @CAM_CAMNOC_TFE: Indicates TFE HW connection to camnoc
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* @CAM_CAMNOC_OPE: Indicates OPE HW connection to camnoc
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*/
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enum cam_camnoc_port_type {
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CAM_CAMNOC_CDM,
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@ -139,6 +141,8 @@ enum cam_camnoc_port_type {
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CAM_CAMNOC_JPEG,
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CAM_CAMNOC_FD,
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CAM_CAMNOC_ICP,
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CAM_CAMNOC_TFE,
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CAM_CAMNOC_OPE,
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};
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/**
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241
drivers/cam_cpas/cpas_top/cpastop_v540_100.h
Normal file
241
drivers/cam_cpas/cpas_top/cpastop_v540_100.h
Normal file
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@ -0,0 +1,241 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
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*/
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#ifndef _CPASTOP_V540_100_H_
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#define _CPASTOP_V540_100_H_
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#define TEST_IRQ_ENABLE 0
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static struct cam_camnoc_irq_sbm cam_cpas_v540_100_irq_sbm = {
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.sbm_enable = {
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.enable = true,
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.offset = 0xA40, /* SBM_FAULTINEN0_LOW */
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.value = 0x1 | /* SBM_FAULTINEN0_LOW_PORT0_MASK*/
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(TEST_IRQ_ENABLE ?
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0x2 : /* SBM_FAULTINEN0_LOW_PORT6_MASK */
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0x0) /* SBM_FAULTINEN0_LOW_PORT1_MASK */,
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},
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.sbm_status = {
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.access_type = CAM_REG_TYPE_READ,
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.enable = true,
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.offset = 0xA48, /* SBM_FAULTINSTATUS0_LOW */
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},
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.sbm_clear = {
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.access_type = CAM_REG_TYPE_WRITE,
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.enable = true,
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.offset = 0xA80, /* SBM_FLAGOUTCLR0_LOW */
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.value = TEST_IRQ_ENABLE ? 0x3 : 0x1,
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}
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};
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static struct cam_camnoc_irq_err
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cam_cpas_v540_100_irq_err[] = {
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{
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.irq_type = CAM_CAMNOC_HW_IRQ_SLAVE_ERROR,
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.enable = true,
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.sbm_port = 0x1, /* SBM_FAULTINSTATUS0_LOW_PORT0_MASK */
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.err_enable = {
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.enable = true,
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.offset = 0xD08, /* ERRORLOGGER_MAINCTL_LOW */
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.value = 1,
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},
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.err_status = {
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.access_type = CAM_REG_TYPE_READ,
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.enable = true,
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.offset = 0xD10, /* ERRORLOGGER_ERRVLD_LOW */
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},
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.err_clear = {
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.access_type = CAM_REG_TYPE_WRITE,
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.enable = true,
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.offset = 0xD18, /* ERRORLOGGER_ERRCLR_LOW */
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.value = 1,
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},
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},
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{
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.irq_type = CAM_CAMNOC_HW_IRQ_CAMNOC_TEST,
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.enable = TEST_IRQ_ENABLE ? true : false,
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.sbm_port = 0x2, /* SBM_FAULTINSTATUS0_LOW_PORT6_MASK */
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.err_enable = {
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.enable = true,
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.offset = 0xA88, /* SBM_FLAGOUTSET0_LOW */
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.value = 0x1,
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},
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.err_status = {
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.access_type = CAM_REG_TYPE_READ,
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.enable = true,
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.offset = 0xA90, /* SBM_FLAGOUTSTATUS0_LOW */
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},
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.err_clear = {
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.enable = false,
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},
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},
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};
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// TODO: Need to update cam_cpas_v540_100_camnoc_specific values based on QoS
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static struct cam_camnoc_specific
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cam_cpas_v540_100_camnoc_specific[] = {
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{
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.port_type = CAM_CAMNOC_CDM,
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.enable = true,
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.priority_lut_low = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0xE30, /* CDM_PRIORITYLUT_LOW */
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.value = 0x22222222,
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},
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.priority_lut_high = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0xE34, /* CDM_PRIORITYLUT_HIGH */
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.value = 0x22222222,
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},
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.urgency = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0xE38, /* CDM_URGENCY_LOW */
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.value = 0x2,
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},
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.danger_lut = {
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.enable = false,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0xE40, /* CDM_DANGERLUT_LOW */
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.value = 0x0,
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},
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.safe_lut = {
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.enable = false,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0xE48, /* CDM_SAFELUT_LOW */
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.value = 0x0,
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},
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.ubwc_ctl = {
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.enable = false,
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},
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},
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{
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.port_type = CAM_CAMNOC_TFE,
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.enable = true,
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.priority_lut_low = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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/* TFE_PRIORITYLUT_LOW */
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.offset = 0x30,
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.value = 0x66665433,
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},
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.priority_lut_high = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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/* TFE_PRIORITYLUT_HIGH */
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.offset = 0x34,
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.value = 0x66666666,
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},
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.urgency = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0x38, /* TFE_URGENCY_LOW */
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.value = 0X10030,
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},
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.danger_lut = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.offset = 0x40, /* TFE_DANGERLUT_LOW */
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.value = 0xFFAA5500,
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},
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.safe_lut = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.offset = 0x48, /* TFE_SAFELUT_LOW */
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.value = 0xFF00,
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},
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.ubwc_ctl = {
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/*
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* Do not explicitly set ubwc config register.
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* Power on default values are taking care of required
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* register settings.
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*/
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.enable = false,
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},
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},
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{
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.port_type = CAM_CAMNOC_OPE,
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.enable = true,
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.priority_lut_low = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0x430, /* OPE_PRIORITYLUT_LOW */
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.value = 0x66665433,
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},
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.priority_lut_high = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0x434, /* OPE_PRIORITYLUT_HIGH */
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.value = 0x66666666,
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},
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.urgency = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.offset = 0x438, /* OPE_URGENCY_LOW */
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.value = 0x3,
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},
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.danger_lut = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.offset = 0x440, /* OPE_DANGERLUT_LOW */
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.value = 0xFFFFFF00,
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},
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.safe_lut = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.offset = 0x448, /* OPE_SAFELUT_LOW */
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.value = 0xF,
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},
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.ubwc_ctl = {
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/*
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* Do not explicitly set ubwc config register.
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* Power on default values are taking care of required
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* register settings.
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*/
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.enable = false,
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},
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},
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};
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static struct cam_camnoc_err_logger_info cam540_cpas100_err_logger_offsets = {
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.mainctrl = 0xD08, /* ERRLOGGER_MAINCTL_LOW */
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.errvld = 0xD10, /* ERRLOGGER_ERRVLD_LOW */
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.errlog0_low = 0xD20, /* ERRLOGGER_ERRLOG0_LOW */
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.errlog0_high = 0xD24, /* ERRLOGGER_ERRLOG0_HIGH */
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.errlog1_low = 0xD28, /* ERRLOGGER_ERRLOG1_LOW */
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.errlog1_high = 0xD2C, /* ERRLOGGER_ERRLOG1_HIGH */
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.errlog2_low = 0xD30, /* ERRLOGGER_ERRLOG2_LOW */
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.errlog2_high = 0xD34, /* ERRLOGGER_ERRLOG2_HIGH */
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.errlog3_low = 0xD38, /* ERRLOGGER_ERRLOG3_LOW */
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.errlog3_high = 0xD3C, /* ERRLOGGER_ERRLOG3_HIGH */
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};
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static struct cam_camnoc_info cam540_cpas100_camnoc_info = {
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.specific = &cam_cpas_v540_100_camnoc_specific[0],
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.specific_size = ARRAY_SIZE(cam_cpas_v540_100_camnoc_specific),
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.irq_sbm = &cam_cpas_v540_100_irq_sbm,
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.irq_err = &cam_cpas_v540_100_irq_err[0],
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.irq_err_size = ARRAY_SIZE(cam_cpas_v540_100_irq_err),
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.err_logger = &cam540_cpas100_err_logger_offsets,
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.errata_wa_list = NULL,
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};
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#endif /* _CPASTOP_V540_100_H_ */
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@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
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* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
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*/
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#ifndef _CAM_CPAS_API_H_
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@ -47,6 +47,7 @@ enum cam_cpas_hw_version {
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CAM_CPAS_TITAN_175_V130 = 0x175130,
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CAM_CPAS_TITAN_480_V100 = 0x480100,
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CAM_CPAS_TITAN_580_V100 = 0x580100,
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CAM_CPAS_TITAN_540_V100 = 0x540100,
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CAM_CPAS_TITAN_MAX
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};
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