From 3bda9b1de1d23f25942db5d5d6d605066bca8f1a Mon Sep 17 00:00:00 2001 From: Xiaoyu Ye Date: Mon, 15 Jan 2018 15:00:42 -0800 Subject: [PATCH] asoc: wcd934x: optimize ANC enablement logic for Tavil codec In Tavil driver, both ANC0 and ANC1 channel registers are written when each ANC channel is enabled. This logic results in high latency during ANC enablement on Tavil codec. Optimize this logic by only writing the corresponding channel registers when enabling ANC0 or ANC1. Change-Id: I62e8572967e6ca6c851cbaaad5f1b8c19e5b1a5f Signed-off-by: Xiaoyu Ye --- asoc/codecs/wcd934x/wcd934x.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/asoc/codecs/wcd934x/wcd934x.c b/asoc/codecs/wcd934x/wcd934x.c index cc65084cb191..21c7f12e7087 100644 --- a/asoc/codecs/wcd934x/wcd934x.c +++ b/asoc/codecs/wcd934x/wcd934x.c @@ -897,7 +897,6 @@ static int tavil_codec_enable_anc(struct snd_soc_dapm_widget *w, struct wcd9xxx_anc_header *anc_head; struct firmware_cal *hwdep_cal = NULL; u32 anc_writes_size = 0; - u32 anc_cal_size = 0; int anc_size_remaining; u32 *anc_ptr; u16 reg; @@ -986,8 +985,16 @@ static int tavil_codec_enable_anc(struct snd_soc_dapm_widget *w, goto err; } - anc_cal_size = anc_writes_size; - for (i = 0; i < anc_writes_size; i++) { + i = 0; + + if (!strcmp(w->name, "RX INT1 DAC") || + !strcmp(w->name, "RX INT3 DAC")) + anc_writes_size = anc_writes_size / 2; + else if (!strcmp(w->name, "RX INT2 DAC") || + !strcmp(w->name, "RX INT4 DAC")) + i = anc_writes_size / 2; + + for (; i < anc_writes_size; i++) { WCD934X_CODEC_UNPACK_ENTRY(anc_ptr[i], reg, mask, val); snd_soc_write(codec, reg, (val & mask)); }